1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs
2 ; RUN: opt -S -passes=verify,iroutliner -ir-outlining-no-cost < %s | FileCheck %s
4 ; Show that we do not outline when all of the phi nodes in the end
5 ; block are not included in the region.
7 define void @function1(ptr %a, ptr %b) {
9 %0 = alloca i32, align 4
10 %c = load i32, ptr %0, align 4
12 br i1 true, label %test1, label %first
14 %e = load i32, ptr %0, align 4
16 br i1 true, label %first, label %test
18 %d = load i32, ptr %0, align 4
19 br i1 true, label %first, label %next
21 %2 = phi i32 [ %d, %test ], [ %e, %test1 ], [ %c, %entry ]
22 %3 = phi i32 [ %d, %test ], [ %e, %test1 ], [ %c, %entry ]
28 define void @function2(ptr %a, ptr %b) {
30 %0 = alloca i32, align 4
31 %c = load i32, ptr %0, align 4
33 br i1 true, label %test1, label %first
35 %e = load i32, ptr %0, align 4
37 br i1 true, label %first, label %test
39 %d = load i32, ptr %0, align 4
40 br i1 true, label %first, label %next
42 %2 = phi i32 [ %d, %test ], [ %e, %test1 ], [ %c, %entry ]
43 %3 = phi i32 [ %d, %test ], [ %c, %entry ], [ %e, %test1 ]
48 ; CHECK-LABEL: @function1(
50 ; CHECK-NEXT: [[TMP0:%.*]] = alloca i32, align 4
51 ; CHECK-NEXT: [[C:%.*]] = load i32, ptr [[TMP0]], align 4
52 ; CHECK-NEXT: [[Z:%.*]] = add i32 [[C]], [[C]]
53 ; CHECK-NEXT: br i1 true, label [[TEST1:%.*]], label [[FIRST:%.*]]
55 ; CHECK-NEXT: [[E:%.*]] = load i32, ptr [[TMP0]], align 4
56 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[C]], [[C]]
57 ; CHECK-NEXT: br i1 true, label [[FIRST]], label [[TEST:%.*]]
59 ; CHECK-NEXT: [[D:%.*]] = load i32, ptr [[TMP0]], align 4
60 ; CHECK-NEXT: br i1 true, label [[FIRST]], label [[NEXT:%.*]]
62 ; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ [[D]], [[TEST]] ], [ [[E]], [[TEST1]] ], [ [[C]], [[ENTRY:%.*]] ]
63 ; CHECK-NEXT: [[TMP3:%.*]] = phi i32 [ [[D]], [[TEST]] ], [ [[E]], [[TEST1]] ], [ [[C]], [[ENTRY]] ]
64 ; CHECK-NEXT: ret void
66 ; CHECK-NEXT: ret void
69 ; CHECK-LABEL: @function2(
71 ; CHECK-NEXT: [[TMP0:%.*]] = alloca i32, align 4
72 ; CHECK-NEXT: [[C:%.*]] = load i32, ptr [[TMP0]], align 4
73 ; CHECK-NEXT: [[Z:%.*]] = mul i32 [[C]], [[C]]
74 ; CHECK-NEXT: br i1 true, label [[TEST1:%.*]], label [[FIRST:%.*]]
76 ; CHECK-NEXT: [[E:%.*]] = load i32, ptr [[TMP0]], align 4
77 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[C]], [[C]]
78 ; CHECK-NEXT: br i1 true, label [[FIRST]], label [[TEST:%.*]]
80 ; CHECK-NEXT: [[D:%.*]] = load i32, ptr [[TMP0]], align 4
81 ; CHECK-NEXT: br i1 true, label [[FIRST]], label [[NEXT:%.*]]
83 ; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ [[D]], [[TEST]] ], [ [[E]], [[TEST1]] ], [ [[C]], [[ENTRY:%.*]] ]
84 ; CHECK-NEXT: [[TMP3:%.*]] = phi i32 [ [[D]], [[TEST]] ], [ [[C]], [[ENTRY]] ], [ [[E]], [[TEST1]] ]
85 ; CHECK-NEXT: ret void
87 ; CHECK-NEXT: ret void