1 ; RUN: opt < %s -passes=loop-vectorize,dce,instcombine -force-vector-interleave=1 -force-vector-width=4 -prefer-inloop-reductions -S | FileCheck %s
3 define float @cond_fadd(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %cond, i64 %N){
4 ; CHECK-LABEL: @cond_fadd(
6 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
7 ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
9 ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[N]], -4
10 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
12 ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_LOAD_CONTINUE6:%.*]] ]
13 ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi float [ 1.000000e+00, [[VECTOR_PH]] ], [ [[TMP27:%.*]], [[PRED_LOAD_CONTINUE6]] ]
14 ; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds float, ptr [[COND:%.*]], i64 [[INDEX]]
15 ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP0]], align 4
16 ; CHECK-NEXT: [[TMP2:%.*]] = fcmp une <4 x float> [[WIDE_LOAD]], <float 5.000000e+00, float 5.000000e+00, float 5.000000e+00, float 5.000000e+00>
17 ; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i1> [[TMP2]], i64 0
18 ; CHECK-NEXT: br i1 [[TMP3]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]]
19 ; CHECK: pred.load.if:
20 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[A:%.*]], i64 [[INDEX]]
21 ; CHECK-NEXT: [[TMP5:%.*]] = load float, ptr [[TMP4]], align 4
22 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x float> poison, float [[TMP5]], i64 0
23 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]]
24 ; CHECK: pred.load.continue:
25 ; CHECK-NEXT: [[TMP7:%.*]] = phi <4 x float> [ poison, [[VECTOR_BODY]] ], [ [[TMP6]], [[PRED_LOAD_IF]] ]
26 ; CHECK-NEXT: [[TMP8:%.*]] = extractelement <4 x i1> [[TMP2]], i64 1
27 ; CHECK-NEXT: br i1 [[TMP8]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]]
28 ; CHECK: pred.load.if1:
29 ; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[INDEX]], 1
30 ; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP9]]
31 ; CHECK-NEXT: [[TMP11:%.*]] = load float, ptr [[TMP10]], align 4
32 ; CHECK-NEXT: [[TMP12:%.*]] = insertelement <4 x float> [[TMP7]], float [[TMP11]], i64 1
33 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE2]]
34 ; CHECK: pred.load.continue2:
35 ; CHECK-NEXT: [[TMP13:%.*]] = phi <4 x float> [ [[TMP7]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP12]], [[PRED_LOAD_IF1]] ]
36 ; CHECK-NEXT: [[TMP14:%.*]] = extractelement <4 x i1> [[TMP2]], i64 2
37 ; CHECK-NEXT: br i1 [[TMP14]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]]
38 ; CHECK: pred.load.if3:
39 ; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[INDEX]], 2
40 ; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP15]]
41 ; CHECK-NEXT: [[TMP17:%.*]] = load float, ptr [[TMP16]], align 4
42 ; CHECK-NEXT: [[TMP18:%.*]] = insertelement <4 x float> [[TMP13]], float [[TMP17]], i64 2
43 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE4]]
44 ; CHECK: pred.load.continue4:
45 ; CHECK-NEXT: [[TMP19:%.*]] = phi <4 x float> [ [[TMP13]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP18]], [[PRED_LOAD_IF3]] ]
46 ; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP2]], i64 3
47 ; CHECK-NEXT: br i1 [[TMP20]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6]]
48 ; CHECK: pred.load.if5:
49 ; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[INDEX]], 3
50 ; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP21]]
51 ; CHECK-NEXT: [[TMP23:%.*]] = load float, ptr [[TMP22]], align 4
52 ; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x float> [[TMP19]], float [[TMP23]], i64 3
53 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE6]]
54 ; CHECK: pred.load.continue6:
55 ; CHECK-NEXT: [[TMP25:%.*]] = phi <4 x float> [ [[TMP19]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP24]], [[PRED_LOAD_IF5]] ]
56 ; CHECK-NEXT: [[TMP26:%.*]] = select fast <4 x i1> [[TMP2]], <4 x float> [[TMP25]], <4 x float> zeroinitializer
57 ; CHECK-NEXT: [[TMP27]] = call fast float @llvm.vector.reduce.fadd.v4f32(float [[VEC_PHI]], <4 x float> [[TMP26]])
58 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
59 ; CHECK-NEXT: [[TMP28:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
60 ; CHECK-NEXT: br i1 [[TMP28]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
61 ; CHECK: middle.block:
62 ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[N]]
63 ; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
65 ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
66 ; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ [[TMP27]], [[MIDDLE_BLOCK]] ], [ 1.000000e+00, [[ENTRY]] ]
67 ; CHECK-NEXT: br label [[FOR_BODY:%.*]]
69 ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[FOR_INC:%.*]] ]
70 ; CHECK-NEXT: [[RDX:%.*]] = phi float [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[RES:%.*]], [[FOR_INC]] ]
71 ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[COND]], i64 [[IV]]
72 ; CHECK-NEXT: [[TMP29:%.*]] = load float, ptr [[ARRAYIDX]], align 4
73 ; CHECK-NEXT: [[TOBOOL:%.*]] = fcmp une float [[TMP29]], 5.000000e+00
74 ; CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[FOR_INC]]
76 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[IV]]
77 ; CHECK-NEXT: [[TMP30:%.*]] = load float, ptr [[ARRAYIDX2]], align 4
78 ; CHECK-NEXT: [[FADD:%.*]] = fadd fast float [[RDX]], [[TMP30]]
79 ; CHECK-NEXT: br label [[FOR_INC]]
81 ; CHECK-NEXT: [[RES]] = phi float [ [[RDX]], [[FOR_BODY]] ], [ [[FADD]], [[IF_THEN]] ]
82 ; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
83 ; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]
84 ; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]]
86 ; CHECK-NEXT: [[RES_LCSSA:%.*]] = phi float [ [[RES]], [[FOR_INC]] ], [ [[TMP27]], [[MIDDLE_BLOCK]] ]
87 ; CHECK-NEXT: ret float [[RES_LCSSA]]
93 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.inc ]
94 %rdx = phi float [ 1.000000e+00, %entry ], [ %res, %for.inc ]
95 %arrayidx = getelementptr inbounds float, ptr %cond, i64 %iv
96 %0 = load float, ptr %arrayidx
97 %tobool = fcmp une float %0, 5.000000e+00
98 br i1 %tobool, label %if.then, label %for.inc
101 %arrayidx2 = getelementptr inbounds float, ptr %a, i64 %iv
102 %1 = load float, ptr %arrayidx2
103 %fadd = fadd fast float %rdx, %1
107 %res = phi float [ %rdx, %for.body ], [ %fadd, %if.then ]
108 %iv.next = add i64 %iv, 1
109 %exitcond.not = icmp eq i64 %iv.next, %N
110 br i1 %exitcond.not, label %for.end, label %for.body
116 define float @cond_cmp_sel(ptr noalias %a, ptr noalias %cond, i64 %N) {
117 ; CHECK-LABEL: @cond_cmp_sel(
119 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
120 ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
122 ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[N]], -4
123 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
124 ; CHECK: vector.body:
125 ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_LOAD_CONTINUE6:%.*]] ]
126 ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi float [ 1.000000e+00, [[VECTOR_PH]] ], [ [[TMP28:%.*]], [[PRED_LOAD_CONTINUE6]] ]
127 ; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds float, ptr [[COND:%.*]], i64 [[INDEX]]
128 ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP0]], align 4
129 ; CHECK-NEXT: [[TMP2:%.*]] = fcmp une <4 x float> [[WIDE_LOAD]], <float 3.000000e+00, float 3.000000e+00, float 3.000000e+00, float 3.000000e+00>
130 ; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i1> [[TMP2]], i64 0
131 ; CHECK-NEXT: br i1 [[TMP3]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]]
132 ; CHECK: pred.load.if:
133 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[A:%.*]], i64 [[INDEX]]
134 ; CHECK-NEXT: [[TMP5:%.*]] = load float, ptr [[TMP4]], align 4
135 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x float> poison, float [[TMP5]], i64 0
136 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]]
137 ; CHECK: pred.load.continue:
138 ; CHECK-NEXT: [[TMP7:%.*]] = phi <4 x float> [ poison, [[VECTOR_BODY]] ], [ [[TMP6]], [[PRED_LOAD_IF]] ]
139 ; CHECK-NEXT: [[TMP8:%.*]] = extractelement <4 x i1> [[TMP2]], i64 1
140 ; CHECK-NEXT: br i1 [[TMP8]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]]
141 ; CHECK: pred.load.if1:
142 ; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[INDEX]], 1
143 ; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP9]]
144 ; CHECK-NEXT: [[TMP11:%.*]] = load float, ptr [[TMP10]], align 4
145 ; CHECK-NEXT: [[TMP12:%.*]] = insertelement <4 x float> [[TMP7]], float [[TMP11]], i64 1
146 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE2]]
147 ; CHECK: pred.load.continue2:
148 ; CHECK-NEXT: [[TMP13:%.*]] = phi <4 x float> [ [[TMP7]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP12]], [[PRED_LOAD_IF1]] ]
149 ; CHECK-NEXT: [[TMP14:%.*]] = extractelement <4 x i1> [[TMP2]], i64 2
150 ; CHECK-NEXT: br i1 [[TMP14]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]]
151 ; CHECK: pred.load.if3:
152 ; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[INDEX]], 2
153 ; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP15]]
154 ; CHECK-NEXT: [[TMP17:%.*]] = load float, ptr [[TMP16]], align 4
155 ; CHECK-NEXT: [[TMP18:%.*]] = insertelement <4 x float> [[TMP13]], float [[TMP17]], i64 2
156 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE4]]
157 ; CHECK: pred.load.continue4:
158 ; CHECK-NEXT: [[TMP19:%.*]] = phi <4 x float> [ [[TMP13]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP18]], [[PRED_LOAD_IF3]] ]
159 ; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP2]], i64 3
160 ; CHECK-NEXT: br i1 [[TMP20]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6]]
161 ; CHECK: pred.load.if5:
162 ; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[INDEX]], 3
163 ; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP21]]
164 ; CHECK-NEXT: [[TMP23:%.*]] = load float, ptr [[TMP22]], align 4
165 ; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x float> [[TMP19]], float [[TMP23]], i64 3
166 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE6]]
167 ; CHECK: pred.load.continue6:
168 ; CHECK-NEXT: [[TMP25:%.*]] = phi <4 x float> [ [[TMP19]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP24]], [[PRED_LOAD_IF5]] ]
169 ; CHECK-NEXT: [[TMP26:%.*]] = select fast <4 x i1> [[TMP2]], <4 x float> [[TMP25]], <4 x float> <float 0x7FF0000000000000, float 0x7FF0000000000000, float 0x7FF0000000000000, float 0x7FF0000000000000>
170 ; CHECK-NEXT: [[TMP27:%.*]] = call fast float @llvm.vector.reduce.fmin.v4f32(<4 x float> [[TMP26]])
171 ; CHECK-NEXT: [[TMP28]] = call fast float @llvm.minnum.f32(float [[TMP27]], float [[VEC_PHI]])
172 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
173 ; CHECK-NEXT: [[TMP29:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
174 ; CHECK-NEXT: br i1 [[TMP29]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
175 ; CHECK: middle.block:
176 ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[N]]
177 ; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
179 ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
180 ; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ [[TMP28]], [[MIDDLE_BLOCK]] ], [ 1.000000e+00, [[ENTRY]] ]
181 ; CHECK-NEXT: br label [[FOR_BODY:%.*]]
183 ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[FOR_INC:%.*]] ]
184 ; CHECK-NEXT: [[RDX:%.*]] = phi float [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[RES:%.*]], [[FOR_INC]] ]
185 ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[COND]], i64 [[IV]]
186 ; CHECK-NEXT: [[TMP30:%.*]] = load float, ptr [[ARRAYIDX]], align 4
187 ; CHECK-NEXT: [[TOBOOL:%.*]] = fcmp une float [[TMP30]], 3.000000e+00
188 ; CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[FOR_INC]]
190 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[IV]]
191 ; CHECK-NEXT: [[TMP31:%.*]] = load float, ptr [[ARRAYIDX2]], align 4
192 ; CHECK-NEXT: [[TMP32:%.*]] = call fast float @llvm.minnum.f32(float [[RDX]], float [[TMP31]])
193 ; CHECK-NEXT: br label [[FOR_INC]]
195 ; CHECK-NEXT: [[RES]] = phi float [ [[RDX]], [[FOR_BODY]] ], [ [[TMP32]], [[IF_THEN]] ]
196 ; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
197 ; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]
198 ; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
200 ; CHECK-NEXT: [[RES_LCSSA:%.*]] = phi float [ [[RES]], [[FOR_INC]] ], [ [[TMP28]], [[MIDDLE_BLOCK]] ]
201 ; CHECK-NEXT: ret float [[RES_LCSSA]]
207 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.inc ]
208 %rdx = phi float [ 1.000000e+00, %entry ], [ %res, %for.inc ]
209 %arrayidx = getelementptr inbounds float, ptr %cond, i64 %iv
210 %0 = load float, ptr %arrayidx
211 %tobool = fcmp une float %0, 3.000000e+00
212 br i1 %tobool, label %if.then, label %for.inc
215 %arrayidx2 = getelementptr inbounds float, ptr %a, i64 %iv
216 %1 = load float, ptr %arrayidx2
217 %fcmp = fcmp fast olt float %rdx, %1
218 %fsel = select fast i1 %fcmp, float %rdx, float %1
222 %res = phi float [ %rdx, %for.body ], [ %fsel, %if.then ]
223 %iv.next = add i64 %iv, 1
224 %exitcond.not = icmp eq i64 %iv.next, %N
225 br i1 %exitcond.not, label %for.end, label %for.body
231 define i32 @conditional_and(ptr noalias %A, ptr noalias %B, i32 %cond, i64 noundef %N) #0 {
232 ; CHECK-LABEL: @conditional_and(
234 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
235 ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
237 ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[N]], -4
238 ; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[COND:%.*]], i64 0
239 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer
240 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
241 ; CHECK: vector.body:
242 ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_LOAD_CONTINUE6:%.*]] ]
243 ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 7, [[VECTOR_PH]] ], [ [[TMP28:%.*]], [[PRED_LOAD_CONTINUE6]] ]
244 ; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDEX]]
245 ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP0]], align 4
246 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <4 x i32> [[WIDE_LOAD]], [[BROADCAST_SPLAT]]
247 ; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i1> [[TMP2]], i64 0
248 ; CHECK-NEXT: br i1 [[TMP3]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]]
249 ; CHECK: pred.load.if:
250 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i64 [[INDEX]]
251 ; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
252 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> poison, i32 [[TMP5]], i64 0
253 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]]
254 ; CHECK: pred.load.continue:
255 ; CHECK-NEXT: [[TMP7:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP6]], [[PRED_LOAD_IF]] ]
256 ; CHECK-NEXT: [[TMP8:%.*]] = extractelement <4 x i1> [[TMP2]], i64 1
257 ; CHECK-NEXT: br i1 [[TMP8]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]]
258 ; CHECK: pred.load.if1:
259 ; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[INDEX]], 1
260 ; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[TMP9]]
261 ; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
262 ; CHECK-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[TMP11]], i64 1
263 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE2]]
264 ; CHECK: pred.load.continue2:
265 ; CHECK-NEXT: [[TMP13:%.*]] = phi <4 x i32> [ [[TMP7]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP12]], [[PRED_LOAD_IF1]] ]
266 ; CHECK-NEXT: [[TMP14:%.*]] = extractelement <4 x i1> [[TMP2]], i64 2
267 ; CHECK-NEXT: br i1 [[TMP14]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]]
268 ; CHECK: pred.load.if3:
269 ; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[INDEX]], 2
270 ; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[TMP15]]
271 ; CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4
272 ; CHECK-NEXT: [[TMP18:%.*]] = insertelement <4 x i32> [[TMP13]], i32 [[TMP17]], i64 2
273 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE4]]
274 ; CHECK: pred.load.continue4:
275 ; CHECK-NEXT: [[TMP19:%.*]] = phi <4 x i32> [ [[TMP13]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP18]], [[PRED_LOAD_IF3]] ]
276 ; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP2]], i64 3
277 ; CHECK-NEXT: br i1 [[TMP20]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6]]
278 ; CHECK: pred.load.if5:
279 ; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[INDEX]], 3
280 ; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[TMP21]]
281 ; CHECK-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
282 ; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x i32> [[TMP19]], i32 [[TMP23]], i64 3
283 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE6]]
284 ; CHECK: pred.load.continue6:
285 ; CHECK-NEXT: [[TMP25:%.*]] = phi <4 x i32> [ [[TMP19]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP24]], [[PRED_LOAD_IF5]] ]
286 ; CHECK-NEXT: [[TMP26:%.*]] = select <4 x i1> [[TMP2]], <4 x i32> [[TMP25]], <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>
287 ; CHECK-NEXT: [[TMP27:%.*]] = call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> [[TMP26]])
288 ; CHECK-NEXT: [[TMP28]] = and i32 [[TMP27]], [[VEC_PHI]]
289 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
290 ; CHECK-NEXT: [[TMP29:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
291 ; CHECK-NEXT: br i1 [[TMP29]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
292 ; CHECK: middle.block:
293 ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[N]]
294 ; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
296 ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
297 ; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP28]], [[MIDDLE_BLOCK]] ], [ 7, [[ENTRY]] ]
298 ; CHECK-NEXT: br label [[FOR_BODY:%.*]]
300 ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[FOR_INC:%.*]] ]
301 ; CHECK-NEXT: [[RDX:%.*]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[RES:%.*]], [[FOR_INC]] ]
302 ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV]]
303 ; CHECK-NEXT: [[TMP30:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
304 ; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP30]], [[COND]]
305 ; CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[FOR_INC]]
307 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV]]
308 ; CHECK-NEXT: [[TMP31:%.*]] = load i32, ptr [[ARRAYIDX2]], align 4
309 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[TMP31]], [[RDX]]
310 ; CHECK-NEXT: br label [[FOR_INC]]
312 ; CHECK-NEXT: [[RES]] = phi i32 [ [[AND]], [[IF_THEN]] ], [ [[RDX]], [[FOR_BODY]] ]
313 ; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
314 ; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]
315 ; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
317 ; CHECK-NEXT: [[RES_LCSSA:%.*]] = phi i32 [ [[RES]], [[FOR_INC]] ], [ [[TMP28]], [[MIDDLE_BLOCK]] ]
318 ; CHECK-NEXT: ret i32 [[RES_LCSSA]]
324 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.inc ]
325 %rdx = phi i32 [ 7, %entry ], [ %res, %for.inc ]
326 %arrayidx = getelementptr inbounds i32, ptr %A, i64 %iv
327 %0 = load i32, ptr %arrayidx
328 %tobool = icmp eq i32 %0, %cond
329 br i1 %tobool, label %if.then, label %for.inc
332 %arrayidx2 = getelementptr inbounds i32, ptr %B, i64 %iv
333 %1 = load i32, ptr %arrayidx2
334 %and = and i32 %1, %rdx
338 %res = phi i32 [ %and, %if.then ], [ %rdx, %for.body ]
339 %iv.next = add nuw nsw i64 %iv, 1
340 %exitcond.not = icmp eq i64 %iv.next, %N
341 br i1 %exitcond.not, label %for.end, label %for.body
347 define i32 @simple_chained_rdx(ptr noalias %a, ptr noalias %b, ptr noalias %cond, i64 noundef %N) {
348 ; CHECK-LABEL: @simple_chained_rdx(
350 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
351 ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
353 ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[N]], -4
354 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
355 ; CHECK: vector.body:
356 ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_LOAD_CONTINUE6:%.*]] ]
357 ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 5, [[VECTOR_PH]] ], [ [[TMP46:%.*]], [[PRED_LOAD_CONTINUE6]] ]
358 ; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[COND:%.*]], i64 [[INDEX]]
359 ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP0]], align 4
360 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <4 x i32> [[WIDE_LOAD]], zeroinitializer
361 ; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i1> [[TMP1]], i64 0
362 ; CHECK-NEXT: br i1 [[TMP2]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]]
363 ; CHECK: pred.load.if:
364 ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDEX]]
365 ; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
366 ; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i32> poison, i32 [[TMP4]], i64 0
367 ; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i64 [[INDEX]]
368 ; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
369 ; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> poison, i32 [[TMP7]], i64 0
370 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]]
371 ; CHECK: pred.load.continue:
372 ; CHECK-NEXT: [[TMP9:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP5]], [[PRED_LOAD_IF]] ]
373 ; CHECK-NEXT: [[TMP10:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP8]], [[PRED_LOAD_IF]] ]
374 ; CHECK-NEXT: [[TMP11:%.*]] = extractelement <4 x i1> [[TMP1]], i64 1
375 ; CHECK-NEXT: br i1 [[TMP11]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]]
376 ; CHECK: pred.load.if1:
377 ; CHECK-NEXT: [[TMP12:%.*]] = or i64 [[INDEX]], 1
378 ; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP12]]
379 ; CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4
380 ; CHECK-NEXT: [[TMP15:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[TMP14]], i64 1
381 ; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[TMP12]]
382 ; CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4
383 ; CHECK-NEXT: [[TMP18:%.*]] = insertelement <4 x i32> [[TMP10]], i32 [[TMP17]], i64 1
384 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE2]]
385 ; CHECK: pred.load.continue2:
386 ; CHECK-NEXT: [[TMP19:%.*]] = phi <4 x i32> [ [[TMP9]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP15]], [[PRED_LOAD_IF1]] ]
387 ; CHECK-NEXT: [[TMP20:%.*]] = phi <4 x i32> [ [[TMP10]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP18]], [[PRED_LOAD_IF1]] ]
388 ; CHECK-NEXT: [[TMP21:%.*]] = extractelement <4 x i1> [[TMP1]], i64 2
389 ; CHECK-NEXT: br i1 [[TMP21]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]]
390 ; CHECK: pred.load.if3:
391 ; CHECK-NEXT: [[TMP22:%.*]] = or i64 [[INDEX]], 2
392 ; CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP22]]
393 ; CHECK-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
394 ; CHECK-NEXT: [[TMP25:%.*]] = insertelement <4 x i32> [[TMP19]], i32 [[TMP24]], i64 2
395 ; CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[TMP22]]
396 ; CHECK-NEXT: [[TMP27:%.*]] = load i32, ptr [[TMP26]], align 4
397 ; CHECK-NEXT: [[TMP28:%.*]] = insertelement <4 x i32> [[TMP20]], i32 [[TMP27]], i64 2
398 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE4]]
399 ; CHECK: pred.load.continue4:
400 ; CHECK-NEXT: [[TMP29:%.*]] = phi <4 x i32> [ [[TMP19]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP25]], [[PRED_LOAD_IF3]] ]
401 ; CHECK-NEXT: [[TMP30:%.*]] = phi <4 x i32> [ [[TMP20]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP28]], [[PRED_LOAD_IF3]] ]
402 ; CHECK-NEXT: [[TMP31:%.*]] = extractelement <4 x i1> [[TMP1]], i64 3
403 ; CHECK-NEXT: br i1 [[TMP31]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6]]
404 ; CHECK: pred.load.if5:
405 ; CHECK-NEXT: [[TMP32:%.*]] = or i64 [[INDEX]], 3
406 ; CHECK-NEXT: [[TMP33:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP32]]
407 ; CHECK-NEXT: [[TMP34:%.*]] = load i32, ptr [[TMP33]], align 4
408 ; CHECK-NEXT: [[TMP35:%.*]] = insertelement <4 x i32> [[TMP29]], i32 [[TMP34]], i64 3
409 ; CHECK-NEXT: [[TMP36:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[TMP32]]
410 ; CHECK-NEXT: [[TMP37:%.*]] = load i32, ptr [[TMP36]], align 4
411 ; CHECK-NEXT: [[TMP38:%.*]] = insertelement <4 x i32> [[TMP30]], i32 [[TMP37]], i64 3
412 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE6]]
413 ; CHECK: pred.load.continue6:
414 ; CHECK-NEXT: [[TMP39:%.*]] = phi <4 x i32> [ [[TMP29]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP35]], [[PRED_LOAD_IF5]] ]
415 ; CHECK-NEXT: [[TMP40:%.*]] = phi <4 x i32> [ [[TMP30]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP38]], [[PRED_LOAD_IF5]] ]
416 ; CHECK-NEXT: [[TMP41:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[TMP39]], <4 x i32> zeroinitializer
417 ; CHECK-NEXT: [[TMP42:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP41]])
418 ; CHECK-NEXT: [[TMP43:%.*]] = add i32 [[TMP42]], [[VEC_PHI]]
419 ; CHECK-NEXT: [[TMP44:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[TMP40]], <4 x i32> zeroinitializer
420 ; CHECK-NEXT: [[TMP45:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP44]])
421 ; CHECK-NEXT: [[TMP46]] = add i32 [[TMP45]], [[TMP43]]
422 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
423 ; CHECK-NEXT: [[TMP47:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
424 ; CHECK-NEXT: br i1 [[TMP47]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
425 ; CHECK: middle.block:
426 ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[N]]
427 ; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
429 ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
430 ; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP46]], [[MIDDLE_BLOCK]] ], [ 5, [[ENTRY]] ]
431 ; CHECK-NEXT: br label [[FOR_BODY:%.*]]
433 ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]
434 ; CHECK-NEXT: [[RDX:%.*]] = phi i32 [ [[RES:%.*]], [[FOR_INC]] ], [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ]
435 ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[COND]], i64 [[IV]]
436 ; CHECK-NEXT: [[TMP48:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
437 ; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[TMP48]], 0
438 ; CHECK-NEXT: br i1 [[TOBOOL_NOT]], label [[FOR_INC]], label [[IF_THEN:%.*]]
440 ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV]]
441 ; CHECK-NEXT: [[TMP49:%.*]] = load i32, ptr [[ARRAYIDX1]], align 4
442 ; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP49]], [[RDX]]
443 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV]]
444 ; CHECK-NEXT: [[TMP50:%.*]] = load i32, ptr [[ARRAYIDX2]], align 4
445 ; CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[ADD]], [[TMP50]]
446 ; CHECK-NEXT: br label [[FOR_INC]]
448 ; CHECK-NEXT: [[RES]] = phi i32 [ [[ADD3]], [[IF_THEN]] ], [ [[RDX]], [[FOR_BODY]] ]
449 ; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
450 ; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]
451 ; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
453 ; CHECK-NEXT: [[RES_LCSSA:%.*]] = phi i32 [ [[RES]], [[FOR_INC]] ], [ [[TMP46]], [[MIDDLE_BLOCK]] ]
454 ; CHECK-NEXT: ret i32 [[RES_LCSSA]]
460 %iv = phi i64 [ %iv.next, %for.inc ], [ 0, %entry ]
461 %rdx = phi i32 [ %res, %for.inc ], [ 5, %entry ]
462 %arrayidx = getelementptr inbounds i32, ptr %cond, i64 %iv
463 %0 = load i32, ptr %arrayidx
464 %tobool.not = icmp eq i32 %0, 0
465 br i1 %tobool.not, label %for.inc, label %if.then
468 %arrayidx1 = getelementptr inbounds i32, ptr %a, i64 %iv
469 %1 = load i32, ptr %arrayidx1
470 %add = add nsw i32 %1, %rdx
471 %arrayidx2 = getelementptr inbounds i32, ptr %b, i64 %iv
472 %2 = load i32, ptr %arrayidx2
473 %add3 = add nsw i32 %add, %2
477 %res = phi i32 [ %add3, %if.then ], [ %rdx, %for.body ]
478 %iv.next = add nuw nsw i64 %iv, 1
479 %exitcond.not = icmp eq i64 %iv.next, %N
480 br i1 %exitcond.not, label %for.end, label %for.body
491 ; Reduction not performed in loop as the phi has more than two incoming values
493 define i64 @nested_cond_and(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture readonly %cond, i64 %N){
494 ; CHECK-LABEL: @nested_cond_and(
495 ; CHECK: vector.body:
496 ; CHECK-NOT: @llvm.vector.reduce.and
497 ; CHECK: middle.block:
498 ; CHECK: @llvm.vector.reduce.and
504 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.inc ]
505 %rdx = phi i64 [ 5, %entry ], [ %res, %for.inc ]
506 %arrayidx = getelementptr inbounds i64, ptr %cond, i64 %iv
507 %0 = load i64, ptr %arrayidx
508 %tobool = icmp eq i64 %0, 0
509 br i1 %tobool, label %if.then, label %for.inc
512 %arrayidx2 = getelementptr inbounds i64, ptr %a, i64 %iv
513 %1 = load i64, ptr %arrayidx2
514 %and1 = and i64 %rdx, %1
515 %tobool2 = icmp eq i64 %1, 3
516 br i1 %tobool2, label %if.then.2, label %for.inc
519 %arrayidx3 = getelementptr inbounds i64, ptr %b, i64 %iv
520 %2 = load i64, ptr %arrayidx3
521 %and2 = and i64 %rdx, %2
525 %res = phi i64 [ %and2, %if.then.2 ], [ %and1, %if.then ], [ %rdx, %for.body ]
526 %iv.next = add nuw nsw i64 %iv, 1
527 %exitcond.not = icmp eq i64 %iv.next, %N
528 br i1 %exitcond.not, label %for.end, label %for.body
534 ; Chain of conditional & unconditional reductions. We currently only support conditional reductions
535 ; if they are the last in the chain, i.e. the loop exit instruction is a Phi node. Therefore we reject
536 ; the Phi (%rdx1) as it has more than one use.
538 define i32 @cond-uncond(ptr noalias %src1, ptr noalias %src2, ptr noalias %cond, i64 noundef %n) #0 {
539 ; CHECK-LABEL: @cond-uncond(
540 ; CHECK: pred.load.continue6:
541 ; CHECK-NOT: @llvm.vector.reduce.add
542 ; CHECK: middle.block:
543 ; CHECK: @llvm.vector.reduce.add
549 %rdx1 = phi i32 [ %add2, %if.end ], [ 0, %entry ]
550 %iv = phi i64 [ %iv.next, %if.end ], [ 0, %entry]
551 %arrayidx = getelementptr inbounds i32, ptr %cond, i64 %iv
552 %0 = load i32, ptr %arrayidx
553 %tobool.not = icmp eq i32 %0, 0
554 br i1 %tobool.not, label %if.end, label %if.then
557 %arrayidx1 = getelementptr inbounds i32, ptr %src2, i64 %iv
558 %1 = load i32, ptr %arrayidx1
559 %add = add nsw i32 %1, %rdx1
563 %res = phi i32 [ %add, %if.then ], [ %rdx1, %for.body ]
564 %arrayidx2 = getelementptr inbounds i32, ptr %src1, i64 %iv
565 %2 = load i32, ptr %arrayidx2
566 %add2 = add nsw i32 %2, %res
567 %iv.next = add nuw nsw i64 %iv, 1
568 %exitcond.not = icmp eq i64 %iv.next, %n
569 br i1 %exitcond.not, label %for.end, label %for.body
576 ; Chain of two conditional reductions. We do not vectorise this with in-loop reductions as neither
577 ; of the incoming values of the LoopExitInstruction (%res) is the reduction Phi (%rdx1).
579 define float @cond_cond(ptr noalias %src1, ptr noalias %src2, ptr noalias %cond, i64 %n) #0 {
580 ; CHECK-LABEL: @cond_cond(
581 ; CHECK: pred.load.continue14:
582 ; CHECK-NOT: @llvm.vector.reduce.fadd
583 ; CHECK: middle.block:
584 ; CHECK: @llvm.vector.reduce.fadd
590 %rdx1 = phi float [ %res, %for.inc ], [ 2.000000e+00, %entry ]
591 %iv = phi i64 [ %iv.next, %for.inc ], [ 0, %entry ]
592 %arrayidx = getelementptr inbounds float, ptr %cond, i64 %iv
593 %0 = load float, ptr %arrayidx
594 %cmp1 = fcmp fast oeq float %0, 3.000000e+00
595 br i1 %cmp1, label %if.then, label %if.end
598 %arrayidx2 = getelementptr inbounds float, ptr %src1, i64 %iv
599 %1 = load float, ptr %arrayidx2
600 %add = fadd fast float %1, %rdx1
604 %rdx2 = phi float [ %add, %if.then ], [ %rdx1, %for.body ]
605 %cmp5 = fcmp fast oeq float %0, 7.000000e+00
606 br i1 %cmp5, label %if.then6, label %for.inc
609 %arrayidx7 = getelementptr inbounds float, ptr %src2, i64 %iv
610 %2 = load float, ptr %arrayidx7
611 %add2 = fadd fast float %2, %rdx2
615 %res = phi float [ %add2, %if.then6 ], [ %rdx2, %if.end ]
616 %iv.next = add nuw nsw i64 %iv, 1
617 %exitcond.not = icmp eq i64 %iv.next, %n
618 br i1 %exitcond.not, label %for.end, label %for.body
625 ; Chain of an unconditional & a conditional reduction. We do not vectorise this in-loop as neither of the
626 ; incoming values of the LoopExitInstruction (%res) is the reduction Phi (%rdx).
628 define i32 @uncond_cond(ptr noalias %src1, ptr noalias %src2, ptr noalias %cond, i64 %N) #0 {
629 ; CHECK-LABEL: @uncond_cond(
630 ; CHECK: pred.load.continue7:
631 ; CHECK-NOT: @llvm.vector.reduce.add
632 ; CHECK: middle.block:
633 ; CHECK: @llvm.vector.reduce.add
639 %rdx = phi i32 [ %res, %for.inc ], [ 0, %entry ]
640 %iv = phi i64 [ %iv.next, %for.inc ], [ 0, %entry ]
641 %arrayidx = getelementptr inbounds i32, ptr %src1, i64 %iv
642 %0 = load i32, ptr %arrayidx
643 %add1 = add nsw i32 %0, %rdx
644 %arrayidx1 = getelementptr inbounds i32, ptr %cond, i64 %iv
645 %1 = load i32, ptr %arrayidx1
646 %tobool.not = icmp eq i32 %1, 0
647 br i1 %tobool.not, label %for.inc, label %if.then
650 %arrayidx2 = getelementptr inbounds i32, ptr %src2, i64 %iv
651 %2 = load i32, ptr %arrayidx2
652 %add2 = add nsw i32 %2, %add1
656 %res = phi i32 [ %add2, %if.then ], [ %add1, %for.body ]
657 %iv.next = add nuw nsw i64 %iv, 1
658 %exitcond.not = icmp eq i64 %iv.next, %N
659 br i1 %exitcond.not, label %for.end, label %for.body
666 ; Chain of multiple unconditional & conditional reductions. Does not vectorise in-loop as when we look back
667 ; through the chain and check the number of uses of %add1, we find more than the expected one use.
669 define i32 @uncond_cond_uncond(ptr noalias %src1, ptr noalias %src2, ptr noalias %cond, i64 noundef %N) {
670 ; CHECK-LABEL: @uncond_cond_uncond(
671 ; CHECK: pred.load.continue7:
672 ; CHECK-NOT: @llvm.vector.reduce.add
673 ; CHECK: middle.block:
674 ; CHECK: @llvm.vector.reduce.add
680 %rdx = phi i32 [ %add3, %if.end ], [ 0, %entry ]
681 %iv = phi i64 [ %iv.next, %if.end ], [ 0, %entry ]
682 %arrayidx = getelementptr inbounds i32, ptr %src1, i64 %iv
683 %0 = load i32, ptr %arrayidx
684 %add1 = add nsw i32 %0, %rdx
685 %arrayidx1 = getelementptr inbounds i32, ptr %cond, i64 %iv
686 %1 = load i32, ptr %arrayidx1
687 %tobool.not = icmp eq i32 %1, 0
688 br i1 %tobool.not, label %if.end, label %if.then
691 %arrayidx2 = getelementptr inbounds i32, ptr %src2, i64 %iv
692 %2 = load i32, ptr %arrayidx2
693 %add2 = add nsw i32 %2, %add1
697 %res = phi i32 [ %add2, %if.then ], [ %add1, %for.body ]
698 %add3 = add nsw i32 %res, %0
699 %iv.next = add nuw nsw i64 %iv, 1
700 %exitcond.not = icmp eq i64 %iv.next, %N
701 br i1 %exitcond.not, label %for.end, label %for.body