[sanitizer] Improve FreeBSD ASLR detection
[llvm-project.git] / llvm / lib / CodeGen / SelectionDAG / LegalizeTypes.h
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1 //===-- LegalizeTypes.h - DAG Type Legalizer class definition ---*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines the DAGTypeLegalizer class. This is a private interface
10 // shared between the code that implements the SelectionDAG::LegalizeTypes
11 // method.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_LIB_CODEGEN_SELECTIONDAG_LEGALIZETYPES_H
16 #define LLVM_LIB_CODEGEN_SELECTIONDAG_LEGALIZETYPES_H
18 #include "llvm/ADT/DenseMap.h"
19 #include "llvm/CodeGen/SelectionDAG.h"
20 #include "llvm/CodeGen/TargetLowering.h"
21 #include "llvm/Support/Compiler.h"
22 #include "llvm/Support/Debug.h"
24 namespace llvm {
26 //===----------------------------------------------------------------------===//
27 /// This takes an arbitrary SelectionDAG as input and hacks on it until only
28 /// value types the target machine can handle are left. This involves promoting
29 /// small sizes to large sizes or splitting up large values into small values.
30 ///
31 class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
32 const TargetLowering &TLI;
33 SelectionDAG &DAG;
34 public:
35 /// This pass uses the NodeId on the SDNodes to hold information about the
36 /// state of the node. The enum has all the values.
37 enum NodeIdFlags {
38 /// All operands have been processed, so this node is ready to be handled.
39 ReadyToProcess = 0,
41 /// This is a new node, not before seen, that was created in the process of
42 /// legalizing some other node.
43 NewNode = -1,
45 /// This node's ID needs to be set to the number of its unprocessed
46 /// operands.
47 Unanalyzed = -2,
49 /// This is a node that has already been processed.
50 Processed = -3
52 // 1+ - This is a node which has this many unprocessed operands.
54 private:
56 /// This is a bitvector that contains two bits for each simple value type,
57 /// where the two bits correspond to the LegalizeAction enum from
58 /// TargetLowering. This can be queried with "getTypeAction(VT)".
59 TargetLowering::ValueTypeActionImpl ValueTypeActions;
61 /// Return how we should legalize values of this type.
62 TargetLowering::LegalizeTypeAction getTypeAction(EVT VT) const {
63 return TLI.getTypeAction(*DAG.getContext(), VT);
66 /// Return true if this type is legal on this target.
67 bool isTypeLegal(EVT VT) const {
68 return TLI.getTypeAction(*DAG.getContext(), VT) == TargetLowering::TypeLegal;
71 /// Return true if this is a simple legal type.
72 bool isSimpleLegalType(EVT VT) const {
73 return VT.isSimple() && TLI.isTypeLegal(VT);
76 EVT getSetCCResultType(EVT VT) const {
77 return TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT);
80 /// Pretend all of this node's results are legal.
81 bool IgnoreNodeResults(SDNode *N) const {
82 return N->getOpcode() == ISD::TargetConstant ||
83 N->getOpcode() == ISD::Register;
86 // Bijection from SDValue to unique id. As each created node gets a
87 // new id we do not need to worry about reuse expunging. Should we
88 // run out of ids, we can do a one time expensive compactifcation.
89 typedef unsigned TableId;
91 TableId NextValueId = 1;
93 SmallDenseMap<SDValue, TableId, 8> ValueToIdMap;
94 SmallDenseMap<TableId, SDValue, 8> IdToValueMap;
96 /// For integer nodes that are below legal width, this map indicates what
97 /// promoted value to use.
98 SmallDenseMap<TableId, TableId, 8> PromotedIntegers;
100 /// For integer nodes that need to be expanded this map indicates which
101 /// operands are the expanded version of the input.
102 SmallDenseMap<TableId, std::pair<TableId, TableId>, 8> ExpandedIntegers;
104 /// For floating-point nodes converted to integers of the same size, this map
105 /// indicates the converted value to use.
106 SmallDenseMap<TableId, TableId, 8> SoftenedFloats;
108 /// For floating-point nodes that have a smaller precision than the smallest
109 /// supported precision, this map indicates what promoted value to use.
110 SmallDenseMap<TableId, TableId, 8> PromotedFloats;
112 /// For floating-point nodes that have a smaller precision than the smallest
113 /// supported precision, this map indicates the converted value to use.
114 SmallDenseMap<TableId, TableId, 8> SoftPromotedHalfs;
116 /// For float nodes that need to be expanded this map indicates which operands
117 /// are the expanded version of the input.
118 SmallDenseMap<TableId, std::pair<TableId, TableId>, 8> ExpandedFloats;
120 /// For nodes that are <1 x ty>, this map indicates the scalar value of type
121 /// 'ty' to use.
122 SmallDenseMap<TableId, TableId, 8> ScalarizedVectors;
124 /// For nodes that need to be split this map indicates which operands are the
125 /// expanded version of the input.
126 SmallDenseMap<TableId, std::pair<TableId, TableId>, 8> SplitVectors;
128 /// For vector nodes that need to be widened, indicates the widened value to
129 /// use.
130 SmallDenseMap<TableId, TableId, 8> WidenedVectors;
132 /// For values that have been replaced with another, indicates the replacement
133 /// value to use.
134 SmallDenseMap<TableId, TableId, 8> ReplacedValues;
136 /// This defines a worklist of nodes to process. In order to be pushed onto
137 /// this worklist, all operands of a node must have already been processed.
138 SmallVector<SDNode*, 128> Worklist;
140 TableId getTableId(SDValue V) {
141 assert(V.getNode() && "Getting TableId on SDValue()");
143 auto I = ValueToIdMap.find(V);
144 if (I != ValueToIdMap.end()) {
145 // replace if there's been a shift.
146 RemapId(I->second);
147 assert(I->second && "All Ids should be nonzero");
148 return I->second;
150 // Add if it's not there.
151 ValueToIdMap.insert(std::make_pair(V, NextValueId));
152 IdToValueMap.insert(std::make_pair(NextValueId, V));
153 ++NextValueId;
154 assert(NextValueId != 0 &&
155 "Ran out of Ids. Increase id type size or add compactification");
156 return NextValueId - 1;
159 const SDValue &getSDValue(TableId &Id) {
160 RemapId(Id);
161 assert(Id && "TableId should be non-zero");
162 auto I = IdToValueMap.find(Id);
163 assert(I != IdToValueMap.end() && "cannot find Id in map");
164 return I->second;
167 public:
168 explicit DAGTypeLegalizer(SelectionDAG &dag)
169 : TLI(dag.getTargetLoweringInfo()), DAG(dag),
170 ValueTypeActions(TLI.getValueTypeActions()) {
171 static_assert(MVT::LAST_VALUETYPE <= MVT::MAX_ALLOWED_VALUETYPE,
172 "Too many value types for ValueTypeActions to hold!");
175 /// This is the main entry point for the type legalizer. This does a
176 /// top-down traversal of the dag, legalizing types as it goes. Returns
177 /// "true" if it made any changes.
178 bool run();
180 void NoteDeletion(SDNode *Old, SDNode *New) {
181 assert(Old != New && "node replaced with self");
182 for (unsigned i = 0, e = Old->getNumValues(); i != e; ++i) {
183 TableId NewId = getTableId(SDValue(New, i));
184 TableId OldId = getTableId(SDValue(Old, i));
186 if (OldId != NewId) {
187 ReplacedValues[OldId] = NewId;
189 // Delete Node from tables. We cannot do this when OldId == NewId,
190 // because NewId can still have table references to it in
191 // ReplacedValues.
192 IdToValueMap.erase(OldId);
193 PromotedIntegers.erase(OldId);
194 ExpandedIntegers.erase(OldId);
195 SoftenedFloats.erase(OldId);
196 PromotedFloats.erase(OldId);
197 SoftPromotedHalfs.erase(OldId);
198 ExpandedFloats.erase(OldId);
199 ScalarizedVectors.erase(OldId);
200 SplitVectors.erase(OldId);
201 WidenedVectors.erase(OldId);
204 ValueToIdMap.erase(SDValue(Old, i));
208 SelectionDAG &getDAG() const { return DAG; }
210 private:
211 SDNode *AnalyzeNewNode(SDNode *N);
212 void AnalyzeNewValue(SDValue &Val);
213 void PerformExpensiveChecks();
214 void RemapId(TableId &Id);
215 void RemapValue(SDValue &V);
217 // Common routines.
218 SDValue BitConvertToInteger(SDValue Op);
219 SDValue BitConvertVectorToIntegerVector(SDValue Op);
220 SDValue CreateStackStoreLoad(SDValue Op, EVT DestVT);
221 bool CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult);
222 bool CustomWidenLowerNode(SDNode *N, EVT VT);
224 /// Replace each result of the given MERGE_VALUES node with the corresponding
225 /// input operand, except for the result 'ResNo', for which the corresponding
226 /// input operand is returned.
227 SDValue DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo);
229 SDValue JoinIntegers(SDValue Lo, SDValue Hi);
231 std::pair<SDValue, SDValue> ExpandAtomic(SDNode *Node);
233 SDValue PromoteTargetBoolean(SDValue Bool, EVT ValVT);
235 void ReplaceValueWith(SDValue From, SDValue To);
236 void SplitInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
237 void SplitInteger(SDValue Op, EVT LoVT, EVT HiVT,
238 SDValue &Lo, SDValue &Hi);
240 //===--------------------------------------------------------------------===//
241 // Integer Promotion Support: LegalizeIntegerTypes.cpp
242 //===--------------------------------------------------------------------===//
244 /// Given a processed operand Op which was promoted to a larger integer type,
245 /// this returns the promoted value. The low bits of the promoted value
246 /// corresponding to the original type are exactly equal to Op.
247 /// The extra bits contain rubbish, so the promoted value may need to be zero-
248 /// or sign-extended from the original type before it is usable (the helpers
249 /// SExtPromotedInteger and ZExtPromotedInteger can do this for you).
250 /// For example, if Op is an i16 and was promoted to an i32, then this method
251 /// returns an i32, the lower 16 bits of which coincide with Op, and the upper
252 /// 16 bits of which contain rubbish.
253 SDValue GetPromotedInteger(SDValue Op) {
254 TableId &PromotedId = PromotedIntegers[getTableId(Op)];
255 SDValue PromotedOp = getSDValue(PromotedId);
256 assert(PromotedOp.getNode() && "Operand wasn't promoted?");
257 return PromotedOp;
259 void SetPromotedInteger(SDValue Op, SDValue Result);
261 /// Get a promoted operand and sign extend it to the final size.
262 SDValue SExtPromotedInteger(SDValue Op) {
263 EVT OldVT = Op.getValueType();
264 SDLoc dl(Op);
265 Op = GetPromotedInteger(Op);
266 return DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, Op.getValueType(), Op,
267 DAG.getValueType(OldVT));
270 /// Get a promoted operand and zero extend it to the final size.
271 SDValue ZExtPromotedInteger(SDValue Op) {
272 EVT OldVT = Op.getValueType();
273 SDLoc dl(Op);
274 Op = GetPromotedInteger(Op);
275 return DAG.getZeroExtendInReg(Op, dl, OldVT);
278 // Get a promoted operand and sign or zero extend it to the final size
279 // (depending on TargetLoweringInfo::isSExtCheaperThanZExt). For a given
280 // subtarget and type, the choice of sign or zero-extension will be
281 // consistent.
282 SDValue SExtOrZExtPromotedInteger(SDValue Op) {
283 EVT OldVT = Op.getValueType();
284 SDLoc DL(Op);
285 Op = GetPromotedInteger(Op);
286 if (TLI.isSExtCheaperThanZExt(OldVT, Op.getValueType()))
287 return DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, Op.getValueType(), Op,
288 DAG.getValueType(OldVT));
289 return DAG.getZeroExtendInReg(Op, DL, OldVT);
292 // Promote the given operand V (vector or scalar) according to N's specific
293 // reduction kind. N must be an integer VECREDUCE_* or VP_REDUCE_*. Returns
294 // the nominal extension opcode (ISD::(ANY|ZERO|SIGN)_EXTEND) and the
295 // promoted value.
296 SDValue PromoteIntOpVectorReduction(SDNode *N, SDValue V);
298 // Integer Result Promotion.
299 void PromoteIntegerResult(SDNode *N, unsigned ResNo);
300 SDValue PromoteIntRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
301 SDValue PromoteIntRes_AssertSext(SDNode *N);
302 SDValue PromoteIntRes_AssertZext(SDNode *N);
303 SDValue PromoteIntRes_Atomic0(AtomicSDNode *N);
304 SDValue PromoteIntRes_Atomic1(AtomicSDNode *N);
305 SDValue PromoteIntRes_AtomicCmpSwap(AtomicSDNode *N, unsigned ResNo);
306 SDValue PromoteIntRes_EXTRACT_SUBVECTOR(SDNode *N);
307 SDValue PromoteIntRes_INSERT_SUBVECTOR(SDNode *N);
308 SDValue PromoteIntRes_VECTOR_REVERSE(SDNode *N);
309 SDValue PromoteIntRes_VECTOR_SHUFFLE(SDNode *N);
310 SDValue PromoteIntRes_VECTOR_SPLICE(SDNode *N);
311 SDValue PromoteIntRes_BUILD_VECTOR(SDNode *N);
312 SDValue PromoteIntRes_SCALAR_TO_VECTOR(SDNode *N);
313 SDValue PromoteIntRes_SPLAT_VECTOR(SDNode *N);
314 SDValue PromoteIntRes_STEP_VECTOR(SDNode *N);
315 SDValue PromoteIntRes_EXTEND_VECTOR_INREG(SDNode *N);
316 SDValue PromoteIntRes_INSERT_VECTOR_ELT(SDNode *N);
317 SDValue PromoteIntRes_CONCAT_VECTORS(SDNode *N);
318 SDValue PromoteIntRes_BITCAST(SDNode *N);
319 SDValue PromoteIntRes_BSWAP(SDNode *N);
320 SDValue PromoteIntRes_BITREVERSE(SDNode *N);
321 SDValue PromoteIntRes_BUILD_PAIR(SDNode *N);
322 SDValue PromoteIntRes_Constant(SDNode *N);
323 SDValue PromoteIntRes_CTLZ(SDNode *N);
324 SDValue PromoteIntRes_CTPOP_PARITY(SDNode *N);
325 SDValue PromoteIntRes_CTTZ(SDNode *N);
326 SDValue PromoteIntRes_EXTRACT_VECTOR_ELT(SDNode *N);
327 SDValue PromoteIntRes_FP_TO_XINT(SDNode *N);
328 SDValue PromoteIntRes_FP_TO_XINT_SAT(SDNode *N);
329 SDValue PromoteIntRes_FP_TO_FP16(SDNode *N);
330 SDValue PromoteIntRes_FREEZE(SDNode *N);
331 SDValue PromoteIntRes_INT_EXTEND(SDNode *N);
332 SDValue PromoteIntRes_LOAD(LoadSDNode *N);
333 SDValue PromoteIntRes_MLOAD(MaskedLoadSDNode *N);
334 SDValue PromoteIntRes_MGATHER(MaskedGatherSDNode *N);
335 SDValue PromoteIntRes_Overflow(SDNode *N);
336 SDValue PromoteIntRes_SADDSUBO(SDNode *N, unsigned ResNo);
337 SDValue PromoteIntRes_Select(SDNode *N);
338 SDValue PromoteIntRes_SELECT_CC(SDNode *N);
339 SDValue PromoteIntRes_SETCC(SDNode *N);
340 SDValue PromoteIntRes_SHL(SDNode *N);
341 SDValue PromoteIntRes_SimpleIntBinOp(SDNode *N);
342 SDValue PromoteIntRes_ZExtIntBinOp(SDNode *N);
343 SDValue PromoteIntRes_SExtIntBinOp(SDNode *N);
344 SDValue PromoteIntRes_UMINUMAX(SDNode *N);
345 SDValue PromoteIntRes_SIGN_EXTEND_INREG(SDNode *N);
346 SDValue PromoteIntRes_SRA(SDNode *N);
347 SDValue PromoteIntRes_SRL(SDNode *N);
348 SDValue PromoteIntRes_TRUNCATE(SDNode *N);
349 SDValue PromoteIntRes_UADDSUBO(SDNode *N, unsigned ResNo);
350 SDValue PromoteIntRes_ADDSUBCARRY(SDNode *N, unsigned ResNo);
351 SDValue PromoteIntRes_SADDSUBO_CARRY(SDNode *N, unsigned ResNo);
352 SDValue PromoteIntRes_UNDEF(SDNode *N);
353 SDValue PromoteIntRes_VAARG(SDNode *N);
354 SDValue PromoteIntRes_VSCALE(SDNode *N);
355 SDValue PromoteIntRes_XMULO(SDNode *N, unsigned ResNo);
356 SDValue PromoteIntRes_ADDSUBSHLSAT(SDNode *N);
357 SDValue PromoteIntRes_MULFIX(SDNode *N);
358 SDValue PromoteIntRes_DIVFIX(SDNode *N);
359 SDValue PromoteIntRes_FLT_ROUNDS(SDNode *N);
360 SDValue PromoteIntRes_VECREDUCE(SDNode *N);
361 SDValue PromoteIntRes_VP_REDUCE(SDNode *N);
362 SDValue PromoteIntRes_ABS(SDNode *N);
363 SDValue PromoteIntRes_Rotate(SDNode *N);
364 SDValue PromoteIntRes_FunnelShift(SDNode *N);
366 // Integer Operand Promotion.
367 bool PromoteIntegerOperand(SDNode *N, unsigned OpNo);
368 SDValue PromoteIntOp_ANY_EXTEND(SDNode *N);
369 SDValue PromoteIntOp_ATOMIC_STORE(AtomicSDNode *N);
370 SDValue PromoteIntOp_BITCAST(SDNode *N);
371 SDValue PromoteIntOp_BUILD_PAIR(SDNode *N);
372 SDValue PromoteIntOp_BR_CC(SDNode *N, unsigned OpNo);
373 SDValue PromoteIntOp_BRCOND(SDNode *N, unsigned OpNo);
374 SDValue PromoteIntOp_BUILD_VECTOR(SDNode *N);
375 SDValue PromoteIntOp_INSERT_VECTOR_ELT(SDNode *N, unsigned OpNo);
376 SDValue PromoteIntOp_EXTRACT_VECTOR_ELT(SDNode *N);
377 SDValue PromoteIntOp_EXTRACT_SUBVECTOR(SDNode *N);
378 SDValue PromoteIntOp_INSERT_SUBVECTOR(SDNode *N);
379 SDValue PromoteIntOp_CONCAT_VECTORS(SDNode *N);
380 SDValue PromoteIntOp_SCALAR_TO_VECTOR(SDNode *N);
381 SDValue PromoteIntOp_SPLAT_VECTOR(SDNode *N);
382 SDValue PromoteIntOp_SELECT(SDNode *N, unsigned OpNo);
383 SDValue PromoteIntOp_SELECT_CC(SDNode *N, unsigned OpNo);
384 SDValue PromoteIntOp_SETCC(SDNode *N, unsigned OpNo);
385 SDValue PromoteIntOp_Shift(SDNode *N);
386 SDValue PromoteIntOp_SIGN_EXTEND(SDNode *N);
387 SDValue PromoteIntOp_SINT_TO_FP(SDNode *N);
388 SDValue PromoteIntOp_STRICT_SINT_TO_FP(SDNode *N);
389 SDValue PromoteIntOp_STORE(StoreSDNode *N, unsigned OpNo);
390 SDValue PromoteIntOp_TRUNCATE(SDNode *N);
391 SDValue PromoteIntOp_UINT_TO_FP(SDNode *N);
392 SDValue PromoteIntOp_STRICT_UINT_TO_FP(SDNode *N);
393 SDValue PromoteIntOp_ZERO_EXTEND(SDNode *N);
394 SDValue PromoteIntOp_MSTORE(MaskedStoreSDNode *N, unsigned OpNo);
395 SDValue PromoteIntOp_MLOAD(MaskedLoadSDNode *N, unsigned OpNo);
396 SDValue PromoteIntOp_MSCATTER(MaskedScatterSDNode *N, unsigned OpNo);
397 SDValue PromoteIntOp_MGATHER(MaskedGatherSDNode *N, unsigned OpNo);
398 SDValue PromoteIntOp_ADDSUBCARRY(SDNode *N, unsigned OpNo);
399 SDValue PromoteIntOp_FRAMERETURNADDR(SDNode *N);
400 SDValue PromoteIntOp_PREFETCH(SDNode *N, unsigned OpNo);
401 SDValue PromoteIntOp_FIX(SDNode *N);
402 SDValue PromoteIntOp_FPOWI(SDNode *N);
403 SDValue PromoteIntOp_VECREDUCE(SDNode *N);
404 SDValue PromoteIntOp_VP_REDUCE(SDNode *N, unsigned OpNo);
405 SDValue PromoteIntOp_SET_ROUNDING(SDNode *N);
407 void PromoteSetCCOperands(SDValue &LHS,SDValue &RHS, ISD::CondCode Code);
409 //===--------------------------------------------------------------------===//
410 // Integer Expansion Support: LegalizeIntegerTypes.cpp
411 //===--------------------------------------------------------------------===//
413 /// Given a processed operand Op which was expanded into two integers of half
414 /// the size, this returns the two halves. The low bits of Op are exactly
415 /// equal to the bits of Lo; the high bits exactly equal Hi.
416 /// For example, if Op is an i64 which was expanded into two i32's, then this
417 /// method returns the two i32's, with Lo being equal to the lower 32 bits of
418 /// Op, and Hi being equal to the upper 32 bits.
419 void GetExpandedInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
420 void SetExpandedInteger(SDValue Op, SDValue Lo, SDValue Hi);
422 // Integer Result Expansion.
423 void ExpandIntegerResult(SDNode *N, unsigned ResNo);
424 void ExpandIntRes_ANY_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
425 void ExpandIntRes_AssertSext (SDNode *N, SDValue &Lo, SDValue &Hi);
426 void ExpandIntRes_AssertZext (SDNode *N, SDValue &Lo, SDValue &Hi);
427 void ExpandIntRes_Constant (SDNode *N, SDValue &Lo, SDValue &Hi);
428 void ExpandIntRes_ABS (SDNode *N, SDValue &Lo, SDValue &Hi);
429 void ExpandIntRes_CTLZ (SDNode *N, SDValue &Lo, SDValue &Hi);
430 void ExpandIntRes_CTPOP (SDNode *N, SDValue &Lo, SDValue &Hi);
431 void ExpandIntRes_CTTZ (SDNode *N, SDValue &Lo, SDValue &Hi);
432 void ExpandIntRes_LOAD (LoadSDNode *N, SDValue &Lo, SDValue &Hi);
433 void ExpandIntRes_READCYCLECOUNTER (SDNode *N, SDValue &Lo, SDValue &Hi);
434 void ExpandIntRes_SIGN_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
435 void ExpandIntRes_SIGN_EXTEND_INREG (SDNode *N, SDValue &Lo, SDValue &Hi);
436 void ExpandIntRes_TRUNCATE (SDNode *N, SDValue &Lo, SDValue &Hi);
437 void ExpandIntRes_ZERO_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
438 void ExpandIntRes_FLT_ROUNDS (SDNode *N, SDValue &Lo, SDValue &Hi);
439 void ExpandIntRes_FP_TO_SINT (SDNode *N, SDValue &Lo, SDValue &Hi);
440 void ExpandIntRes_FP_TO_UINT (SDNode *N, SDValue &Lo, SDValue &Hi);
441 void ExpandIntRes_FP_TO_XINT_SAT (SDNode *N, SDValue &Lo, SDValue &Hi);
442 void ExpandIntRes_LLROUND_LLRINT (SDNode *N, SDValue &Lo, SDValue &Hi);
444 void ExpandIntRes_Logical (SDNode *N, SDValue &Lo, SDValue &Hi);
445 void ExpandIntRes_ADDSUB (SDNode *N, SDValue &Lo, SDValue &Hi);
446 void ExpandIntRes_ADDSUBC (SDNode *N, SDValue &Lo, SDValue &Hi);
447 void ExpandIntRes_ADDSUBE (SDNode *N, SDValue &Lo, SDValue &Hi);
448 void ExpandIntRes_ADDSUBCARRY (SDNode *N, SDValue &Lo, SDValue &Hi);
449 void ExpandIntRes_SADDSUBO_CARRY (SDNode *N, SDValue &Lo, SDValue &Hi);
450 void ExpandIntRes_BITREVERSE (SDNode *N, SDValue &Lo, SDValue &Hi);
451 void ExpandIntRes_BSWAP (SDNode *N, SDValue &Lo, SDValue &Hi);
452 void ExpandIntRes_PARITY (SDNode *N, SDValue &Lo, SDValue &Hi);
453 void ExpandIntRes_MUL (SDNode *N, SDValue &Lo, SDValue &Hi);
454 void ExpandIntRes_SDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
455 void ExpandIntRes_SREM (SDNode *N, SDValue &Lo, SDValue &Hi);
456 void ExpandIntRes_UDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
457 void ExpandIntRes_UREM (SDNode *N, SDValue &Lo, SDValue &Hi);
458 void ExpandIntRes_Shift (SDNode *N, SDValue &Lo, SDValue &Hi);
460 void ExpandIntRes_MINMAX (SDNode *N, SDValue &Lo, SDValue &Hi);
462 void ExpandIntRes_SADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi);
463 void ExpandIntRes_UADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi);
464 void ExpandIntRes_XMULO (SDNode *N, SDValue &Lo, SDValue &Hi);
465 void ExpandIntRes_ADDSUBSAT (SDNode *N, SDValue &Lo, SDValue &Hi);
466 void ExpandIntRes_SHLSAT (SDNode *N, SDValue &Lo, SDValue &Hi);
467 void ExpandIntRes_MULFIX (SDNode *N, SDValue &Lo, SDValue &Hi);
468 void ExpandIntRes_DIVFIX (SDNode *N, SDValue &Lo, SDValue &Hi);
470 void ExpandIntRes_ATOMIC_LOAD (SDNode *N, SDValue &Lo, SDValue &Hi);
471 void ExpandIntRes_VECREDUCE (SDNode *N, SDValue &Lo, SDValue &Hi);
473 void ExpandIntRes_Rotate (SDNode *N, SDValue &Lo, SDValue &Hi);
474 void ExpandIntRes_FunnelShift (SDNode *N, SDValue &Lo, SDValue &Hi);
476 void ExpandIntRes_VSCALE (SDNode *N, SDValue &Lo, SDValue &Hi);
478 void ExpandShiftByConstant(SDNode *N, const APInt &Amt,
479 SDValue &Lo, SDValue &Hi);
480 bool ExpandShiftWithKnownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi);
481 bool ExpandShiftWithUnknownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi);
483 // Integer Operand Expansion.
484 bool ExpandIntegerOperand(SDNode *N, unsigned OpNo);
485 SDValue ExpandIntOp_BR_CC(SDNode *N);
486 SDValue ExpandIntOp_SELECT_CC(SDNode *N);
487 SDValue ExpandIntOp_SETCC(SDNode *N);
488 SDValue ExpandIntOp_SETCCCARRY(SDNode *N);
489 SDValue ExpandIntOp_Shift(SDNode *N);
490 SDValue ExpandIntOp_SINT_TO_FP(SDNode *N);
491 SDValue ExpandIntOp_STORE(StoreSDNode *N, unsigned OpNo);
492 SDValue ExpandIntOp_TRUNCATE(SDNode *N);
493 SDValue ExpandIntOp_UINT_TO_FP(SDNode *N);
494 SDValue ExpandIntOp_RETURNADDR(SDNode *N);
495 SDValue ExpandIntOp_ATOMIC_STORE(SDNode *N);
496 SDValue ExpandIntOp_SPLAT_VECTOR(SDNode *N);
498 void IntegerExpandSetCCOperands(SDValue &NewLHS, SDValue &NewRHS,
499 ISD::CondCode &CCCode, const SDLoc &dl);
501 //===--------------------------------------------------------------------===//
502 // Float to Integer Conversion Support: LegalizeFloatTypes.cpp
503 //===--------------------------------------------------------------------===//
505 /// GetSoftenedFloat - Given a processed operand Op which was converted to an
506 /// integer of the same size, this returns the integer. The integer contains
507 /// exactly the same bits as Op - only the type changed. For example, if Op
508 /// is an f32 which was softened to an i32, then this method returns an i32,
509 /// the bits of which coincide with those of Op
510 SDValue GetSoftenedFloat(SDValue Op) {
511 TableId Id = getTableId(Op);
512 auto Iter = SoftenedFloats.find(Id);
513 if (Iter == SoftenedFloats.end()) {
514 assert(isSimpleLegalType(Op.getValueType()) &&
515 "Operand wasn't converted to integer?");
516 return Op;
518 SDValue SoftenedOp = getSDValue(Iter->second);
519 assert(SoftenedOp.getNode() && "Unconverted op in SoftenedFloats?");
520 return SoftenedOp;
522 void SetSoftenedFloat(SDValue Op, SDValue Result);
524 // Convert Float Results to Integer.
525 void SoftenFloatResult(SDNode *N, unsigned ResNo);
526 SDValue SoftenFloatRes_Unary(SDNode *N, RTLIB::Libcall LC);
527 SDValue SoftenFloatRes_Binary(SDNode *N, RTLIB::Libcall LC);
528 SDValue SoftenFloatRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
529 SDValue SoftenFloatRes_ARITH_FENCE(SDNode *N);
530 SDValue SoftenFloatRes_BITCAST(SDNode *N);
531 SDValue SoftenFloatRes_BUILD_PAIR(SDNode *N);
532 SDValue SoftenFloatRes_ConstantFP(SDNode *N);
533 SDValue SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N, unsigned ResNo);
534 SDValue SoftenFloatRes_FABS(SDNode *N);
535 SDValue SoftenFloatRes_FMINNUM(SDNode *N);
536 SDValue SoftenFloatRes_FMAXNUM(SDNode *N);
537 SDValue SoftenFloatRes_FADD(SDNode *N);
538 SDValue SoftenFloatRes_FCBRT(SDNode *N);
539 SDValue SoftenFloatRes_FCEIL(SDNode *N);
540 SDValue SoftenFloatRes_FCOPYSIGN(SDNode *N);
541 SDValue SoftenFloatRes_FCOS(SDNode *N);
542 SDValue SoftenFloatRes_FDIV(SDNode *N);
543 SDValue SoftenFloatRes_FEXP(SDNode *N);
544 SDValue SoftenFloatRes_FEXP2(SDNode *N);
545 SDValue SoftenFloatRes_FFLOOR(SDNode *N);
546 SDValue SoftenFloatRes_FLOG(SDNode *N);
547 SDValue SoftenFloatRes_FLOG2(SDNode *N);
548 SDValue SoftenFloatRes_FLOG10(SDNode *N);
549 SDValue SoftenFloatRes_FMA(SDNode *N);
550 SDValue SoftenFloatRes_FMUL(SDNode *N);
551 SDValue SoftenFloatRes_FNEARBYINT(SDNode *N);
552 SDValue SoftenFloatRes_FNEG(SDNode *N);
553 SDValue SoftenFloatRes_FP_EXTEND(SDNode *N);
554 SDValue SoftenFloatRes_FP16_TO_FP(SDNode *N);
555 SDValue SoftenFloatRes_FP_ROUND(SDNode *N);
556 SDValue SoftenFloatRes_FPOW(SDNode *N);
557 SDValue SoftenFloatRes_FPOWI(SDNode *N);
558 SDValue SoftenFloatRes_FREEZE(SDNode *N);
559 SDValue SoftenFloatRes_FREM(SDNode *N);
560 SDValue SoftenFloatRes_FRINT(SDNode *N);
561 SDValue SoftenFloatRes_FROUND(SDNode *N);
562 SDValue SoftenFloatRes_FROUNDEVEN(SDNode *N);
563 SDValue SoftenFloatRes_FSIN(SDNode *N);
564 SDValue SoftenFloatRes_FSQRT(SDNode *N);
565 SDValue SoftenFloatRes_FSUB(SDNode *N);
566 SDValue SoftenFloatRes_FTRUNC(SDNode *N);
567 SDValue SoftenFloatRes_LOAD(SDNode *N);
568 SDValue SoftenFloatRes_SELECT(SDNode *N);
569 SDValue SoftenFloatRes_SELECT_CC(SDNode *N);
570 SDValue SoftenFloatRes_UNDEF(SDNode *N);
571 SDValue SoftenFloatRes_VAARG(SDNode *N);
572 SDValue SoftenFloatRes_XINT_TO_FP(SDNode *N);
573 SDValue SoftenFloatRes_VECREDUCE(SDNode *N);
574 SDValue SoftenFloatRes_VECREDUCE_SEQ(SDNode *N);
576 // Convert Float Operand to Integer.
577 bool SoftenFloatOperand(SDNode *N, unsigned OpNo);
578 SDValue SoftenFloatOp_Unary(SDNode *N, RTLIB::Libcall LC);
579 SDValue SoftenFloatOp_BITCAST(SDNode *N);
580 SDValue SoftenFloatOp_BR_CC(SDNode *N);
581 SDValue SoftenFloatOp_FP_ROUND(SDNode *N);
582 SDValue SoftenFloatOp_FP_TO_XINT(SDNode *N);
583 SDValue SoftenFloatOp_FP_TO_XINT_SAT(SDNode *N);
584 SDValue SoftenFloatOp_LROUND(SDNode *N);
585 SDValue SoftenFloatOp_LLROUND(SDNode *N);
586 SDValue SoftenFloatOp_LRINT(SDNode *N);
587 SDValue SoftenFloatOp_LLRINT(SDNode *N);
588 SDValue SoftenFloatOp_SELECT_CC(SDNode *N);
589 SDValue SoftenFloatOp_SETCC(SDNode *N);
590 SDValue SoftenFloatOp_STORE(SDNode *N, unsigned OpNo);
591 SDValue SoftenFloatOp_FCOPYSIGN(SDNode *N);
593 //===--------------------------------------------------------------------===//
594 // Float Expansion Support: LegalizeFloatTypes.cpp
595 //===--------------------------------------------------------------------===//
597 /// Given a processed operand Op which was expanded into two floating-point
598 /// values of half the size, this returns the two halves.
599 /// The low bits of Op are exactly equal to the bits of Lo; the high bits
600 /// exactly equal Hi. For example, if Op is a ppcf128 which was expanded
601 /// into two f64's, then this method returns the two f64's, with Lo being
602 /// equal to the lower 64 bits of Op, and Hi to the upper 64 bits.
603 void GetExpandedFloat(SDValue Op, SDValue &Lo, SDValue &Hi);
604 void SetExpandedFloat(SDValue Op, SDValue Lo, SDValue Hi);
606 // Float Result Expansion.
607 void ExpandFloatResult(SDNode *N, unsigned ResNo);
608 void ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo, SDValue &Hi);
609 void ExpandFloatRes_Unary(SDNode *N, RTLIB::Libcall LC,
610 SDValue &Lo, SDValue &Hi);
611 void ExpandFloatRes_Binary(SDNode *N, RTLIB::Libcall LC,
612 SDValue &Lo, SDValue &Hi);
613 void ExpandFloatRes_FABS (SDNode *N, SDValue &Lo, SDValue &Hi);
614 void ExpandFloatRes_FMINNUM (SDNode *N, SDValue &Lo, SDValue &Hi);
615 void ExpandFloatRes_FMAXNUM (SDNode *N, SDValue &Lo, SDValue &Hi);
616 void ExpandFloatRes_FADD (SDNode *N, SDValue &Lo, SDValue &Hi);
617 void ExpandFloatRes_FCBRT (SDNode *N, SDValue &Lo, SDValue &Hi);
618 void ExpandFloatRes_FCEIL (SDNode *N, SDValue &Lo, SDValue &Hi);
619 void ExpandFloatRes_FCOPYSIGN (SDNode *N, SDValue &Lo, SDValue &Hi);
620 void ExpandFloatRes_FCOS (SDNode *N, SDValue &Lo, SDValue &Hi);
621 void ExpandFloatRes_FDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
622 void ExpandFloatRes_FEXP (SDNode *N, SDValue &Lo, SDValue &Hi);
623 void ExpandFloatRes_FEXP2 (SDNode *N, SDValue &Lo, SDValue &Hi);
624 void ExpandFloatRes_FFLOOR (SDNode *N, SDValue &Lo, SDValue &Hi);
625 void ExpandFloatRes_FLOG (SDNode *N, SDValue &Lo, SDValue &Hi);
626 void ExpandFloatRes_FLOG2 (SDNode *N, SDValue &Lo, SDValue &Hi);
627 void ExpandFloatRes_FLOG10 (SDNode *N, SDValue &Lo, SDValue &Hi);
628 void ExpandFloatRes_FMA (SDNode *N, SDValue &Lo, SDValue &Hi);
629 void ExpandFloatRes_FMUL (SDNode *N, SDValue &Lo, SDValue &Hi);
630 void ExpandFloatRes_FNEARBYINT(SDNode *N, SDValue &Lo, SDValue &Hi);
631 void ExpandFloatRes_FNEG (SDNode *N, SDValue &Lo, SDValue &Hi);
632 void ExpandFloatRes_FP_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
633 void ExpandFloatRes_FPOW (SDNode *N, SDValue &Lo, SDValue &Hi);
634 void ExpandFloatRes_FPOWI (SDNode *N, SDValue &Lo, SDValue &Hi);
635 void ExpandFloatRes_FREEZE (SDNode *N, SDValue &Lo, SDValue &Hi);
636 void ExpandFloatRes_FREM (SDNode *N, SDValue &Lo, SDValue &Hi);
637 void ExpandFloatRes_FRINT (SDNode *N, SDValue &Lo, SDValue &Hi);
638 void ExpandFloatRes_FROUND (SDNode *N, SDValue &Lo, SDValue &Hi);
639 void ExpandFloatRes_FROUNDEVEN(SDNode *N, SDValue &Lo, SDValue &Hi);
640 void ExpandFloatRes_FSIN (SDNode *N, SDValue &Lo, SDValue &Hi);
641 void ExpandFloatRes_FSQRT (SDNode *N, SDValue &Lo, SDValue &Hi);
642 void ExpandFloatRes_FSUB (SDNode *N, SDValue &Lo, SDValue &Hi);
643 void ExpandFloatRes_FTRUNC (SDNode *N, SDValue &Lo, SDValue &Hi);
644 void ExpandFloatRes_LOAD (SDNode *N, SDValue &Lo, SDValue &Hi);
645 void ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo, SDValue &Hi);
647 // Float Operand Expansion.
648 bool ExpandFloatOperand(SDNode *N, unsigned OpNo);
649 SDValue ExpandFloatOp_BR_CC(SDNode *N);
650 SDValue ExpandFloatOp_FCOPYSIGN(SDNode *N);
651 SDValue ExpandFloatOp_FP_ROUND(SDNode *N);
652 SDValue ExpandFloatOp_FP_TO_XINT(SDNode *N);
653 SDValue ExpandFloatOp_LROUND(SDNode *N);
654 SDValue ExpandFloatOp_LLROUND(SDNode *N);
655 SDValue ExpandFloatOp_LRINT(SDNode *N);
656 SDValue ExpandFloatOp_LLRINT(SDNode *N);
657 SDValue ExpandFloatOp_SELECT_CC(SDNode *N);
658 SDValue ExpandFloatOp_SETCC(SDNode *N);
659 SDValue ExpandFloatOp_STORE(SDNode *N, unsigned OpNo);
661 void FloatExpandSetCCOperands(SDValue &NewLHS, SDValue &NewRHS,
662 ISD::CondCode &CCCode, const SDLoc &dl,
663 SDValue &Chain, bool IsSignaling = false);
665 //===--------------------------------------------------------------------===//
666 // Float promotion support: LegalizeFloatTypes.cpp
667 //===--------------------------------------------------------------------===//
669 SDValue GetPromotedFloat(SDValue Op) {
670 TableId &PromotedId = PromotedFloats[getTableId(Op)];
671 SDValue PromotedOp = getSDValue(PromotedId);
672 assert(PromotedOp.getNode() && "Operand wasn't promoted?");
673 return PromotedOp;
675 void SetPromotedFloat(SDValue Op, SDValue Result);
677 void PromoteFloatResult(SDNode *N, unsigned ResNo);
678 SDValue PromoteFloatRes_BITCAST(SDNode *N);
679 SDValue PromoteFloatRes_BinOp(SDNode *N);
680 SDValue PromoteFloatRes_ConstantFP(SDNode *N);
681 SDValue PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode *N);
682 SDValue PromoteFloatRes_FCOPYSIGN(SDNode *N);
683 SDValue PromoteFloatRes_FMAD(SDNode *N);
684 SDValue PromoteFloatRes_FPOWI(SDNode *N);
685 SDValue PromoteFloatRes_FP_ROUND(SDNode *N);
686 SDValue PromoteFloatRes_LOAD(SDNode *N);
687 SDValue PromoteFloatRes_SELECT(SDNode *N);
688 SDValue PromoteFloatRes_SELECT_CC(SDNode *N);
689 SDValue PromoteFloatRes_UnaryOp(SDNode *N);
690 SDValue PromoteFloatRes_UNDEF(SDNode *N);
691 SDValue BitcastToInt_ATOMIC_SWAP(SDNode *N);
692 SDValue PromoteFloatRes_XINT_TO_FP(SDNode *N);
693 SDValue PromoteFloatRes_VECREDUCE(SDNode *N);
694 SDValue PromoteFloatRes_VECREDUCE_SEQ(SDNode *N);
696 bool PromoteFloatOperand(SDNode *N, unsigned OpNo);
697 SDValue PromoteFloatOp_BITCAST(SDNode *N, unsigned OpNo);
698 SDValue PromoteFloatOp_FCOPYSIGN(SDNode *N, unsigned OpNo);
699 SDValue PromoteFloatOp_FP_EXTEND(SDNode *N, unsigned OpNo);
700 SDValue PromoteFloatOp_FP_TO_XINT(SDNode *N, unsigned OpNo);
701 SDValue PromoteFloatOp_FP_TO_XINT_SAT(SDNode *N, unsigned OpNo);
702 SDValue PromoteFloatOp_STORE(SDNode *N, unsigned OpNo);
703 SDValue PromoteFloatOp_SELECT_CC(SDNode *N, unsigned OpNo);
704 SDValue PromoteFloatOp_SETCC(SDNode *N, unsigned OpNo);
706 //===--------------------------------------------------------------------===//
707 // Half soft promotion support: LegalizeFloatTypes.cpp
708 //===--------------------------------------------------------------------===//
710 SDValue GetSoftPromotedHalf(SDValue Op) {
711 TableId &PromotedId = SoftPromotedHalfs[getTableId(Op)];
712 SDValue PromotedOp = getSDValue(PromotedId);
713 assert(PromotedOp.getNode() && "Operand wasn't promoted?");
714 return PromotedOp;
716 void SetSoftPromotedHalf(SDValue Op, SDValue Result);
718 void SoftPromoteHalfResult(SDNode *N, unsigned ResNo);
719 SDValue SoftPromoteHalfRes_BinOp(SDNode *N);
720 SDValue SoftPromoteHalfRes_BITCAST(SDNode *N);
721 SDValue SoftPromoteHalfRes_ConstantFP(SDNode *N);
722 SDValue SoftPromoteHalfRes_EXTRACT_VECTOR_ELT(SDNode *N);
723 SDValue SoftPromoteHalfRes_FCOPYSIGN(SDNode *N);
724 SDValue SoftPromoteHalfRes_FMAD(SDNode *N);
725 SDValue SoftPromoteHalfRes_FPOWI(SDNode *N);
726 SDValue SoftPromoteHalfRes_FP_ROUND(SDNode *N);
727 SDValue SoftPromoteHalfRes_LOAD(SDNode *N);
728 SDValue SoftPromoteHalfRes_SELECT(SDNode *N);
729 SDValue SoftPromoteHalfRes_SELECT_CC(SDNode *N);
730 SDValue SoftPromoteHalfRes_UnaryOp(SDNode *N);
731 SDValue SoftPromoteHalfRes_XINT_TO_FP(SDNode *N);
732 SDValue SoftPromoteHalfRes_UNDEF(SDNode *N);
733 SDValue SoftPromoteHalfRes_VECREDUCE(SDNode *N);
734 SDValue SoftPromoteHalfRes_VECREDUCE_SEQ(SDNode *N);
736 bool SoftPromoteHalfOperand(SDNode *N, unsigned OpNo);
737 SDValue SoftPromoteHalfOp_BITCAST(SDNode *N);
738 SDValue SoftPromoteHalfOp_FCOPYSIGN(SDNode *N, unsigned OpNo);
739 SDValue SoftPromoteHalfOp_FP_EXTEND(SDNode *N);
740 SDValue SoftPromoteHalfOp_FP_TO_XINT(SDNode *N);
741 SDValue SoftPromoteHalfOp_FP_TO_XINT_SAT(SDNode *N);
742 SDValue SoftPromoteHalfOp_SETCC(SDNode *N);
743 SDValue SoftPromoteHalfOp_SELECT_CC(SDNode *N, unsigned OpNo);
744 SDValue SoftPromoteHalfOp_STORE(SDNode *N, unsigned OpNo);
746 //===--------------------------------------------------------------------===//
747 // Scalarization Support: LegalizeVectorTypes.cpp
748 //===--------------------------------------------------------------------===//
750 /// Given a processed one-element vector Op which was scalarized to its
751 /// element type, this returns the element. For example, if Op is a v1i32,
752 /// Op = < i32 val >, this method returns val, an i32.
753 SDValue GetScalarizedVector(SDValue Op) {
754 TableId &ScalarizedId = ScalarizedVectors[getTableId(Op)];
755 SDValue ScalarizedOp = getSDValue(ScalarizedId);
756 assert(ScalarizedOp.getNode() && "Operand wasn't scalarized?");
757 return ScalarizedOp;
759 void SetScalarizedVector(SDValue Op, SDValue Result);
761 // Vector Result Scalarization: <1 x ty> -> ty.
762 void ScalarizeVectorResult(SDNode *N, unsigned ResNo);
763 SDValue ScalarizeVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
764 SDValue ScalarizeVecRes_BinOp(SDNode *N);
765 SDValue ScalarizeVecRes_TernaryOp(SDNode *N);
766 SDValue ScalarizeVecRes_UnaryOp(SDNode *N);
767 SDValue ScalarizeVecRes_StrictFPOp(SDNode *N);
768 SDValue ScalarizeVecRes_OverflowOp(SDNode *N, unsigned ResNo);
769 SDValue ScalarizeVecRes_InregOp(SDNode *N);
770 SDValue ScalarizeVecRes_VecInregOp(SDNode *N);
772 SDValue ScalarizeVecRes_BITCAST(SDNode *N);
773 SDValue ScalarizeVecRes_BUILD_VECTOR(SDNode *N);
774 SDValue ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N);
775 SDValue ScalarizeVecRes_FP_ROUND(SDNode *N);
776 SDValue ScalarizeVecRes_FPOWI(SDNode *N);
777 SDValue ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N);
778 SDValue ScalarizeVecRes_LOAD(LoadSDNode *N);
779 SDValue ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N);
780 SDValue ScalarizeVecRes_VSELECT(SDNode *N);
781 SDValue ScalarizeVecRes_SELECT(SDNode *N);
782 SDValue ScalarizeVecRes_SELECT_CC(SDNode *N);
783 SDValue ScalarizeVecRes_SETCC(SDNode *N);
784 SDValue ScalarizeVecRes_UNDEF(SDNode *N);
785 SDValue ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N);
786 SDValue ScalarizeVecRes_FP_TO_XINT_SAT(SDNode *N);
788 SDValue ScalarizeVecRes_FIX(SDNode *N);
790 // Vector Operand Scalarization: <1 x ty> -> ty.
791 bool ScalarizeVectorOperand(SDNode *N, unsigned OpNo);
792 SDValue ScalarizeVecOp_BITCAST(SDNode *N);
793 SDValue ScalarizeVecOp_UnaryOp(SDNode *N);
794 SDValue ScalarizeVecOp_UnaryOp_StrictFP(SDNode *N);
795 SDValue ScalarizeVecOp_CONCAT_VECTORS(SDNode *N);
796 SDValue ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
797 SDValue ScalarizeVecOp_VSELECT(SDNode *N);
798 SDValue ScalarizeVecOp_VSETCC(SDNode *N);
799 SDValue ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo);
800 SDValue ScalarizeVecOp_FP_ROUND(SDNode *N, unsigned OpNo);
801 SDValue ScalarizeVecOp_STRICT_FP_ROUND(SDNode *N, unsigned OpNo);
802 SDValue ScalarizeVecOp_FP_EXTEND(SDNode *N);
803 SDValue ScalarizeVecOp_STRICT_FP_EXTEND(SDNode *N);
804 SDValue ScalarizeVecOp_VECREDUCE(SDNode *N);
805 SDValue ScalarizeVecOp_VECREDUCE_SEQ(SDNode *N);
807 //===--------------------------------------------------------------------===//
808 // Vector Splitting Support: LegalizeVectorTypes.cpp
809 //===--------------------------------------------------------------------===//
811 /// Given a processed vector Op which was split into vectors of half the size,
812 /// this method returns the halves. The first elements of Op coincide with the
813 /// elements of Lo; the remaining elements of Op coincide with the elements of
814 /// Hi: Op is what you would get by concatenating Lo and Hi.
815 /// For example, if Op is a v8i32 that was split into two v4i32's, then this
816 /// method returns the two v4i32's, with Lo corresponding to the first 4
817 /// elements of Op, and Hi to the last 4 elements.
818 void GetSplitVector(SDValue Op, SDValue &Lo, SDValue &Hi);
819 void SetSplitVector(SDValue Op, SDValue Lo, SDValue Hi);
821 /// Split mask operator of a VP intrinsic.
822 std::pair<SDValue, SDValue> SplitMask(SDValue Mask);
824 // Helper function for incrementing the pointer when splitting
825 // memory operations
826 void IncrementPointer(MemSDNode *N, EVT MemVT, MachinePointerInfo &MPI,
827 SDValue &Ptr, uint64_t *ScaledOffset = nullptr);
829 // Vector Result Splitting: <128 x ty> -> 2 x <64 x ty>.
830 void SplitVectorResult(SDNode *N, unsigned ResNo);
831 void SplitVecRes_BinOp(SDNode *N, SDValue &Lo, SDValue &Hi);
832 void SplitVecRes_TernaryOp(SDNode *N, SDValue &Lo, SDValue &Hi);
833 void SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo, SDValue &Hi);
834 void SplitVecRes_ExtendOp(SDNode *N, SDValue &Lo, SDValue &Hi);
835 void SplitVecRes_InregOp(SDNode *N, SDValue &Lo, SDValue &Hi);
836 void SplitVecRes_ExtVecInRegOp(SDNode *N, SDValue &Lo, SDValue &Hi);
837 void SplitVecRes_StrictFPOp(SDNode *N, SDValue &Lo, SDValue &Hi);
838 void SplitVecRes_OverflowOp(SDNode *N, unsigned ResNo,
839 SDValue &Lo, SDValue &Hi);
841 void SplitVecRes_FIX(SDNode *N, SDValue &Lo, SDValue &Hi);
843 void SplitVecRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi);
844 void SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
845 void SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo, SDValue &Hi);
846 void SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
847 void SplitVecRes_INSERT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
848 void SplitVecRes_FPOWI(SDNode *N, SDValue &Lo, SDValue &Hi);
849 void SplitVecRes_FCOPYSIGN(SDNode *N, SDValue &Lo, SDValue &Hi);
850 void SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi);
851 void SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo, SDValue &Hi);
852 void SplitVecRes_VP_LOAD(VPLoadSDNode *LD, SDValue &Lo, SDValue &Hi);
853 void SplitVecRes_MLOAD(MaskedLoadSDNode *MLD, SDValue &Lo, SDValue &Hi);
854 void SplitVecRes_MGATHER(MaskedGatherSDNode *MGT, SDValue &Lo, SDValue &Hi);
855 void SplitVecRes_ScalarOp(SDNode *N, SDValue &Lo, SDValue &Hi);
856 void SplitVecRes_STEP_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
857 void SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi);
858 void SplitVecRes_VECTOR_REVERSE(SDNode *N, SDValue &Lo, SDValue &Hi);
859 void SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N, SDValue &Lo,
860 SDValue &Hi);
861 void SplitVecRes_VECTOR_SPLICE(SDNode *N, SDValue &Lo, SDValue &Hi);
862 void SplitVecRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi);
863 void SplitVecRes_FP_TO_XINT_SAT(SDNode *N, SDValue &Lo, SDValue &Hi);
865 // Vector Operand Splitting: <128 x ty> -> 2 x <64 x ty>.
866 bool SplitVectorOperand(SDNode *N, unsigned OpNo);
867 SDValue SplitVecOp_VSELECT(SDNode *N, unsigned OpNo);
868 SDValue SplitVecOp_VECREDUCE(SDNode *N, unsigned OpNo);
869 SDValue SplitVecOp_VECREDUCE_SEQ(SDNode *N);
870 SDValue SplitVecOp_VP_REDUCE(SDNode *N, unsigned OpNo);
871 SDValue SplitVecOp_UnaryOp(SDNode *N);
872 SDValue SplitVecOp_TruncateHelper(SDNode *N);
874 SDValue SplitVecOp_BITCAST(SDNode *N);
875 SDValue SplitVecOp_INSERT_SUBVECTOR(SDNode *N, unsigned OpNo);
876 SDValue SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N);
877 SDValue SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
878 SDValue SplitVecOp_ExtVecInRegOp(SDNode *N);
879 SDValue SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo);
880 SDValue SplitVecOp_VP_STORE(VPStoreSDNode *N, unsigned OpNo);
881 SDValue SplitVecOp_MSTORE(MaskedStoreSDNode *N, unsigned OpNo);
882 SDValue SplitVecOp_MSCATTER(MaskedScatterSDNode *N, unsigned OpNo);
883 SDValue SplitVecOp_MGATHER(MaskedGatherSDNode *MGT, unsigned OpNo);
884 SDValue SplitVecOp_CONCAT_VECTORS(SDNode *N);
885 SDValue SplitVecOp_VSETCC(SDNode *N);
886 SDValue SplitVecOp_FP_ROUND(SDNode *N);
887 SDValue SplitVecOp_FCOPYSIGN(SDNode *N);
888 SDValue SplitVecOp_FP_TO_XINT_SAT(SDNode *N);
890 //===--------------------------------------------------------------------===//
891 // Vector Widening Support: LegalizeVectorTypes.cpp
892 //===--------------------------------------------------------------------===//
894 /// Given a processed vector Op which was widened into a larger vector, this
895 /// method returns the larger vector. The elements of the returned vector
896 /// consist of the elements of Op followed by elements containing rubbish.
897 /// For example, if Op is a v2i32 that was widened to a v4i32, then this
898 /// method returns a v4i32 for which the first two elements are the same as
899 /// those of Op, while the last two elements contain rubbish.
900 SDValue GetWidenedVector(SDValue Op) {
901 TableId &WidenedId = WidenedVectors[getTableId(Op)];
902 SDValue WidenedOp = getSDValue(WidenedId);
903 assert(WidenedOp.getNode() && "Operand wasn't widened?");
904 return WidenedOp;
906 void SetWidenedVector(SDValue Op, SDValue Result);
908 /// Given a mask Mask, returns the larger vector into which Mask was widened.
909 SDValue GetWidenedMask(SDValue Mask, ElementCount EC) {
910 // For VP operations, we must also widen the mask. Note that the mask type
911 // may not actually need widening, leading it be split along with the VP
912 // operation.
913 // FIXME: This could lead to an infinite split/widen loop. We only handle
914 // the case where the mask needs widening to an identically-sized type as
915 // the vector inputs.
916 assert(getTypeAction(Mask.getValueType()) ==
917 TargetLowering::TypeWidenVector &&
918 "Unable to widen binary VP op");
919 Mask = GetWidenedVector(Mask);
920 assert(Mask.getValueType().getVectorElementCount() == EC &&
921 "Unable to widen binary VP op");
922 return Mask;
925 // Widen Vector Result Promotion.
926 void WidenVectorResult(SDNode *N, unsigned ResNo);
927 SDValue WidenVecRes_MERGE_VALUES(SDNode* N, unsigned ResNo);
928 SDValue WidenVecRes_BITCAST(SDNode* N);
929 SDValue WidenVecRes_BUILD_VECTOR(SDNode* N);
930 SDValue WidenVecRes_CONCAT_VECTORS(SDNode* N);
931 SDValue WidenVecRes_EXTEND_VECTOR_INREG(SDNode* N);
932 SDValue WidenVecRes_EXTRACT_SUBVECTOR(SDNode* N);
933 SDValue WidenVecRes_INSERT_SUBVECTOR(SDNode *N);
934 SDValue WidenVecRes_INSERT_VECTOR_ELT(SDNode* N);
935 SDValue WidenVecRes_LOAD(SDNode* N);
936 SDValue WidenVecRes_VP_LOAD(VPLoadSDNode *N);
937 SDValue WidenVecRes_MLOAD(MaskedLoadSDNode* N);
938 SDValue WidenVecRes_MGATHER(MaskedGatherSDNode* N);
939 SDValue WidenVecRes_ScalarOp(SDNode* N);
940 SDValue WidenVecRes_Select(SDNode *N);
941 SDValue WidenVSELECTMask(SDNode *N);
942 SDValue WidenVecRes_SELECT_CC(SDNode* N);
943 SDValue WidenVecRes_SETCC(SDNode* N);
944 SDValue WidenVecRes_STRICT_FSETCC(SDNode* N);
945 SDValue WidenVecRes_UNDEF(SDNode *N);
946 SDValue WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N);
948 SDValue WidenVecRes_Ternary(SDNode *N);
949 SDValue WidenVecRes_Binary(SDNode *N);
950 SDValue WidenVecRes_BinaryCanTrap(SDNode *N);
951 SDValue WidenVecRes_BinaryWithExtraScalarOp(SDNode *N);
952 SDValue WidenVecRes_StrictFP(SDNode *N);
953 SDValue WidenVecRes_OverflowOp(SDNode *N, unsigned ResNo);
954 SDValue WidenVecRes_Convert(SDNode *N);
955 SDValue WidenVecRes_Convert_StrictFP(SDNode *N);
956 SDValue WidenVecRes_FP_TO_XINT_SAT(SDNode *N);
957 SDValue WidenVecRes_FCOPYSIGN(SDNode *N);
958 SDValue WidenVecRes_POWI(SDNode *N);
959 SDValue WidenVecRes_Unary(SDNode *N);
960 SDValue WidenVecRes_InregOp(SDNode *N);
962 // Widen Vector Operand.
963 bool WidenVectorOperand(SDNode *N, unsigned OpNo);
964 SDValue WidenVecOp_BITCAST(SDNode *N);
965 SDValue WidenVecOp_CONCAT_VECTORS(SDNode *N);
966 SDValue WidenVecOp_EXTEND(SDNode *N);
967 SDValue WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
968 SDValue WidenVecOp_INSERT_SUBVECTOR(SDNode *N);
969 SDValue WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N);
970 SDValue WidenVecOp_STORE(SDNode* N);
971 SDValue WidenVecOp_VP_STORE(SDNode *N, unsigned OpNo);
972 SDValue WidenVecOp_MSTORE(SDNode* N, unsigned OpNo);
973 SDValue WidenVecOp_MGATHER(SDNode* N, unsigned OpNo);
974 SDValue WidenVecOp_MSCATTER(SDNode* N, unsigned OpNo);
975 SDValue WidenVecOp_SETCC(SDNode* N);
976 SDValue WidenVecOp_STRICT_FSETCC(SDNode* N);
977 SDValue WidenVecOp_VSELECT(SDNode *N);
979 SDValue WidenVecOp_Convert(SDNode *N);
980 SDValue WidenVecOp_FP_TO_XINT_SAT(SDNode *N);
981 SDValue WidenVecOp_FCOPYSIGN(SDNode *N);
982 SDValue WidenVecOp_VECREDUCE(SDNode *N);
983 SDValue WidenVecOp_VECREDUCE_SEQ(SDNode *N);
984 SDValue WidenVecOp_VP_REDUCE(SDNode *N);
986 /// Helper function to generate a set of operations to perform
987 /// a vector operation for a wider type.
989 SDValue UnrollVectorOp_StrictFP(SDNode *N, unsigned ResNE);
991 //===--------------------------------------------------------------------===//
992 // Vector Widening Utilities Support: LegalizeVectorTypes.cpp
993 //===--------------------------------------------------------------------===//
995 /// Helper function to generate a set of loads to load a vector with a
996 /// resulting wider type. It takes:
997 /// LdChain: list of chains for the load to be generated.
998 /// Ld: load to widen
999 SDValue GenWidenVectorLoads(SmallVectorImpl<SDValue> &LdChain,
1000 LoadSDNode *LD);
1002 /// Helper function to generate a set of extension loads to load a vector with
1003 /// a resulting wider type. It takes:
1004 /// LdChain: list of chains for the load to be generated.
1005 /// Ld: load to widen
1006 /// ExtType: extension element type
1007 SDValue GenWidenVectorExtLoads(SmallVectorImpl<SDValue> &LdChain,
1008 LoadSDNode *LD, ISD::LoadExtType ExtType);
1010 /// Helper function to generate a set of stores to store a widen vector into
1011 /// non-widen memory. Returns true if successful, false otherwise.
1012 /// StChain: list of chains for the stores we have generated
1013 /// ST: store of a widen value
1014 bool GenWidenVectorStores(SmallVectorImpl<SDValue> &StChain, StoreSDNode *ST);
1016 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
1017 /// input vector must have the same element type as NVT.
1018 /// When FillWithZeroes is "on" the vector will be widened with zeroes.
1019 /// By default, the vector will be widened with undefined values.
1020 SDValue ModifyToType(SDValue InOp, EVT NVT, bool FillWithZeroes = false);
1022 /// Return a mask of vector type MaskVT to replace InMask. Also adjust
1023 /// MaskVT to ToMaskVT if needed with vector extension or truncation.
1024 SDValue convertMask(SDValue InMask, EVT MaskVT, EVT ToMaskVT);
1026 //===--------------------------------------------------------------------===//
1027 // Generic Splitting: LegalizeTypesGeneric.cpp
1028 //===--------------------------------------------------------------------===//
1030 // Legalization methods which only use that the illegal type is split into two
1031 // not necessarily identical types. As such they can be used for splitting
1032 // vectors and expanding integers and floats.
1034 void GetSplitOp(SDValue Op, SDValue &Lo, SDValue &Hi) {
1035 if (Op.getValueType().isVector())
1036 GetSplitVector(Op, Lo, Hi);
1037 else if (Op.getValueType().isInteger())
1038 GetExpandedInteger(Op, Lo, Hi);
1039 else
1040 GetExpandedFloat(Op, Lo, Hi);
1043 /// Use ISD::EXTRACT_ELEMENT nodes to extract the low and high parts of the
1044 /// given value.
1045 void GetPairElements(SDValue Pair, SDValue &Lo, SDValue &Hi);
1047 // Generic Result Splitting.
1048 void SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo,
1049 SDValue &Lo, SDValue &Hi);
1050 void SplitRes_ARITH_FENCE (SDNode *N, SDValue &Lo, SDValue &Hi);
1051 void SplitRes_Select (SDNode *N, SDValue &Lo, SDValue &Hi);
1052 void SplitRes_SELECT_CC (SDNode *N, SDValue &Lo, SDValue &Hi);
1053 void SplitRes_UNDEF (SDNode *N, SDValue &Lo, SDValue &Hi);
1054 void SplitRes_FREEZE (SDNode *N, SDValue &Lo, SDValue &Hi);
1056 //===--------------------------------------------------------------------===//
1057 // Generic Expansion: LegalizeTypesGeneric.cpp
1058 //===--------------------------------------------------------------------===//
1060 // Legalization methods which only use that the illegal type is split into two
1061 // identical types of half the size, and that the Lo/Hi part is stored first
1062 // in memory on little/big-endian machines, followed by the Hi/Lo part. As
1063 // such they can be used for expanding integers and floats.
1065 void GetExpandedOp(SDValue Op, SDValue &Lo, SDValue &Hi) {
1066 if (Op.getValueType().isInteger())
1067 GetExpandedInteger(Op, Lo, Hi);
1068 else
1069 GetExpandedFloat(Op, Lo, Hi);
1073 /// This function will split the integer \p Op into \p NumElements
1074 /// operations of type \p EltVT and store them in \p Ops.
1075 void IntegerToVector(SDValue Op, unsigned NumElements,
1076 SmallVectorImpl<SDValue> &Ops, EVT EltVT);
1078 // Generic Result Expansion.
1079 void ExpandRes_MERGE_VALUES (SDNode *N, unsigned ResNo,
1080 SDValue &Lo, SDValue &Hi);
1081 void ExpandRes_BITCAST (SDNode *N, SDValue &Lo, SDValue &Hi);
1082 void ExpandRes_BUILD_PAIR (SDNode *N, SDValue &Lo, SDValue &Hi);
1083 void ExpandRes_EXTRACT_ELEMENT (SDNode *N, SDValue &Lo, SDValue &Hi);
1084 void ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi);
1085 void ExpandRes_NormalLoad (SDNode *N, SDValue &Lo, SDValue &Hi);
1086 void ExpandRes_VAARG (SDNode *N, SDValue &Lo, SDValue &Hi);
1088 // Generic Operand Expansion.
1089 SDValue ExpandOp_BITCAST (SDNode *N);
1090 SDValue ExpandOp_BUILD_VECTOR (SDNode *N);
1091 SDValue ExpandOp_EXTRACT_ELEMENT (SDNode *N);
1092 SDValue ExpandOp_INSERT_VECTOR_ELT(SDNode *N);
1093 SDValue ExpandOp_SCALAR_TO_VECTOR (SDNode *N);
1094 SDValue ExpandOp_NormalStore (SDNode *N, unsigned OpNo);
1097 } // end namespace llvm.
1099 #endif