| blob | 2163121410553fb64c921e1ec83e4c975fc4d4a3 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=CHECK-SSE
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK-AVX,CHECK-AVX2
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK-AVX,CHECK-AVX512F,CHECK-NO-FASTFMA
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx -fp-contract=fast | FileCheck %s --check-prefixes=CHECK-AVX,CHECK-AVX512F,CHECK-FMA
7 declare i16 @llvm.umax.i16(i16, i16)
8 declare i64 @llvm.umin.i64(i64, i64)
10 declare <4 x float> @llvm.ldexp.v4f32.v4i32(<4 x float>, <4 x i32>)
12 define <4 x float> @fmul_pow2_4xfloat(<4 x i32> %i) {
13 ; CHECK-SSE-LABEL: fmul_pow2_4xfloat:
14 ; CHECK-SSE: # %bb.0:
15 ; CHECK-SSE-NEXT: pslld $23, %xmm0
16 ; CHECK-SSE-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
17 ; CHECK-SSE-NEXT: retq
18 ;
19 ; CHECK-AVX2-LABEL: fmul_pow2_4xfloat:
20 ; CHECK-AVX2: # %bb.0:
21 ; CHECK-AVX2-NEXT: vpslld $23, %xmm0, %xmm0
22 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [1091567616,1091567616,1091567616,1091567616]
23 ; CHECK-AVX2-NEXT: vpaddd %xmm1, %xmm0, %xmm0
24 ; CHECK-AVX2-NEXT: retq
25 ;
26 ; CHECK-NO-FASTFMA-LABEL: fmul_pow2_4xfloat:
27 ; CHECK-NO-FASTFMA: # %bb.0:
28 ; CHECK-NO-FASTFMA-NEXT: vpslld $23, %xmm0, %xmm0
29 ; CHECK-NO-FASTFMA-NEXT: vpbroadcastd {{.*#+}} xmm1 = [1091567616,1091567616,1091567616,1091567616]
30 ; CHECK-NO-FASTFMA-NEXT: vpaddd %xmm1, %xmm0, %xmm0
31 ; CHECK-NO-FASTFMA-NEXT: retq
32 ;
33 ; CHECK-FMA-LABEL: fmul_pow2_4xfloat:
34 ; CHECK-FMA: # %bb.0:
35 ; CHECK-FMA-NEXT: vpslld $23, %xmm0, %xmm0
36 ; CHECK-FMA-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
37 ; CHECK-FMA-NEXT: retq
38 %p2 = shl <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %i
39 %p2_f = uitofp <4 x i32> %p2 to <4 x float>
40 %r = fmul <4 x float> <float 9.000000e+00, float 9.000000e+00, float 9.000000e+00, float 9.000000e+00>, %p2_f
41 ret <4 x float> %r
42 }
44 define <4 x float> @fmul_pow2_ldexp_4xfloat(<4 x i32> %i) {
45 ; CHECK-SSE-LABEL: fmul_pow2_ldexp_4xfloat:
46 ; CHECK-SSE: # %bb.0:
47 ; CHECK-SSE-NEXT: subq $56, %rsp
48 ; CHECK-SSE-NEXT: .cfi_def_cfa_offset 64
49 ; CHECK-SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
50 ; CHECK-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
51 ; CHECK-SSE-NEXT: movd %xmm1, %edi
52 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]
53 ; CHECK-SSE-NEXT: callq ldexpf@PLT
54 ; CHECK-SSE-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
55 ; CHECK-SSE-NEXT: pshufd $238, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
56 ; CHECK-SSE-NEXT: # xmm0 = mem[2,3,2,3]
57 ; CHECK-SSE-NEXT: movd %xmm0, %edi
58 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]
59 ; CHECK-SSE-NEXT: callq ldexpf@PLT
60 ; CHECK-SSE-NEXT: unpcklps (%rsp), %xmm0 # 16-byte Folded Reload
61 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
62 ; CHECK-SSE-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
63 ; CHECK-SSE-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
64 ; CHECK-SSE-NEXT: movd %xmm0, %edi
65 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]
66 ; CHECK-SSE-NEXT: callq ldexpf@PLT
67 ; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
68 ; CHECK-SSE-NEXT: pshufd $85, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
69 ; CHECK-SSE-NEXT: # xmm0 = mem[1,1,1,1]
70 ; CHECK-SSE-NEXT: movd %xmm0, %edi
71 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]
72 ; CHECK-SSE-NEXT: callq ldexpf@PLT
73 ; CHECK-SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
74 ; CHECK-SSE-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
75 ; CHECK-SSE-NEXT: unpcklpd (%rsp), %xmm1 # 16-byte Folded Reload
76 ; CHECK-SSE-NEXT: # xmm1 = xmm1[0],mem[0]
77 ; CHECK-SSE-NEXT: movaps %xmm1, %xmm0
78 ; CHECK-SSE-NEXT: addq $56, %rsp
79 ; CHECK-SSE-NEXT: .cfi_def_cfa_offset 8
80 ; CHECK-SSE-NEXT: retq
81 ;
82 ; CHECK-AVX-LABEL: fmul_pow2_ldexp_4xfloat:
83 ; CHECK-AVX: # %bb.0:
84 ; CHECK-AVX-NEXT: subq $40, %rsp
85 ; CHECK-AVX-NEXT: .cfi_def_cfa_offset 48
86 ; CHECK-AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
87 ; CHECK-AVX-NEXT: vextractps $1, %xmm0, %edi
88 ; CHECK-AVX-NEXT: vmovss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]
89 ; CHECK-AVX-NEXT: callq ldexpf@PLT
90 ; CHECK-AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
91 ; CHECK-AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
92 ; CHECK-AVX-NEXT: vmovd %xmm0, %edi
93 ; CHECK-AVX-NEXT: vmovss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]
94 ; CHECK-AVX-NEXT: callq ldexpf@PLT
95 ; CHECK-AVX-NEXT: vinsertps $16, (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
96 ; CHECK-AVX-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[2,3]
97 ; CHECK-AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
98 ; CHECK-AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
99 ; CHECK-AVX-NEXT: vextractps $2, %xmm0, %edi
100 ; CHECK-AVX-NEXT: vmovss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]
101 ; CHECK-AVX-NEXT: callq ldexpf@PLT
102 ; CHECK-AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload
103 ; CHECK-AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
104 ; CHECK-AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
105 ; CHECK-AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
106 ; CHECK-AVX-NEXT: vextractps $3, %xmm0, %edi
107 ; CHECK-AVX-NEXT: vmovss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]
108 ; CHECK-AVX-NEXT: callq ldexpf@PLT
109 ; CHECK-AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload
110 ; CHECK-AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
111 ; CHECK-AVX-NEXT: addq $40, %rsp
112 ; CHECK-AVX-NEXT: .cfi_def_cfa_offset 8
113 ; CHECK-AVX-NEXT: retq
114 %r = call <4 x float> @llvm.ldexp.v4f32.v4i32(<4 x float> <float 9.000000e+00, float 9.000000e+00, float 9.000000e+00, float 9.000000e+00>, <4 x i32> %i)
115 ret <4 x float> %r
116 }
118 define <4 x float> @fdiv_pow2_4xfloat(<4 x i32> %i) {
119 ; CHECK-SSE-LABEL: fdiv_pow2_4xfloat:
120 ; CHECK-SSE: # %bb.0:
121 ; CHECK-SSE-NEXT: pslld $23, %xmm0
122 ; CHECK-SSE-NEXT: movdqa {{.*#+}} xmm1 = [1091567616,1091567616,1091567616,1091567616]
123 ; CHECK-SSE-NEXT: psubd %xmm0, %xmm1
124 ; CHECK-SSE-NEXT: movdqa %xmm1, %xmm0
125 ; CHECK-SSE-NEXT: retq
126 ;
127 ; CHECK-AVX-LABEL: fdiv_pow2_4xfloat:
128 ; CHECK-AVX: # %bb.0:
129 ; CHECK-AVX-NEXT: vpslld $23, %xmm0, %xmm0
130 ; CHECK-AVX-NEXT: vpbroadcastd {{.*#+}} xmm1 = [1091567616,1091567616,1091567616,1091567616]
131 ; CHECK-AVX-NEXT: vpsubd %xmm0, %xmm1, %xmm0
132 ; CHECK-AVX-NEXT: retq
133 %p2 = shl <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %i
134 %p2_f = uitofp <4 x i32> %p2 to <4 x float>
135 %r = fdiv <4 x float> <float 9.000000e+00, float 9.000000e+00, float 9.000000e+00, float 9.000000e+00>, %p2_f
136 ret <4 x float> %r
137 }
139 declare <8 x half> @llvm.ldexp.v8f16.v8i16(<8 x half>, <8 x i16>)
141 define <8 x half> @fmul_pow2_8xhalf(<8 x i16> %i) {
142 ; CHECK-SSE-LABEL: fmul_pow2_8xhalf:
143 ; CHECK-SSE: # %bb.0:
144 ; CHECK-SSE-NEXT: subq $104, %rsp
145 ; CHECK-SSE-NEXT: .cfi_def_cfa_offset 112
146 ; CHECK-SSE-NEXT: movdqa %xmm0, %xmm1
147 ; CHECK-SSE-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4,4,5,5,6,6,7,7]
148 ; CHECK-SSE-NEXT: pslld $23, %xmm1
149 ; CHECK-SSE-NEXT: movdqa {{.*#+}} xmm2 = [1065353216,1065353216,1065353216,1065353216]
150 ; CHECK-SSE-NEXT: paddd %xmm2, %xmm1
151 ; CHECK-SSE-NEXT: cvttps2dq %xmm1, %xmm1
152 ; CHECK-SSE-NEXT: movdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
153 ; CHECK-SSE-NEXT: pslld $16, %xmm1
154 ; CHECK-SSE-NEXT: movdqa %xmm1, (%rsp) # 16-byte Spill
155 ; CHECK-SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
156 ; CHECK-SSE-NEXT: pslld $23, %xmm0
157 ; CHECK-SSE-NEXT: paddd %xmm2, %xmm0
158 ; CHECK-SSE-NEXT: cvttps2dq %xmm0, %xmm0
159 ; CHECK-SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
160 ; CHECK-SSE-NEXT: pslld $16, %xmm0
161 ; CHECK-SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
162 ; CHECK-SSE-NEXT: psrld $16, %xmm0
163 ; CHECK-SSE-NEXT: cvtdq2ps %xmm0, %xmm0
164 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
165 ; CHECK-SSE-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
166 ; CHECK-SSE-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
167 ; CHECK-SSE-NEXT: psrlq $48, %xmm0
168 ; CHECK-SSE-NEXT: cvtdq2ps %xmm0, %xmm0
169 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
170 ; CHECK-SSE-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
171 ; CHECK-SSE-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
172 ; CHECK-SSE-NEXT: psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
173 ; CHECK-SSE-NEXT: cvtdq2ps %xmm0, %xmm0
174 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
175 ; CHECK-SSE-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
176 ; CHECK-SSE-NEXT: xorps %xmm0, %xmm0
177 ; CHECK-SSE-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
178 ; CHECK-SSE-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
179 ; CHECK-SSE-NEXT: cvtdq2ps %xmm1, %xmm0
180 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
181 ; CHECK-SSE-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
182 ; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
183 ; CHECK-SSE-NEXT: psrld $16, %xmm0
184 ; CHECK-SSE-NEXT: cvtdq2ps %xmm0, %xmm0
185 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
186 ; CHECK-SSE-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
187 ; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
188 ; CHECK-SSE-NEXT: psrlq $48, %xmm0
189 ; CHECK-SSE-NEXT: cvtdq2ps %xmm0, %xmm0
190 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
191 ; CHECK-SSE-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
192 ; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
193 ; CHECK-SSE-NEXT: psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
194 ; CHECK-SSE-NEXT: cvtdq2ps %xmm0, %xmm0
195 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
196 ; CHECK-SSE-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
197 ; CHECK-SSE-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
198 ; CHECK-SSE-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],mem[4],xmm0[5],mem[5],xmm0[6],mem[6],xmm0[7],mem[7]
199 ; CHECK-SSE-NEXT: cvtdq2ps %xmm0, %xmm0
200 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
201 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
202 ; CHECK-SSE-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
203 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
204 ; CHECK-SSE-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
205 ; CHECK-SSE-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
206 ; CHECK-SSE-NEXT: # xmm0 = mem[0],zero,zero,zero
207 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
208 ; CHECK-SSE-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
209 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
210 ; CHECK-SSE-NEXT: movdqa (%rsp), %xmm1 # 16-byte Reload
211 ; CHECK-SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
212 ; CHECK-SSE-NEXT: movdqa %xmm1, (%rsp) # 16-byte Spill
213 ; CHECK-SSE-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
214 ; CHECK-SSE-NEXT: # xmm0 = mem[0],zero,zero,zero
215 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
216 ; CHECK-SSE-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
217 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
218 ; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
219 ; CHECK-SSE-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
220 ; CHECK-SSE-NEXT: # xmm0 = mem[0],zero,zero,zero
221 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
222 ; CHECK-SSE-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
223 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
224 ; CHECK-SSE-NEXT: punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
225 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
226 ; CHECK-SSE-NEXT: punpckldq (%rsp), %xmm0 # 16-byte Folded Reload
227 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
228 ; CHECK-SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
229 ; CHECK-SSE-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
230 ; CHECK-SSE-NEXT: # xmm0 = mem[0],zero,zero,zero
231 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
232 ; CHECK-SSE-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
233 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
234 ; CHECK-SSE-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
235 ; CHECK-SSE-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
236 ; CHECK-SSE-NEXT: # xmm0 = mem[0],zero,zero,zero
237 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
238 ; CHECK-SSE-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
239 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
240 ; CHECK-SSE-NEXT: movdqa (%rsp), %xmm1 # 16-byte Reload
241 ; CHECK-SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
242 ; CHECK-SSE-NEXT: movdqa %xmm1, (%rsp) # 16-byte Spill
243 ; CHECK-SSE-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
244 ; CHECK-SSE-NEXT: # xmm0 = mem[0],zero,zero,zero
245 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
246 ; CHECK-SSE-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
247 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
248 ; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
249 ; CHECK-SSE-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
250 ; CHECK-SSE-NEXT: # xmm0 = mem[0],zero,zero,zero
251 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
252 ; CHECK-SSE-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
253 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
254 ; CHECK-SSE-NEXT: punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
255 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
256 ; CHECK-SSE-NEXT: punpckldq (%rsp), %xmm0 # 16-byte Folded Reload
257 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
258 ; CHECK-SSE-NEXT: punpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
259 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0]
260 ; CHECK-SSE-NEXT: addq $104, %rsp
261 ; CHECK-SSE-NEXT: .cfi_def_cfa_offset 8
262 ; CHECK-SSE-NEXT: retq
263 ;
264 ; CHECK-AVX2-LABEL: fmul_pow2_8xhalf:
265 ; CHECK-AVX2: # %bb.0:
266 ; CHECK-AVX2-NEXT: subq $120, %rsp
267 ; CHECK-AVX2-NEXT: .cfi_def_cfa_offset 128
268 ; CHECK-AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
269 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1]
270 ; CHECK-AVX2-NEXT: vpsllvd %ymm0, %ymm1, %ymm0
271 ; CHECK-AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u,16,17,20,21,24,25,28,29,u,u,u,u,u,u,u,u]
272 ; CHECK-AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
273 ; CHECK-AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
274 ; CHECK-AVX2-NEXT: vcvtdq2ps %ymm0, %ymm0
275 ; CHECK-AVX2-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
276 ; CHECK-AVX2-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
277 ; CHECK-AVX2-NEXT: vzeroupper
278 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
279 ; CHECK-AVX2-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
280 ; CHECK-AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
281 ; CHECK-AVX2-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
282 ; CHECK-AVX2-NEXT: vzeroupper
283 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
284 ; CHECK-AVX2-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
285 ; CHECK-AVX2-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
286 ; CHECK-AVX2-NEXT: # xmm0 = mem[1,0]
287 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
288 ; CHECK-AVX2-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
289 ; CHECK-AVX2-NEXT: vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
290 ; CHECK-AVX2-NEXT: # xmm0 = mem[3,3,3,3]
291 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
292 ; CHECK-AVX2-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
293 ; CHECK-AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
294 ; CHECK-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm0
295 ; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
296 ; CHECK-AVX2-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
297 ; CHECK-AVX2-NEXT: vzeroupper
298 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
299 ; CHECK-AVX2-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
300 ; CHECK-AVX2-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
301 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
302 ; CHECK-AVX2-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
303 ; CHECK-AVX2-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
304 ; CHECK-AVX2-NEXT: # xmm0 = mem[1,0]
305 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
306 ; CHECK-AVX2-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
307 ; CHECK-AVX2-NEXT: vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
308 ; CHECK-AVX2-NEXT: # xmm0 = mem[3,3,3,3]
309 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
310 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
311 ; CHECK-AVX2-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
312 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
313 ; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
314 ; CHECK-AVX2-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
315 ; CHECK-AVX2-NEXT: # xmm0 = mem[0],zero,zero,zero
316 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
317 ; CHECK-AVX2-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
318 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
319 ; CHECK-AVX2-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
320 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
321 ; CHECK-AVX2-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
322 ; CHECK-AVX2-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
323 ; CHECK-AVX2-NEXT: # xmm0 = mem[0],zero,zero,zero
324 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
325 ; CHECK-AVX2-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
326 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
327 ; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
328 ; CHECK-AVX2-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
329 ; CHECK-AVX2-NEXT: # xmm0 = mem[0],zero,zero,zero
330 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
331 ; CHECK-AVX2-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
332 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
333 ; CHECK-AVX2-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
334 ; CHECK-AVX2-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
335 ; CHECK-AVX2-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
336 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
337 ; CHECK-AVX2-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
338 ; CHECK-AVX2-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
339 ; CHECK-AVX2-NEXT: # xmm0 = mem[0],zero,zero,zero
340 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
341 ; CHECK-AVX2-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
342 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
343 ; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
344 ; CHECK-AVX2-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
345 ; CHECK-AVX2-NEXT: # xmm0 = mem[0],zero,zero,zero
346 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
347 ; CHECK-AVX2-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
348 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
349 ; CHECK-AVX2-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
350 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
351 ; CHECK-AVX2-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
352 ; CHECK-AVX2-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
353 ; CHECK-AVX2-NEXT: # xmm0 = mem[0],zero,zero,zero
354 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
355 ; CHECK-AVX2-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
356 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
357 ; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
358 ; CHECK-AVX2-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
359 ; CHECK-AVX2-NEXT: # xmm0 = mem[0],zero,zero,zero
360 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
361 ; CHECK-AVX2-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
362 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
363 ; CHECK-AVX2-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
364 ; CHECK-AVX2-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
365 ; CHECK-AVX2-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
366 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
367 ; CHECK-AVX2-NEXT: vpunpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
368 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0]
369 ; CHECK-AVX2-NEXT: addq $120, %rsp
370 ; CHECK-AVX2-NEXT: .cfi_def_cfa_offset 8
371 ; CHECK-AVX2-NEXT: retq
372 ;
373 ; CHECK-NO-FASTFMA-LABEL: fmul_pow2_8xhalf:
374 ; CHECK-NO-FASTFMA: # %bb.0:
375 ; CHECK-NO-FASTFMA-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
376 ; CHECK-NO-FASTFMA-NEXT: vpbroadcastd {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1]
377 ; CHECK-NO-FASTFMA-NEXT: vpsllvd %ymm0, %ymm1, %ymm0
378 ; CHECK-NO-FASTFMA-NEXT: vpxor %xmm1, %xmm1, %xmm1
379 ; CHECK-NO-FASTFMA-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7],ymm0[8],ymm1[9],ymm0[10],ymm1[11],ymm0[12],ymm1[13],ymm0[14],ymm1[15]
380 ; CHECK-NO-FASTFMA-NEXT: vcvtdq2ps %ymm0, %ymm0
381 ; CHECK-NO-FASTFMA-NEXT: vcvtps2ph $4, %ymm0, %xmm0
382 ; CHECK-NO-FASTFMA-NEXT: vcvtph2ps %xmm0, %ymm0
383 ; CHECK-NO-FASTFMA-NEXT: vbroadcastss {{.*#+}} ymm1 = [8.192E+3,8.192E+3,8.192E+3,8.192E+3,8.192E+3,8.192E+3,8.192E+3,8.192E+3]
384 ; CHECK-NO-FASTFMA-NEXT: vmulps %ymm1, %ymm0, %ymm0
385 ; CHECK-NO-FASTFMA-NEXT: vcvtps2ph $4, %ymm0, %xmm0
386 ; CHECK-NO-FASTFMA-NEXT: vzeroupper
387 ; CHECK-NO-FASTFMA-NEXT: retq
388 ;
389 ; CHECK-FMA-LABEL: fmul_pow2_8xhalf:
390 ; CHECK-FMA: # %bb.0:
391 ; CHECK-FMA-NEXT: vpbroadcastw {{.*#+}} xmm1 = [1,1,1,1,1,1,1,1]
392 ; CHECK-FMA-NEXT: vpsllvw %xmm0, %xmm1, %xmm0
393 ; CHECK-FMA-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
394 ; CHECK-FMA-NEXT: vcvtdq2ps %ymm0, %ymm0
395 ; CHECK-FMA-NEXT: vcvtps2ph $4, %ymm0, %xmm0
396 ; CHECK-FMA-NEXT: vcvtph2ps %xmm0, %ymm0
397 ; CHECK-FMA-NEXT: vmulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm0, %ymm0
398 ; CHECK-FMA-NEXT: vcvtps2ph $4, %ymm0, %xmm0
399 ; CHECK-FMA-NEXT: vzeroupper
400 ; CHECK-FMA-NEXT: retq
401 %p2 = shl <8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>, %i
402 %p2_f = uitofp <8 x i16> %p2 to <8 x half>
403 %r = fmul <8 x half> <half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000>, %p2_f
404 ret <8 x half> %r
405 }
407 define <8 x half> @fmul_pow2_ldexp_8xhalf(<8 x i16> %i) {
408 ; CHECK-SSE-LABEL: fmul_pow2_ldexp_8xhalf:
409 ; CHECK-SSE: # %bb.0:
410 ; CHECK-SSE-NEXT: subq $72, %rsp
411 ; CHECK-SSE-NEXT: .cfi_def_cfa_offset 80
412 ; CHECK-SSE-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill
413 ; CHECK-SSE-NEXT: pextrw $7, %xmm0, %eax
414 ; CHECK-SSE-NEXT: movswl %ax, %edi
415 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
416 ; CHECK-SSE-NEXT: callq ldexpf@PLT
417 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
418 ; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
419 ; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
420 ; CHECK-SSE-NEXT: pextrw $6, %xmm0, %eax
421 ; CHECK-SSE-NEXT: movswl %ax, %edi
422 ; CHECK-SSE-NEXT: movd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
423 ; CHECK-SSE-NEXT: callq ldexpf@PLT
424 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
425 ; CHECK-SSE-NEXT: punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
426 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
427 ; CHECK-SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
428 ; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
429 ; CHECK-SSE-NEXT: pextrw $5, %xmm0, %eax
430 ; CHECK-SSE-NEXT: movswl %ax, %edi
431 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
432 ; CHECK-SSE-NEXT: callq ldexpf@PLT
433 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
434 ; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
435 ; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
436 ; CHECK-SSE-NEXT: pextrw $4, %xmm0, %eax
437 ; CHECK-SSE-NEXT: movswl %ax, %edi
438 ; CHECK-SSE-NEXT: movd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
439 ; CHECK-SSE-NEXT: callq ldexpf@PLT
440 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
441 ; CHECK-SSE-NEXT: punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
442 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
443 ; CHECK-SSE-NEXT: punpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
444 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
445 ; CHECK-SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
446 ; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
447 ; CHECK-SSE-NEXT: pextrw $3, %xmm0, %eax
448 ; CHECK-SSE-NEXT: movswl %ax, %edi
449 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
450 ; CHECK-SSE-NEXT: callq ldexpf@PLT
451 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
452 ; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
453 ; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
454 ; CHECK-SSE-NEXT: pextrw $2, %xmm0, %eax
455 ; CHECK-SSE-NEXT: movswl %ax, %edi
456 ; CHECK-SSE-NEXT: movd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
457 ; CHECK-SSE-NEXT: callq ldexpf@PLT
458 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
459 ; CHECK-SSE-NEXT: punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
460 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
461 ; CHECK-SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
462 ; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
463 ; CHECK-SSE-NEXT: pextrw $1, %xmm0, %eax
464 ; CHECK-SSE-NEXT: movswl %ax, %edi
465 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
466 ; CHECK-SSE-NEXT: callq ldexpf@PLT
467 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
468 ; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
469 ; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
470 ; CHECK-SSE-NEXT: movd %xmm0, %eax
471 ; CHECK-SSE-NEXT: movswl %ax, %edi
472 ; CHECK-SSE-NEXT: movd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
473 ; CHECK-SSE-NEXT: callq ldexpf@PLT
474 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
475 ; CHECK-SSE-NEXT: punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
476 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
477 ; CHECK-SSE-NEXT: punpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
478 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
479 ; CHECK-SSE-NEXT: punpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
480 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0]
481 ; CHECK-SSE-NEXT: addq $72, %rsp
482 ; CHECK-SSE-NEXT: .cfi_def_cfa_offset 8
483 ; CHECK-SSE-NEXT: retq
484 ;
485 ; CHECK-AVX2-LABEL: fmul_pow2_ldexp_8xhalf:
486 ; CHECK-AVX2: # %bb.0:
487 ; CHECK-AVX2-NEXT: subq $72, %rsp
488 ; CHECK-AVX2-NEXT: .cfi_def_cfa_offset 80
489 ; CHECK-AVX2-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
490 ; CHECK-AVX2-NEXT: vpextrw $7, %xmm0, %eax
491 ; CHECK-AVX2-NEXT: movswl %ax, %edi
492 ; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
493 ; CHECK-AVX2-NEXT: callq ldexpf@PLT
494 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
495 ; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
496 ; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
497 ; CHECK-AVX2-NEXT: vpextrw $6, %xmm0, %eax
498 ; CHECK-AVX2-NEXT: movswl %ax, %edi
499 ; CHECK-AVX2-NEXT: vmovd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
500 ; CHECK-AVX2-NEXT: callq ldexpf@PLT
501 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
502 ; CHECK-AVX2-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
503 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
504 ; CHECK-AVX2-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
505 ; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
506 ; CHECK-AVX2-NEXT: vpextrw $5, %xmm0, %eax
507 ; CHECK-AVX2-NEXT: movswl %ax, %edi
508 ; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
509 ; CHECK-AVX2-NEXT: callq ldexpf@PLT
510 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
511 ; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
512 ; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
513 ; CHECK-AVX2-NEXT: vpextrw $4, %xmm0, %eax
514 ; CHECK-AVX2-NEXT: movswl %ax, %edi
515 ; CHECK-AVX2-NEXT: vmovd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
516 ; CHECK-AVX2-NEXT: callq ldexpf@PLT
517 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
518 ; CHECK-AVX2-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
519 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
520 ; CHECK-AVX2-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
521 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
522 ; CHECK-AVX2-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
523 ; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
524 ; CHECK-AVX2-NEXT: vpextrw $3, %xmm0, %eax
525 ; CHECK-AVX2-NEXT: movswl %ax, %edi
526 ; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
527 ; CHECK-AVX2-NEXT: callq ldexpf@PLT
528 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
529 ; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
530 ; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
531 ; CHECK-AVX2-NEXT: vpextrw $2, %xmm0, %eax
532 ; CHECK-AVX2-NEXT: movswl %ax, %edi
533 ; CHECK-AVX2-NEXT: vmovd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
534 ; CHECK-AVX2-NEXT: callq ldexpf@PLT
535 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
536 ; CHECK-AVX2-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
537 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
538 ; CHECK-AVX2-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
539 ; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
540 ; CHECK-AVX2-NEXT: vpextrw $1, %xmm0, %eax
541 ; CHECK-AVX2-NEXT: movswl %ax, %edi
542 ; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
543 ; CHECK-AVX2-NEXT: callq ldexpf@PLT
544 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
545 ; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
546 ; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
547 ; CHECK-AVX2-NEXT: vmovd %xmm0, %eax
548 ; CHECK-AVX2-NEXT: movswl %ax, %edi
549 ; CHECK-AVX2-NEXT: vmovd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
550 ; CHECK-AVX2-NEXT: callq ldexpf@PLT
551 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
552 ; CHECK-AVX2-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
553 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
554 ; CHECK-AVX2-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
555 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
556 ; CHECK-AVX2-NEXT: vpunpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
557 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0]
558 ; CHECK-AVX2-NEXT: addq $72, %rsp
559 ; CHECK-AVX2-NEXT: .cfi_def_cfa_offset 8
560 ; CHECK-AVX2-NEXT: retq
561 ;
562 ; CHECK-AVX512F-LABEL: fmul_pow2_ldexp_8xhalf:
563 ; CHECK-AVX512F: # %bb.0:
564 ; CHECK-AVX512F-NEXT: subq $72, %rsp
565 ; CHECK-AVX512F-NEXT: .cfi_def_cfa_offset 80
566 ; CHECK-AVX512F-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
567 ; CHECK-AVX512F-NEXT: vpextrw $7, %xmm0, %eax
568 ; CHECK-AVX512F-NEXT: movswl %ax, %edi
569 ; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
570 ; CHECK-AVX512F-NEXT: callq ldexpf@PLT
571 ; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
572 ; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
573 ; CHECK-AVX512F-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
574 ; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
575 ; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
576 ; CHECK-AVX512F-NEXT: vpextrw $6, %xmm0, %eax
577 ; CHECK-AVX512F-NEXT: movswl %ax, %edi
578 ; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
579 ; CHECK-AVX512F-NEXT: callq ldexpf@PLT
580 ; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
581 ; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
582 ; CHECK-AVX512F-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
583 ; CHECK-AVX512F-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
584 ; CHECK-AVX512F-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
585 ; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
586 ; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
587 ; CHECK-AVX512F-NEXT: vpextrw $5, %xmm0, %eax
588 ; CHECK-AVX512F-NEXT: movswl %ax, %edi
589 ; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
590 ; CHECK-AVX512F-NEXT: callq ldexpf@PLT
591 ; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
592 ; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
593 ; CHECK-AVX512F-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
594 ; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
595 ; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
596 ; CHECK-AVX512F-NEXT: vpextrw $4, %xmm0, %eax
597 ; CHECK-AVX512F-NEXT: movswl %ax, %edi
598 ; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
599 ; CHECK-AVX512F-NEXT: callq ldexpf@PLT
600 ; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
601 ; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
602 ; CHECK-AVX512F-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
603 ; CHECK-AVX512F-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
604 ; CHECK-AVX512F-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
605 ; CHECK-AVX512F-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
606 ; CHECK-AVX512F-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
607 ; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
608 ; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
609 ; CHECK-AVX512F-NEXT: vpextrw $3, %xmm0, %eax
610 ; CHECK-AVX512F-NEXT: movswl %ax, %edi
611 ; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
612 ; CHECK-AVX512F-NEXT: callq ldexpf@PLT
613 ; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
614 ; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
615 ; CHECK-AVX512F-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
616 ; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
617 ; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
618 ; CHECK-AVX512F-NEXT: vpextrw $2, %xmm0, %eax
619 ; CHECK-AVX512F-NEXT: movswl %ax, %edi
620 ; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
621 ; CHECK-AVX512F-NEXT: callq ldexpf@PLT
622 ; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
623 ; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
624 ; CHECK-AVX512F-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
625 ; CHECK-AVX512F-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
626 ; CHECK-AVX512F-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
627 ; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
628 ; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
629 ; CHECK-AVX512F-NEXT: vpextrw $1, %xmm0, %eax
630 ; CHECK-AVX512F-NEXT: movswl %ax, %edi
631 ; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
632 ; CHECK-AVX512F-NEXT: callq ldexpf@PLT
633 ; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
634 ; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
635 ; CHECK-AVX512F-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
636 ; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
637 ; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
638 ; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
639 ; CHECK-AVX512F-NEXT: movswl %ax, %edi
640 ; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
641 ; CHECK-AVX512F-NEXT: callq ldexpf@PLT
642 ; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
643 ; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
644 ; CHECK-AVX512F-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
645 ; CHECK-AVX512F-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
646 ; CHECK-AVX512F-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
647 ; CHECK-AVX512F-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
648 ; CHECK-AVX512F-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
649 ; CHECK-AVX512F-NEXT: vpunpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
650 ; CHECK-AVX512F-NEXT: # xmm0 = xmm0[0],mem[0]
651 ; CHECK-AVX512F-NEXT: addq $72, %rsp
652 ; CHECK-AVX512F-NEXT: .cfi_def_cfa_offset 8
653 ; CHECK-AVX512F-NEXT: retq
654 %r = call <8 x half> @llvm.ldexp.v8f16.v8i16(<8 x half> <half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000>, <8 x i16> %i)
655 ret <8 x half> %r
656 }
658 define <8 x half> @fdiv_pow2_8xhalf(<8 x i16> %i) {
659 ; CHECK-SSE-LABEL: fdiv_pow2_8xhalf:
660 ; CHECK-SSE: # %bb.0:
661 ; CHECK-SSE-NEXT: psllw $10, %xmm0
662 ; CHECK-SSE-NEXT: movdqa {{.*#+}} xmm1 = [28672,28672,28672,28672,28672,28672,28672,28672]
663 ; CHECK-SSE-NEXT: psubw %xmm0, %xmm1
664 ; CHECK-SSE-NEXT: movdqa %xmm1, %xmm0
665 ; CHECK-SSE-NEXT: retq
666 ;
667 ; CHECK-AVX-LABEL: fdiv_pow2_8xhalf:
668 ; CHECK-AVX: # %bb.0:
669 ; CHECK-AVX-NEXT: vpsllw $10, %xmm0, %xmm0
670 ; CHECK-AVX-NEXT: vpbroadcastw {{.*#+}} xmm1 = [28672,28672,28672,28672,28672,28672,28672,28672]
671 ; CHECK-AVX-NEXT: vpsubw %xmm0, %xmm1, %xmm0
672 ; CHECK-AVX-NEXT: retq
673 %p2 = shl <8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>, %i
674 %p2_f = uitofp <8 x i16> %p2 to <8 x half>
675 %r = fdiv <8 x half> <half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000>, %p2_f
676 ret <8 x half> %r
677 }
679 define double @fmul_pow_shl_cnt(i64 %cnt) nounwind {
680 ; CHECK-SSE-LABEL: fmul_pow_shl_cnt:
681 ; CHECK-SSE: # %bb.0:
682 ; CHECK-SSE-NEXT: shlq $52, %rdi
683 ; CHECK-SSE-NEXT: movabsq $4621256167635550208, %rax # imm = 0x4022000000000000
684 ; CHECK-SSE-NEXT: addq %rdi, %rax
685 ; CHECK-SSE-NEXT: movq %rax, %xmm0
686 ; CHECK-SSE-NEXT: retq
687 ;
688 ; CHECK-AVX-LABEL: fmul_pow_shl_cnt:
689 ; CHECK-AVX: # %bb.0:
690 ; CHECK-AVX-NEXT: shlq $52, %rdi
691 ; CHECK-AVX-NEXT: movabsq $4621256167635550208, %rax # imm = 0x4022000000000000
692 ; CHECK-AVX-NEXT: addq %rdi, %rax
693 ; CHECK-AVX-NEXT: vmovq %rax, %xmm0
694 ; CHECK-AVX-NEXT: retq
695 %shl = shl nuw i64 1, %cnt
696 %conv = uitofp i64 %shl to double
697 %mul = fmul double 9.000000e+00, %conv
698 ret double %mul
699 }
701 define double @fmul_pow_shl_cnt2(i64 %cnt) nounwind {
702 ; CHECK-SSE-LABEL: fmul_pow_shl_cnt2:
703 ; CHECK-SSE: # %bb.0:
704 ; CHECK-SSE-NEXT: incl %edi
705 ; CHECK-SSE-NEXT: shlq $52, %rdi
706 ; CHECK-SSE-NEXT: movabsq $-4602115869219225600, %rax # imm = 0xC022000000000000
707 ; CHECK-SSE-NEXT: addq %rdi, %rax
708 ; CHECK-SSE-NEXT: movq %rax, %xmm0
709 ; CHECK-SSE-NEXT: retq
710 ;
711 ; CHECK-AVX-LABEL: fmul_pow_shl_cnt2:
712 ; CHECK-AVX: # %bb.0:
713 ; CHECK-AVX-NEXT: incl %edi
714 ; CHECK-AVX-NEXT: shlq $52, %rdi
715 ; CHECK-AVX-NEXT: movabsq $-4602115869219225600, %rax # imm = 0xC022000000000000
716 ; CHECK-AVX-NEXT: addq %rdi, %rax
717 ; CHECK-AVX-NEXT: vmovq %rax, %xmm0
718 ; CHECK-AVX-NEXT: retq
719 %shl = shl nuw i64 2, %cnt
720 %conv = uitofp i64 %shl to double
721 %mul = fmul double -9.000000e+00, %conv
722 ret double %mul
723 }
725 define float @fmul_pow_select(i32 %cnt, i1 %c) nounwind {
726 ; CHECK-SSE-LABEL: fmul_pow_select:
727 ; CHECK-SSE: # %bb.0:
728 ; CHECK-SSE-NEXT: # kill: def $edi killed $edi def $rdi
729 ; CHECK-SSE-NEXT: leal 1(%rdi), %eax
730 ; CHECK-SSE-NEXT: testb $1, %sil
731 ; CHECK-SSE-NEXT: cmovnel %edi, %eax
732 ; CHECK-SSE-NEXT: shll $23, %eax
733 ; CHECK-SSE-NEXT: addl $1091567616, %eax # imm = 0x41100000
734 ; CHECK-SSE-NEXT: movd %eax, %xmm0
735 ; CHECK-SSE-NEXT: retq
736 ;
737 ; CHECK-AVX-LABEL: fmul_pow_select:
738 ; CHECK-AVX: # %bb.0:
739 ; CHECK-AVX-NEXT: # kill: def $edi killed $edi def $rdi
740 ; CHECK-AVX-NEXT: leal 1(%rdi), %eax
741 ; CHECK-AVX-NEXT: testb $1, %sil
742 ; CHECK-AVX-NEXT: cmovnel %edi, %eax
743 ; CHECK-AVX-NEXT: shll $23, %eax
744 ; CHECK-AVX-NEXT: addl $1091567616, %eax # imm = 0x41100000
745 ; CHECK-AVX-NEXT: vmovd %eax, %xmm0
746 ; CHECK-AVX-NEXT: retq
747 %shl2 = shl nuw i32 2, %cnt
748 %shl1 = shl nuw i32 1, %cnt
749 %shl = select i1 %c, i32 %shl1, i32 %shl2
750 %conv = uitofp i32 %shl to float
751 %mul = fmul float 9.000000e+00, %conv
752 ret float %mul
753 }
755 define float @fmul_fly_pow_mul_min_pow2(i64 %cnt) nounwind {
756 ; CHECK-SSE-LABEL: fmul_fly_pow_mul_min_pow2:
757 ; CHECK-SSE: # %bb.0:
758 ; CHECK-SSE-NEXT: addl $3, %edi
759 ; CHECK-SSE-NEXT: cmpl $13, %edi
760 ; CHECK-SSE-NEXT: movl $13, %eax
761 ; CHECK-SSE-NEXT: cmovbl %edi, %eax
762 ; CHECK-SSE-NEXT: shll $23, %eax
763 ; CHECK-SSE-NEXT: addl $1091567616, %eax # imm = 0x41100000
764 ; CHECK-SSE-NEXT: movd %eax, %xmm0
765 ; CHECK-SSE-NEXT: retq
766 ;
767 ; CHECK-AVX-LABEL: fmul_fly_pow_mul_min_pow2:
768 ; CHECK-AVX: # %bb.0:
769 ; CHECK-AVX-NEXT: addl $3, %edi
770 ; CHECK-AVX-NEXT: cmpl $13, %edi
771 ; CHECK-AVX-NEXT: movl $13, %eax
772 ; CHECK-AVX-NEXT: cmovbl %edi, %eax
773 ; CHECK-AVX-NEXT: shll $23, %eax
774 ; CHECK-AVX-NEXT: addl $1091567616, %eax # imm = 0x41100000
775 ; CHECK-AVX-NEXT: vmovd %eax, %xmm0
776 ; CHECK-AVX-NEXT: retq
777 %shl8 = shl nuw i64 8, %cnt
778 %shl = call i64 @llvm.umin.i64(i64 %shl8, i64 8192)
779 %conv = uitofp i64 %shl to float
780 %mul = fmul float 9.000000e+00, %conv
781 ret float %mul
782 }
784 define double @fmul_pow_mul_max_pow2(i16 %cnt) nounwind {
785 ; CHECK-SSE-LABEL: fmul_pow_mul_max_pow2:
786 ; CHECK-SSE: # %bb.0:
787 ; CHECK-SSE-NEXT: movl %edi, %eax
788 ; CHECK-SSE-NEXT: leaq 1(%rax), %rcx
789 ; CHECK-SSE-NEXT: cmpq %rcx, %rax
790 ; CHECK-SSE-NEXT: cmovaq %rax, %rcx
791 ; CHECK-SSE-NEXT: shlq $52, %rcx
792 ; CHECK-SSE-NEXT: movabsq $4613937818241073152, %rax # imm = 0x4008000000000000
793 ; CHECK-SSE-NEXT: addq %rcx, %rax
794 ; CHECK-SSE-NEXT: movq %rax, %xmm0
795 ; CHECK-SSE-NEXT: retq
796 ;
797 ; CHECK-AVX-LABEL: fmul_pow_mul_max_pow2:
798 ; CHECK-AVX: # %bb.0:
799 ; CHECK-AVX-NEXT: movl %edi, %eax
800 ; CHECK-AVX-NEXT: leaq 1(%rax), %rcx
801 ; CHECK-AVX-NEXT: cmpq %rcx, %rax
802 ; CHECK-AVX-NEXT: cmovaq %rax, %rcx
803 ; CHECK-AVX-NEXT: shlq $52, %rcx
804 ; CHECK-AVX-NEXT: movabsq $4613937818241073152, %rax # imm = 0x4008000000000000
805 ; CHECK-AVX-NEXT: addq %rcx, %rax
806 ; CHECK-AVX-NEXT: vmovq %rax, %xmm0
807 ; CHECK-AVX-NEXT: retq
808 %shl2 = shl nuw i16 2, %cnt
809 %shl1 = shl nuw i16 1, %cnt
810 %shl = call i16 @llvm.umax.i16(i16 %shl1, i16 %shl2)
811 %conv = uitofp i16 %shl to double
812 %mul = fmul double 3.000000e+00, %conv
813 ret double %mul
814 }
816 define double @fmul_pow_shl_cnt_fail_maybe_non_pow2(i64 %v, i64 %cnt) nounwind {
817 ; CHECK-SSE-LABEL: fmul_pow_shl_cnt_fail_maybe_non_pow2:
818 ; CHECK-SSE: # %bb.0:
819 ; CHECK-SSE-NEXT: movq %rsi, %rcx
820 ; CHECK-SSE-NEXT: # kill: def $cl killed $cl killed $rcx
821 ; CHECK-SSE-NEXT: shlq %cl, %rdi
822 ; CHECK-SSE-NEXT: movq %rdi, %xmm1
823 ; CHECK-SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
824 ; CHECK-SSE-NEXT: subpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
825 ; CHECK-SSE-NEXT: movapd %xmm1, %xmm0
826 ; CHECK-SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
827 ; CHECK-SSE-NEXT: addsd %xmm1, %xmm0
828 ; CHECK-SSE-NEXT: mulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
829 ; CHECK-SSE-NEXT: retq
830 ;
831 ; CHECK-AVX2-LABEL: fmul_pow_shl_cnt_fail_maybe_non_pow2:
832 ; CHECK-AVX2: # %bb.0:
833 ; CHECK-AVX2-NEXT: movq %rsi, %rcx
834 ; CHECK-AVX2-NEXT: # kill: def $cl killed $cl killed $rcx
835 ; CHECK-AVX2-NEXT: shlq %cl, %rdi
836 ; CHECK-AVX2-NEXT: vmovq %rdi, %xmm0
837 ; CHECK-AVX2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
838 ; CHECK-AVX2-NEXT: vsubpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
839 ; CHECK-AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]
840 ; CHECK-AVX2-NEXT: vaddsd %xmm0, %xmm1, %xmm0
841 ; CHECK-AVX2-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
842 ; CHECK-AVX2-NEXT: retq
843 ;
844 ; CHECK-NO-FASTFMA-LABEL: fmul_pow_shl_cnt_fail_maybe_non_pow2:
845 ; CHECK-NO-FASTFMA: # %bb.0:
846 ; CHECK-NO-FASTFMA-NEXT: movq %rsi, %rcx
847 ; CHECK-NO-FASTFMA-NEXT: # kill: def $cl killed $cl killed $rcx
848 ; CHECK-NO-FASTFMA-NEXT: shlq %cl, %rdi
849 ; CHECK-NO-FASTFMA-NEXT: vcvtusi2sd %rdi, %xmm0, %xmm0
850 ; CHECK-NO-FASTFMA-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
851 ; CHECK-NO-FASTFMA-NEXT: retq
852 ;
853 ; CHECK-FMA-LABEL: fmul_pow_shl_cnt_fail_maybe_non_pow2:
854 ; CHECK-FMA: # %bb.0:
855 ; CHECK-FMA-NEXT: shlxq %rsi, %rdi, %rax
856 ; CHECK-FMA-NEXT: vcvtusi2sd %rax, %xmm0, %xmm0
857 ; CHECK-FMA-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
858 ; CHECK-FMA-NEXT: retq
859 %shl = shl nuw i64 %v, %cnt
860 %conv = uitofp i64 %shl to double
861 %mul = fmul double 9.000000e+00, %conv
862 ret double %mul
863 }
865 define <2 x float> @fmul_pow_shl_cnt_vec_fail_expensive_cast(<2 x i64> %cnt) nounwind {
866 ; CHECK-SSE-LABEL: fmul_pow_shl_cnt_vec_fail_expensive_cast:
867 ; CHECK-SSE: # %bb.0:
868 ; CHECK-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
869 ; CHECK-SSE-NEXT: movdqa {{.*#+}} xmm2 = [2,2]
870 ; CHECK-SSE-NEXT: movdqa %xmm2, %xmm3
871 ; CHECK-SSE-NEXT: psllq %xmm1, %xmm3
872 ; CHECK-SSE-NEXT: psllq %xmm0, %xmm2
873 ; CHECK-SSE-NEXT: movq %xmm2, %rax
874 ; CHECK-SSE-NEXT: xorps %xmm0, %xmm0
875 ; CHECK-SSE-NEXT: cvtsi2ss %rax, %xmm0
876 ; CHECK-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm3[2,3,2,3]
877 ; CHECK-SSE-NEXT: movq %xmm1, %rax
878 ; CHECK-SSE-NEXT: xorps %xmm1, %xmm1
879 ; CHECK-SSE-NEXT: cvtsi2ss %rax, %xmm1
880 ; CHECK-SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
881 ; CHECK-SSE-NEXT: mulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
882 ; CHECK-SSE-NEXT: retq
883 ;
884 ; CHECK-AVX2-LABEL: fmul_pow_shl_cnt_vec_fail_expensive_cast:
885 ; CHECK-AVX2: # %bb.0:
886 ; CHECK-AVX2-NEXT: vpmovsxbq {{.*#+}} xmm1 = [2,2]
887 ; CHECK-AVX2-NEXT: vpsllvq %xmm0, %xmm1, %xmm0
888 ; CHECK-AVX2-NEXT: vpextrq $1, %xmm0, %rax
889 ; CHECK-AVX2-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1
890 ; CHECK-AVX2-NEXT: vmovq %xmm0, %rax
891 ; CHECK-AVX2-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
892 ; CHECK-AVX2-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
893 ; CHECK-AVX2-NEXT: vbroadcastss {{.*#+}} xmm1 = [1.5E+1,1.5E+1,1.5E+1,1.5E+1]
894 ; CHECK-AVX2-NEXT: vmulps %xmm1, %xmm0, %xmm0
895 ; CHECK-AVX2-NEXT: retq
896 ;
897 ; CHECK-NO-FASTFMA-LABEL: fmul_pow_shl_cnt_vec_fail_expensive_cast:
898 ; CHECK-NO-FASTFMA: # %bb.0:
899 ; CHECK-NO-FASTFMA-NEXT: vpmovsxbq {{.*#+}} xmm1 = [2,2]
900 ; CHECK-NO-FASTFMA-NEXT: vpsllvq %xmm0, %xmm1, %xmm0
901 ; CHECK-NO-FASTFMA-NEXT: vpextrq $1, %xmm0, %rax
902 ; CHECK-NO-FASTFMA-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1
903 ; CHECK-NO-FASTFMA-NEXT: vmovq %xmm0, %rax
904 ; CHECK-NO-FASTFMA-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
905 ; CHECK-NO-FASTFMA-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
906 ; CHECK-NO-FASTFMA-NEXT: vbroadcastss {{.*#+}} xmm1 = [1.5E+1,1.5E+1,1.5E+1,1.5E+1]
907 ; CHECK-NO-FASTFMA-NEXT: vmulps %xmm1, %xmm0, %xmm0
908 ; CHECK-NO-FASTFMA-NEXT: retq
909 ;
910 ; CHECK-FMA-LABEL: fmul_pow_shl_cnt_vec_fail_expensive_cast:
911 ; CHECK-FMA: # %bb.0:
912 ; CHECK-FMA-NEXT: vpbroadcastq {{.*#+}} xmm1 = [2,2]
913 ; CHECK-FMA-NEXT: vpsllvq %xmm0, %xmm1, %xmm0
914 ; CHECK-FMA-NEXT: vcvtqq2ps %xmm0, %xmm0
915 ; CHECK-FMA-NEXT: vmulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
916 ; CHECK-FMA-NEXT: retq
917 %shl = shl nsw nuw <2 x i64> <i64 2, i64 2>, %cnt
918 %conv = uitofp <2 x i64> %shl to <2 x float>
919 %mul = fmul <2 x float> <float 15.000000e+00, float 15.000000e+00>, %conv
920 ret <2 x float> %mul
921 }
923 define <2 x double> @fmul_pow_shl_cnt_vec(<2 x i64> %cnt) nounwind {
924 ; CHECK-SSE-LABEL: fmul_pow_shl_cnt_vec:
925 ; CHECK-SSE: # %bb.0:
926 ; CHECK-SSE-NEXT: psllq $52, %xmm0
927 ; CHECK-SSE-NEXT: paddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
928 ; CHECK-SSE-NEXT: retq
929 ;
930 ; CHECK-AVX2-LABEL: fmul_pow_shl_cnt_vec:
931 ; CHECK-AVX2: # %bb.0:
932 ; CHECK-AVX2-NEXT: vpsllq $52, %xmm0, %xmm0
933 ; CHECK-AVX2-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
934 ; CHECK-AVX2-NEXT: retq
935 ;
936 ; CHECK-NO-FASTFMA-LABEL: fmul_pow_shl_cnt_vec:
937 ; CHECK-NO-FASTFMA: # %bb.0:
938 ; CHECK-NO-FASTFMA-NEXT: vpsllq $52, %xmm0, %xmm0
939 ; CHECK-NO-FASTFMA-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
940 ; CHECK-NO-FASTFMA-NEXT: retq
941 ;
942 ; CHECK-FMA-LABEL: fmul_pow_shl_cnt_vec:
943 ; CHECK-FMA: # %bb.0:
944 ; CHECK-FMA-NEXT: vpsllq $52, %xmm0, %xmm0
945 ; CHECK-FMA-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm0, %xmm0
946 ; CHECK-FMA-NEXT: retq
947 %shl = shl nsw nuw <2 x i64> <i64 2, i64 2>, %cnt
948 %conv = uitofp <2 x i64> %shl to <2 x double>
949 %mul = fmul <2 x double> <double 15.000000e+00, double 15.000000e+00>, %conv
950 ret <2 x double> %mul
951 }
953 define <4 x float> @fmul_pow_shl_cnt_vec_preserve_fma(<4 x i32> %cnt, <4 x float> %add) nounwind {
954 ; CHECK-SSE-LABEL: fmul_pow_shl_cnt_vec_preserve_fma:
955 ; CHECK-SSE: # %bb.0:
956 ; CHECK-SSE-NEXT: pslld $23, %xmm0
957 ; CHECK-SSE-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
958 ; CHECK-SSE-NEXT: addps %xmm1, %xmm0
959 ; CHECK-SSE-NEXT: retq
960 ;
961 ; CHECK-AVX2-LABEL: fmul_pow_shl_cnt_vec_preserve_fma:
962 ; CHECK-AVX2: # %bb.0:
963 ; CHECK-AVX2-NEXT: vpslld $23, %xmm0, %xmm0
964 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [1092616192,1092616192,1092616192,1092616192]
965 ; CHECK-AVX2-NEXT: vpaddd %xmm2, %xmm0, %xmm0
966 ; CHECK-AVX2-NEXT: vaddps %xmm1, %xmm0, %xmm0
967 ; CHECK-AVX2-NEXT: retq
968 ;
969 ; CHECK-NO-FASTFMA-LABEL: fmul_pow_shl_cnt_vec_preserve_fma:
970 ; CHECK-NO-FASTFMA: # %bb.0:
971 ; CHECK-NO-FASTFMA-NEXT: vpslld $23, %xmm0, %xmm0
972 ; CHECK-NO-FASTFMA-NEXT: vpbroadcastd {{.*#+}} xmm2 = [1092616192,1092616192,1092616192,1092616192]
973 ; CHECK-NO-FASTFMA-NEXT: vpaddd %xmm2, %xmm0, %xmm0
974 ; CHECK-NO-FASTFMA-NEXT: vaddps %xmm1, %xmm0, %xmm0
975 ; CHECK-NO-FASTFMA-NEXT: retq
976 ;
977 ; CHECK-FMA-LABEL: fmul_pow_shl_cnt_vec_preserve_fma:
978 ; CHECK-FMA: # %bb.0:
979 ; CHECK-FMA-NEXT: vpbroadcastd {{.*#+}} xmm2 = [2,2,2,2]
980 ; CHECK-FMA-NEXT: vpsllvd %xmm0, %xmm2, %xmm0
981 ; CHECK-FMA-NEXT: vcvtdq2ps %xmm0, %xmm0
982 ; CHECK-FMA-NEXT: vfmadd132ps {{.*#+}} xmm0 = (xmm0 * mem) + xmm1
983 ; CHECK-FMA-NEXT: retq
984 %shl = shl nsw nuw <4 x i32> <i32 2, i32 2, i32 2, i32 2>, %cnt
985 %conv = uitofp <4 x i32> %shl to <4 x float>
986 %mul = fmul <4 x float> <float 5.000000e+00, float 5.000000e+00, float 5.000000e+00, float 5.000000e+00>, %conv
987 %res = fadd <4 x float> %mul, %add
988 ret <4 x float> %res
989 }
991 define <2 x double> @fmul_pow_shl_cnt_vec_non_splat_todo(<2 x i64> %cnt) nounwind {
992 ; CHECK-SSE-LABEL: fmul_pow_shl_cnt_vec_non_splat_todo:
993 ; CHECK-SSE: # %bb.0:
994 ; CHECK-SSE-NEXT: psllq $52, %xmm0
995 ; CHECK-SSE-NEXT: paddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
996 ; CHECK-SSE-NEXT: retq
997 ;
998 ; CHECK-AVX-LABEL: fmul_pow_shl_cnt_vec_non_splat_todo:
999 ; CHECK-AVX: # %bb.0:
1000 ; CHECK-AVX-NEXT: vpsllq $52, %xmm0, %xmm0
1001 ; CHECK-AVX-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1002 ; CHECK-AVX-NEXT: retq
1003 %shl = shl nsw nuw <2 x i64> <i64 2, i64 2>, %cnt
1004 %conv = uitofp <2 x i64> %shl to <2 x double>
1005 %mul = fmul <2 x double> <double 15.000000e+00, double 14.000000e+00>, %conv
1006 ret <2 x double> %mul
1007 }
1009 define <2 x double> @fmul_pow_shl_cnt_vec_non_splat2_todo(<2 x i64> %cnt) nounwind {
1010 ; CHECK-SSE-LABEL: fmul_pow_shl_cnt_vec_non_splat2_todo:
1011 ; CHECK-SSE: # %bb.0:
1012 ; CHECK-SSE-NEXT: psllq $52, %xmm0
1013 ; CHECK-SSE-NEXT: paddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1014 ; CHECK-SSE-NEXT: retq
1015 ;
1016 ; CHECK-AVX-LABEL: fmul_pow_shl_cnt_vec_non_splat2_todo:
1017 ; CHECK-AVX: # %bb.0:
1018 ; CHECK-AVX-NEXT: vpsllq $52, %xmm0, %xmm0
1019 ; CHECK-AVX-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1020 ; CHECK-AVX-NEXT: retq
1021 %shl = shl nsw nuw <2 x i64> <i64 2, i64 1>, %cnt
1022 %conv = uitofp <2 x i64> %shl to <2 x double>
1023 %mul = fmul <2 x double> <double 15.000000e+00, double 15.000000e+00>, %conv
1024 ret <2 x double> %mul
1025 }
1027 define <2 x half> @fmul_pow_shl_cnt_vec_fail_to_large(<2 x i16> %cnt) nounwind {
1028 ; CHECK-SSE-LABEL: fmul_pow_shl_cnt_vec_fail_to_large:
1029 ; CHECK-SSE: # %bb.0:
1030 ; CHECK-SSE-NEXT: subq $40, %rsp
1031 ; CHECK-SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
1032 ; CHECK-SSE-NEXT: pslld $23, %xmm0
1033 ; CHECK-SSE-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1034 ; CHECK-SSE-NEXT: cvttps2dq %xmm0, %xmm0
1035 ; CHECK-SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
1036 ; CHECK-SSE-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2,2,u,u,u,u,u,u]
1037 ; CHECK-SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1038 ; CHECK-SSE-NEXT: psrld $16, %xmm0
1039 ; CHECK-SSE-NEXT: cvtdq2ps %xmm0, %xmm0
1040 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
1041 ; CHECK-SSE-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
1042 ; CHECK-SSE-NEXT: xorps %xmm0, %xmm0
1043 ; CHECK-SSE-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
1044 ; CHECK-SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
1045 ; CHECK-SSE-NEXT: cvtdq2ps %xmm1, %xmm0
1046 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
1047 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
1048 ; CHECK-SSE-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1049 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
1050 ; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1051 ; CHECK-SSE-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
1052 ; CHECK-SSE-NEXT: # xmm0 = mem[0],zero,zero,zero
1053 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
1054 ; CHECK-SSE-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1055 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
1056 ; CHECK-SSE-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
1057 ; CHECK-SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
1058 ; CHECK-SSE-NEXT: movdqa %xmm1, %xmm0
1059 ; CHECK-SSE-NEXT: addq $40, %rsp
1060 ; CHECK-SSE-NEXT: retq
1061 ;
1062 ; CHECK-AVX2-LABEL: fmul_pow_shl_cnt_vec_fail_to_large:
1063 ; CHECK-AVX2: # %bb.0:
1064 ; CHECK-AVX2-NEXT: subq $56, %rsp
1065 ; CHECK-AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
1066 ; CHECK-AVX2-NEXT: vpmovsxbd {{.*#+}} ymm1 = [2,2,0,0,0,0,0,0]
1067 ; CHECK-AVX2-NEXT: vpsllvd %ymm0, %ymm1, %ymm0
1068 ; CHECK-AVX2-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
1069 ; CHECK-AVX2-NEXT: vpextrw $2, %xmm0, %eax
1070 ; CHECK-AVX2-NEXT: vcvtsi2ss %eax, %xmm2, %xmm0
1071 ; CHECK-AVX2-NEXT: vzeroupper
1072 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
1073 ; CHECK-AVX2-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
1074 ; CHECK-AVX2-NEXT: vmovdqu {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
1075 ; CHECK-AVX2-NEXT: vpextrw $0, %xmm0, %eax
1076 ; CHECK-AVX2-NEXT: vcvtsi2ss %eax, %xmm2, %xmm0
1077 ; CHECK-AVX2-NEXT: vzeroupper
1078 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
1079 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
1080 ; CHECK-AVX2-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1081 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
1082 ; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1083 ; CHECK-AVX2-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
1084 ; CHECK-AVX2-NEXT: # xmm0 = mem[0],zero,zero,zero
1085 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
1086 ; CHECK-AVX2-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1087 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
1088 ; CHECK-AVX2-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
1089 ; CHECK-AVX2-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
1090 ; CHECK-AVX2-NEXT: addq $56, %rsp
1091 ; CHECK-AVX2-NEXT: retq
1092 ;
1093 ; CHECK-NO-FASTFMA-LABEL: fmul_pow_shl_cnt_vec_fail_to_large:
1094 ; CHECK-NO-FASTFMA: # %bb.0:
1095 ; CHECK-NO-FASTFMA-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
1096 ; CHECK-NO-FASTFMA-NEXT: vpmovsxbd {{.*#+}} ymm1 = [2,2,0,0,0,0,0,0]
1097 ; CHECK-NO-FASTFMA-NEXT: vpsllvd %ymm0, %ymm1, %ymm0
1098 ; CHECK-NO-FASTFMA-NEXT: vpmovdw %zmm0, %ymm0
1099 ; CHECK-NO-FASTFMA-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
1100 ; CHECK-NO-FASTFMA-NEXT: vcvtdq2ps %ymm0, %ymm0
1101 ; CHECK-NO-FASTFMA-NEXT: vcvtps2ph $4, %ymm0, %xmm0
1102 ; CHECK-NO-FASTFMA-NEXT: vcvtph2ps %xmm0, %ymm0
1103 ; CHECK-NO-FASTFMA-NEXT: vbroadcastss {{.*#+}} ymm1 = [1.5E+1,1.5E+1,1.5E+1,1.5E+1,1.5E+1,1.5E+1,1.5E+1,1.5E+1]
1104 ; CHECK-NO-FASTFMA-NEXT: vmulps %ymm1, %ymm0, %ymm0
1105 ; CHECK-NO-FASTFMA-NEXT: vcvtps2ph $4, %ymm0, %xmm0
1106 ; CHECK-NO-FASTFMA-NEXT: vzeroupper
1107 ; CHECK-NO-FASTFMA-NEXT: retq
1108 ;
1109 ; CHECK-FMA-LABEL: fmul_pow_shl_cnt_vec_fail_to_large:
1110 ; CHECK-FMA: # %bb.0:
1111 ; CHECK-FMA-NEXT: vpbroadcastw {{.*#+}} xmm1 = [2,2,2,2,2,2,2,2]
1112 ; CHECK-FMA-NEXT: vpsllvw %xmm0, %xmm1, %xmm0
1113 ; CHECK-FMA-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
1114 ; CHECK-FMA-NEXT: vcvtdq2ps %ymm0, %ymm0
1115 ; CHECK-FMA-NEXT: vcvtps2ph $4, %ymm0, %xmm0
1116 ; CHECK-FMA-NEXT: vcvtph2ps %xmm0, %ymm0
1117 ; CHECK-FMA-NEXT: vmulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm0, %ymm0
1118 ; CHECK-FMA-NEXT: vcvtps2ph $4, %ymm0, %xmm0
1119 ; CHECK-FMA-NEXT: vzeroupper
1120 ; CHECK-FMA-NEXT: retq
1121 %shl = shl nsw nuw <2 x i16> <i16 2, i16 2>, %cnt
1122 %conv = uitofp <2 x i16> %shl to <2 x half>
1123 %mul = fmul <2 x half> <half 15.000000e+00, half 15.000000e+00>, %conv
1124 ret <2 x half> %mul
1125 }
1127 define double @fmul_pow_shl_cnt_fail_maybe_bad_exp(i64 %cnt) nounwind {
1128 ; CHECK-SSE-LABEL: fmul_pow_shl_cnt_fail_maybe_bad_exp:
1129 ; CHECK-SSE: # %bb.0:
1130 ; CHECK-SSE-NEXT: movq %rdi, %rcx
1131 ; CHECK-SSE-NEXT: movl $1, %eax
1132 ; CHECK-SSE-NEXT: # kill: def $cl killed $cl killed $rcx
1133 ; CHECK-SSE-NEXT: shlq %cl, %rax
1134 ; CHECK-SSE-NEXT: movq %rax, %xmm1
1135 ; CHECK-SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
1136 ; CHECK-SSE-NEXT: subpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
1137 ; CHECK-SSE-NEXT: movapd %xmm1, %xmm0
1138 ; CHECK-SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
1139 ; CHECK-SSE-NEXT: addsd %xmm1, %xmm0
1140 ; CHECK-SSE-NEXT: mulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1141 ; CHECK-SSE-NEXT: retq
1142 ;
1143 ; CHECK-AVX2-LABEL: fmul_pow_shl_cnt_fail_maybe_bad_exp:
1144 ; CHECK-AVX2: # %bb.0:
1145 ; CHECK-AVX2-NEXT: movq %rdi, %rcx
1146 ; CHECK-AVX2-NEXT: movl $1, %eax
1147 ; CHECK-AVX2-NEXT: # kill: def $cl killed $cl killed $rcx
1148 ; CHECK-AVX2-NEXT: shlq %cl, %rax
1149 ; CHECK-AVX2-NEXT: vmovq %rax, %xmm0
1150 ; CHECK-AVX2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
1151 ; CHECK-AVX2-NEXT: vsubpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1152 ; CHECK-AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]
1153 ; CHECK-AVX2-NEXT: vaddsd %xmm0, %xmm1, %xmm0
1154 ; CHECK-AVX2-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1155 ; CHECK-AVX2-NEXT: retq
1156 ;
1157 ; CHECK-NO-FASTFMA-LABEL: fmul_pow_shl_cnt_fail_maybe_bad_exp:
1158 ; CHECK-NO-FASTFMA: # %bb.0:
1159 ; CHECK-NO-FASTFMA-NEXT: movq %rdi, %rcx
1160 ; CHECK-NO-FASTFMA-NEXT: movl $1, %eax
1161 ; CHECK-NO-FASTFMA-NEXT: # kill: def $cl killed $cl killed $rcx
1162 ; CHECK-NO-FASTFMA-NEXT: shlq %cl, %rax
1163 ; CHECK-NO-FASTFMA-NEXT: vcvtusi2sd %rax, %xmm0, %xmm0
1164 ; CHECK-NO-FASTFMA-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1165 ; CHECK-NO-FASTFMA-NEXT: retq
1166 ;
1167 ; CHECK-FMA-LABEL: fmul_pow_shl_cnt_fail_maybe_bad_exp:
1168 ; CHECK-FMA: # %bb.0:
1169 ; CHECK-FMA-NEXT: movl $1, %eax
1170 ; CHECK-FMA-NEXT: shlxq %rdi, %rax, %rax
1171 ; CHECK-FMA-NEXT: vcvtusi2sd %rax, %xmm0, %xmm0
1172 ; CHECK-FMA-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1173 ; CHECK-FMA-NEXT: retq
1174 %shl = shl nuw i64 1, %cnt
1175 %conv = uitofp i64 %shl to double
1176 %mul = fmul double 9.745314e+288, %conv
1177 ret double %mul
1178 }
1180 define double @fmul_pow_shl_cnt_safe(i16 %cnt) nounwind {
1181 ; CHECK-SSE-LABEL: fmul_pow_shl_cnt_safe:
1182 ; CHECK-SSE: # %bb.0:
1183 ; CHECK-SSE-NEXT: # kill: def $edi killed $edi def $rdi
1184 ; CHECK-SSE-NEXT: shlq $52, %rdi
1185 ; CHECK-SSE-NEXT: movabsq $8930638061065157010, %rax # imm = 0x7BEFFFFFFF5F3992
1186 ; CHECK-SSE-NEXT: addq %rdi, %rax
1187 ; CHECK-SSE-NEXT: movq %rax, %xmm0
1188 ; CHECK-SSE-NEXT: retq
1189 ;
1190 ; CHECK-AVX-LABEL: fmul_pow_shl_cnt_safe:
1191 ; CHECK-AVX: # %bb.0:
1192 ; CHECK-AVX-NEXT: # kill: def $edi killed $edi def $rdi
1193 ; CHECK-AVX-NEXT: shlq $52, %rdi
1194 ; CHECK-AVX-NEXT: movabsq $8930638061065157010, %rax # imm = 0x7BEFFFFFFF5F3992
1195 ; CHECK-AVX-NEXT: addq %rdi, %rax
1196 ; CHECK-AVX-NEXT: vmovq %rax, %xmm0
1197 ; CHECK-AVX-NEXT: retq
1198 %shl = shl nuw i16 1, %cnt
1199 %conv = uitofp i16 %shl to double
1200 %mul = fmul double 9.745314e+288, %conv
1201 ret double %mul
1202 }
1204 define <2 x double> @fdiv_pow_shl_cnt_vec(<2 x i64> %cnt) nounwind {
1205 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_vec:
1206 ; CHECK-SSE: # %bb.0:
1207 ; CHECK-SSE-NEXT: psllq $52, %xmm0
1208 ; CHECK-SSE-NEXT: movdqa {{.*#+}} xmm1 = [4607182418800017408,4607182418800017408]
1209 ; CHECK-SSE-NEXT: psubq %xmm0, %xmm1
1210 ; CHECK-SSE-NEXT: movdqa %xmm1, %xmm0
1211 ; CHECK-SSE-NEXT: retq
1212 ;
1213 ; CHECK-AVX-LABEL: fdiv_pow_shl_cnt_vec:
1214 ; CHECK-AVX: # %bb.0:
1215 ; CHECK-AVX-NEXT: vpsllq $52, %xmm0, %xmm0
1216 ; CHECK-AVX-NEXT: vpbroadcastq {{.*#+}} xmm1 = [4607182418800017408,4607182418800017408]
1217 ; CHECK-AVX-NEXT: vpsubq %xmm0, %xmm1, %xmm0
1218 ; CHECK-AVX-NEXT: retq
1219 %shl = shl nuw <2 x i64> <i64 1, i64 1>, %cnt
1220 %conv = uitofp <2 x i64> %shl to <2 x double>
1221 %mul = fdiv <2 x double> <double 1.000000e+00, double 1.000000e+00>, %conv
1222 ret <2 x double> %mul
1223 }
1225 define <2 x float> @fdiv_pow_shl_cnt_vec_with_expensive_cast(<2 x i64> %cnt) nounwind {
1226 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_vec_with_expensive_cast:
1227 ; CHECK-SSE: # %bb.0:
1228 ; CHECK-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,2,2,3]
1229 ; CHECK-SSE-NEXT: pslld $23, %xmm1
1230 ; CHECK-SSE-NEXT: movdqa {{.*#+}} xmm0 = [1065353216,1065353216,u,u]
1231 ; CHECK-SSE-NEXT: psubd %xmm1, %xmm0
1232 ; CHECK-SSE-NEXT: retq
1233 ;
1234 ; CHECK-AVX-LABEL: fdiv_pow_shl_cnt_vec_with_expensive_cast:
1235 ; CHECK-AVX: # %bb.0:
1236 ; CHECK-AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1237 ; CHECK-AVX-NEXT: vpslld $23, %xmm0, %xmm0
1238 ; CHECK-AVX-NEXT: vpbroadcastd {{.*#+}} xmm1 = [1065353216,1065353216,1065353216,1065353216]
1239 ; CHECK-AVX-NEXT: vpsubd %xmm0, %xmm1, %xmm0
1240 ; CHECK-AVX-NEXT: retq
1241 %shl = shl nuw <2 x i64> <i64 1, i64 1>, %cnt
1242 %conv = uitofp <2 x i64> %shl to <2 x float>
1243 %mul = fdiv <2 x float> <float 1.000000e+00, float 1.000000e+00>, %conv
1244 ret <2 x float> %mul
1245 }
1247 define float @fdiv_pow_shl_cnt_fail_maybe_z(i64 %cnt) nounwind {
1248 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_fail_maybe_z:
1249 ; CHECK-SSE: # %bb.0:
1250 ; CHECK-SSE-NEXT: movq %rdi, %rcx
1251 ; CHECK-SSE-NEXT: movl $8, %eax
1252 ; CHECK-SSE-NEXT: # kill: def $cl killed $cl killed $rcx
1253 ; CHECK-SSE-NEXT: shlq %cl, %rax
1254 ; CHECK-SSE-NEXT: testq %rax, %rax
1255 ; CHECK-SSE-NEXT: js .LBB22_1
1256 ; CHECK-SSE-NEXT: # %bb.2:
1257 ; CHECK-SSE-NEXT: cvtsi2ss %rax, %xmm1
1258 ; CHECK-SSE-NEXT: jmp .LBB22_3
1259 ; CHECK-SSE-NEXT: .LBB22_1:
1260 ; CHECK-SSE-NEXT: shrq %rax
1261 ; CHECK-SSE-NEXT: cvtsi2ss %rax, %xmm1
1262 ; CHECK-SSE-NEXT: addss %xmm1, %xmm1
1263 ; CHECK-SSE-NEXT: .LBB22_3:
1264 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]
1265 ; CHECK-SSE-NEXT: divss %xmm1, %xmm0
1266 ; CHECK-SSE-NEXT: retq
1267 ;
1268 ; CHECK-AVX2-LABEL: fdiv_pow_shl_cnt_fail_maybe_z:
1269 ; CHECK-AVX2: # %bb.0:
1270 ; CHECK-AVX2-NEXT: movq %rdi, %rcx
1271 ; CHECK-AVX2-NEXT: movl $8, %eax
1272 ; CHECK-AVX2-NEXT: # kill: def $cl killed $cl killed $rcx
1273 ; CHECK-AVX2-NEXT: shlq %cl, %rax
1274 ; CHECK-AVX2-NEXT: testq %rax, %rax
1275 ; CHECK-AVX2-NEXT: js .LBB22_1
1276 ; CHECK-AVX2-NEXT: # %bb.2:
1277 ; CHECK-AVX2-NEXT: vcvtsi2ss %rax, %xmm0, %xmm0
1278 ; CHECK-AVX2-NEXT: jmp .LBB22_3
1279 ; CHECK-AVX2-NEXT: .LBB22_1:
1280 ; CHECK-AVX2-NEXT: shrq %rax
1281 ; CHECK-AVX2-NEXT: vcvtsi2ss %rax, %xmm0, %xmm0
1282 ; CHECK-AVX2-NEXT: vaddss %xmm0, %xmm0, %xmm0
1283 ; CHECK-AVX2-NEXT: .LBB22_3:
1284 ; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm1 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]
1285 ; CHECK-AVX2-NEXT: vdivss %xmm0, %xmm1, %xmm0
1286 ; CHECK-AVX2-NEXT: retq
1287 ;
1288 ; CHECK-NO-FASTFMA-LABEL: fdiv_pow_shl_cnt_fail_maybe_z:
1289 ; CHECK-NO-FASTFMA: # %bb.0:
1290 ; CHECK-NO-FASTFMA-NEXT: movq %rdi, %rcx
1291 ; CHECK-NO-FASTFMA-NEXT: movl $8, %eax
1292 ; CHECK-NO-FASTFMA-NEXT: # kill: def $cl killed $cl killed $rcx
1293 ; CHECK-NO-FASTFMA-NEXT: shlq %cl, %rax
1294 ; CHECK-NO-FASTFMA-NEXT: vcvtusi2ss %rax, %xmm0, %xmm0
1295 ; CHECK-NO-FASTFMA-NEXT: vmovss {{.*#+}} xmm1 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]
1296 ; CHECK-NO-FASTFMA-NEXT: vdivss %xmm0, %xmm1, %xmm0
1297 ; CHECK-NO-FASTFMA-NEXT: retq
1298 ;
1299 ; CHECK-FMA-LABEL: fdiv_pow_shl_cnt_fail_maybe_z:
1300 ; CHECK-FMA: # %bb.0:
1301 ; CHECK-FMA-NEXT: movl $8, %eax
1302 ; CHECK-FMA-NEXT: shlxq %rdi, %rax, %rax
1303 ; CHECK-FMA-NEXT: vcvtusi2ss %rax, %xmm0, %xmm0
1304 ; CHECK-FMA-NEXT: vmovss {{.*#+}} xmm1 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]
1305 ; CHECK-FMA-NEXT: vdivss %xmm0, %xmm1, %xmm0
1306 ; CHECK-FMA-NEXT: retq
1307 %shl = shl i64 8, %cnt
1308 %conv = uitofp i64 %shl to float
1309 %mul = fdiv float -9.000000e+00, %conv
1310 ret float %mul
1311 }
1313 define float @fdiv_pow_shl_cnt_fail_neg_int(i64 %cnt) nounwind {
1314 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_fail_neg_int:
1315 ; CHECK-SSE: # %bb.0:
1316 ; CHECK-SSE-NEXT: movq %rdi, %rcx
1317 ; CHECK-SSE-NEXT: movl $8, %eax
1318 ; CHECK-SSE-NEXT: # kill: def $cl killed $cl killed $rcx
1319 ; CHECK-SSE-NEXT: shlq %cl, %rax
1320 ; CHECK-SSE-NEXT: cvtsi2ss %rax, %xmm1
1321 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]
1322 ; CHECK-SSE-NEXT: divss %xmm1, %xmm0
1323 ; CHECK-SSE-NEXT: retq
1324 ;
1325 ; CHECK-AVX2-LABEL: fdiv_pow_shl_cnt_fail_neg_int:
1326 ; CHECK-AVX2: # %bb.0:
1327 ; CHECK-AVX2-NEXT: movq %rdi, %rcx
1328 ; CHECK-AVX2-NEXT: movl $8, %eax
1329 ; CHECK-AVX2-NEXT: # kill: def $cl killed $cl killed $rcx
1330 ; CHECK-AVX2-NEXT: shlq %cl, %rax
1331 ; CHECK-AVX2-NEXT: vcvtsi2ss %rax, %xmm0, %xmm0
1332 ; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm1 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]
1333 ; CHECK-AVX2-NEXT: vdivss %xmm0, %xmm1, %xmm0
1334 ; CHECK-AVX2-NEXT: retq
1335 ;
1336 ; CHECK-NO-FASTFMA-LABEL: fdiv_pow_shl_cnt_fail_neg_int:
1337 ; CHECK-NO-FASTFMA: # %bb.0:
1338 ; CHECK-NO-FASTFMA-NEXT: movq %rdi, %rcx
1339 ; CHECK-NO-FASTFMA-NEXT: movl $8, %eax
1340 ; CHECK-NO-FASTFMA-NEXT: # kill: def $cl killed $cl killed $rcx
1341 ; CHECK-NO-FASTFMA-NEXT: shlq %cl, %rax
1342 ; CHECK-NO-FASTFMA-NEXT: vcvtsi2ss %rax, %xmm0, %xmm0
1343 ; CHECK-NO-FASTFMA-NEXT: vmovss {{.*#+}} xmm1 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]
1344 ; CHECK-NO-FASTFMA-NEXT: vdivss %xmm0, %xmm1, %xmm0
1345 ; CHECK-NO-FASTFMA-NEXT: retq
1346 ;
1347 ; CHECK-FMA-LABEL: fdiv_pow_shl_cnt_fail_neg_int:
1348 ; CHECK-FMA: # %bb.0:
1349 ; CHECK-FMA-NEXT: movl $8, %eax
1350 ; CHECK-FMA-NEXT: shlxq %rdi, %rax, %rax
1351 ; CHECK-FMA-NEXT: vcvtsi2ss %rax, %xmm0, %xmm0
1352 ; CHECK-FMA-NEXT: vmovss {{.*#+}} xmm1 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]
1353 ; CHECK-FMA-NEXT: vdivss %xmm0, %xmm1, %xmm0
1354 ; CHECK-FMA-NEXT: retq
1355 %shl = shl i64 8, %cnt
1356 %conv = sitofp i64 %shl to float
1357 %mul = fdiv float -9.000000e+00, %conv
1358 ret float %mul
1359 }
1361 define float @fdiv_pow_shl_cnt(i64 %cnt_in) nounwind {
1362 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt:
1363 ; CHECK-SSE: # %bb.0:
1364 ; CHECK-SSE-NEXT: andl $31, %edi
1365 ; CHECK-SSE-NEXT: shll $23, %edi
1366 ; CHECK-SSE-NEXT: movl $-1115684864, %eax # imm = 0xBD800000
1367 ; CHECK-SSE-NEXT: subl %edi, %eax
1368 ; CHECK-SSE-NEXT: movd %eax, %xmm0
1369 ; CHECK-SSE-NEXT: retq
1370 ;
1371 ; CHECK-AVX-LABEL: fdiv_pow_shl_cnt:
1372 ; CHECK-AVX: # %bb.0:
1373 ; CHECK-AVX-NEXT: andl $31, %edi
1374 ; CHECK-AVX-NEXT: shll $23, %edi
1375 ; CHECK-AVX-NEXT: movl $-1115684864, %eax # imm = 0xBD800000
1376 ; CHECK-AVX-NEXT: subl %edi, %eax
1377 ; CHECK-AVX-NEXT: vmovd %eax, %xmm0
1378 ; CHECK-AVX-NEXT: retq
1379 %cnt = and i64 %cnt_in, 31
1380 %shl = shl i64 8, %cnt
1381 %conv = sitofp i64 %shl to float
1382 %mul = fdiv float -0.500000e+00, %conv
1383 ret float %mul
1384 }
1386 define half @fdiv_pow_shl_cnt_fail_out_of_bounds(i32 %cnt) nounwind {
1387 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_fail_out_of_bounds:
1388 ; CHECK-SSE: # %bb.0:
1389 ; CHECK-SSE-NEXT: pushq %rax
1390 ; CHECK-SSE-NEXT: movl %edi, %ecx
1391 ; CHECK-SSE-NEXT: movl $1, %eax
1392 ; CHECK-SSE-NEXT: # kill: def $cl killed $cl killed $ecx
1393 ; CHECK-SSE-NEXT: shll %cl, %eax
1394 ; CHECK-SSE-NEXT: cvtsi2ss %rax, %xmm0
1395 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
1396 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
1397 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm1 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
1398 ; CHECK-SSE-NEXT: divss %xmm0, %xmm1
1399 ; CHECK-SSE-NEXT: movaps %xmm1, %xmm0
1400 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
1401 ; CHECK-SSE-NEXT: popq %rax
1402 ; CHECK-SSE-NEXT: retq
1403 ;
1404 ; CHECK-AVX2-LABEL: fdiv_pow_shl_cnt_fail_out_of_bounds:
1405 ; CHECK-AVX2: # %bb.0:
1406 ; CHECK-AVX2-NEXT: pushq %rax
1407 ; CHECK-AVX2-NEXT: movl %edi, %ecx
1408 ; CHECK-AVX2-NEXT: movl $1, %eax
1409 ; CHECK-AVX2-NEXT: # kill: def $cl killed $cl killed $ecx
1410 ; CHECK-AVX2-NEXT: shll %cl, %eax
1411 ; CHECK-AVX2-NEXT: vcvtsi2ss %rax, %xmm0, %xmm0
1412 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
1413 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
1414 ; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm1 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
1415 ; CHECK-AVX2-NEXT: vdivss %xmm0, %xmm1, %xmm0
1416 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
1417 ; CHECK-AVX2-NEXT: popq %rax
1418 ; CHECK-AVX2-NEXT: retq
1419 ;
1420 ; CHECK-NO-FASTFMA-LABEL: fdiv_pow_shl_cnt_fail_out_of_bounds:
1421 ; CHECK-NO-FASTFMA: # %bb.0:
1422 ; CHECK-NO-FASTFMA-NEXT: movl %edi, %ecx
1423 ; CHECK-NO-FASTFMA-NEXT: movl $1, %eax
1424 ; CHECK-NO-FASTFMA-NEXT: # kill: def $cl killed $cl killed $ecx
1425 ; CHECK-NO-FASTFMA-NEXT: shll %cl, %eax
1426 ; CHECK-NO-FASTFMA-NEXT: vcvtusi2ss %eax, %xmm0, %xmm0
1427 ; CHECK-NO-FASTFMA-NEXT: vcvtps2ph $4, %xmm0, %xmm0
1428 ; CHECK-NO-FASTFMA-NEXT: vcvtph2ps %xmm0, %xmm0
1429 ; CHECK-NO-FASTFMA-NEXT: vmovss {{.*#+}} xmm1 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
1430 ; CHECK-NO-FASTFMA-NEXT: vdivss %xmm0, %xmm1, %xmm0
1431 ; CHECK-NO-FASTFMA-NEXT: vcvtps2ph $4, %xmm0, %xmm0
1432 ; CHECK-NO-FASTFMA-NEXT: vmovd %xmm0, %eax
1433 ; CHECK-NO-FASTFMA-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
1434 ; CHECK-NO-FASTFMA-NEXT: retq
1435 ;
1436 ; CHECK-FMA-LABEL: fdiv_pow_shl_cnt_fail_out_of_bounds:
1437 ; CHECK-FMA: # %bb.0:
1438 ; CHECK-FMA-NEXT: movl $1, %eax
1439 ; CHECK-FMA-NEXT: shlxl %edi, %eax, %eax
1440 ; CHECK-FMA-NEXT: vcvtusi2ss %eax, %xmm0, %xmm0
1441 ; CHECK-FMA-NEXT: vcvtps2ph $4, %xmm0, %xmm0
1442 ; CHECK-FMA-NEXT: vcvtph2ps %xmm0, %xmm0
1443 ; CHECK-FMA-NEXT: vmovss {{.*#+}} xmm1 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
1444 ; CHECK-FMA-NEXT: vdivss %xmm0, %xmm1, %xmm0
1445 ; CHECK-FMA-NEXT: vcvtps2ph $4, %xmm0, %xmm0
1446 ; CHECK-FMA-NEXT: vmovd %xmm0, %eax
1447 ; CHECK-FMA-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
1448 ; CHECK-FMA-NEXT: retq
1449 %shl = shl nuw i32 1, %cnt
1450 %conv = uitofp i32 %shl to half
1451 %mul = fdiv half 0xH7000, %conv
1452 ret half %mul
1453 }
1455 define half @fdiv_pow_shl_cnt_in_bounds(i16 %cnt) nounwind {
1456 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_in_bounds:
1457 ; CHECK-SSE: # %bb.0:
1458 ; CHECK-SSE-NEXT: shll $10, %edi
1459 ; CHECK-SSE-NEXT: movl $28672, %eax # imm = 0x7000
1460 ; CHECK-SSE-NEXT: subl %edi, %eax
1461 ; CHECK-SSE-NEXT: pinsrw $0, %eax, %xmm0
1462 ; CHECK-SSE-NEXT: retq
1463 ;
1464 ; CHECK-AVX-LABEL: fdiv_pow_shl_cnt_in_bounds:
1465 ; CHECK-AVX: # %bb.0:
1466 ; CHECK-AVX-NEXT: shll $10, %edi
1467 ; CHECK-AVX-NEXT: movl $28672, %eax # imm = 0x7000
1468 ; CHECK-AVX-NEXT: subl %edi, %eax
1469 ; CHECK-AVX-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
1470 ; CHECK-AVX-NEXT: retq
1471 %shl = shl nuw i16 1, %cnt
1472 %conv = uitofp i16 %shl to half
1473 %mul = fdiv half 0xH7000, %conv
1474 ret half %mul
1475 }
1477 define half @fdiv_pow_shl_cnt_in_bounds2(i16 %cnt) nounwind {
1478 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_in_bounds2:
1479 ; CHECK-SSE: # %bb.0:
1480 ; CHECK-SSE-NEXT: shll $10, %edi
1481 ; CHECK-SSE-NEXT: movl $18432, %eax # imm = 0x4800
1482 ; CHECK-SSE-NEXT: subl %edi, %eax
1483 ; CHECK-SSE-NEXT: pinsrw $0, %eax, %xmm0
1484 ; CHECK-SSE-NEXT: retq
1485 ;
1486 ; CHECK-AVX-LABEL: fdiv_pow_shl_cnt_in_bounds2:
1487 ; CHECK-AVX: # %bb.0:
1488 ; CHECK-AVX-NEXT: shll $10, %edi
1489 ; CHECK-AVX-NEXT: movl $18432, %eax # imm = 0x4800
1490 ; CHECK-AVX-NEXT: subl %edi, %eax
1491 ; CHECK-AVX-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
1492 ; CHECK-AVX-NEXT: retq
1493 %shl = shl nuw i16 1, %cnt
1494 %conv = uitofp i16 %shl to half
1495 %mul = fdiv half 0xH4800, %conv
1496 ret half %mul
1497 }
1499 define half @fdiv_pow_shl_cnt_fail_out_of_bound2(i16 %cnt) nounwind {
1500 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_fail_out_of_bound2:
1501 ; CHECK-SSE: # %bb.0:
1502 ; CHECK-SSE-NEXT: pushq %rax
1503 ; CHECK-SSE-NEXT: movl %edi, %ecx
1504 ; CHECK-SSE-NEXT: movl $1, %eax
1505 ; CHECK-SSE-NEXT: # kill: def $cl killed $cl killed $ecx
1506 ; CHECK-SSE-NEXT: shll %cl, %eax
1507 ; CHECK-SSE-NEXT: movzwl %ax, %eax
1508 ; CHECK-SSE-NEXT: cvtsi2ss %eax, %xmm0
1509 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
1510 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
1511 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm1 = [2.0E+0,0.0E+0,0.0E+0,0.0E+0]
1512 ; CHECK-SSE-NEXT: divss %xmm0, %xmm1
1513 ; CHECK-SSE-NEXT: movaps %xmm1, %xmm0
1514 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
1515 ; CHECK-SSE-NEXT: popq %rax
1516 ; CHECK-SSE-NEXT: retq
1517 ;
1518 ; CHECK-AVX2-LABEL: fdiv_pow_shl_cnt_fail_out_of_bound2:
1519 ; CHECK-AVX2: # %bb.0:
1520 ; CHECK-AVX2-NEXT: pushq %rax
1521 ; CHECK-AVX2-NEXT: movl %edi, %ecx
1522 ; CHECK-AVX2-NEXT: movl $1, %eax
1523 ; CHECK-AVX2-NEXT: # kill: def $cl killed $cl killed $ecx
1524 ; CHECK-AVX2-NEXT: shll %cl, %eax
1525 ; CHECK-AVX2-NEXT: movzwl %ax, %eax
1526 ; CHECK-AVX2-NEXT: vcvtsi2ss %eax, %xmm0, %xmm0
1527 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
1528 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
1529 ; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm1 = [2.0E+0,0.0E+0,0.0E+0,0.0E+0]
1530 ; CHECK-AVX2-NEXT: vdivss %xmm0, %xmm1, %xmm0
1531 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
1532 ; CHECK-AVX2-NEXT: popq %rax
1533 ; CHECK-AVX2-NEXT: retq
1534 ;
1535 ; CHECK-NO-FASTFMA-LABEL: fdiv_pow_shl_cnt_fail_out_of_bound2:
1536 ; CHECK-NO-FASTFMA: # %bb.0:
1537 ; CHECK-NO-FASTFMA-NEXT: movl %edi, %ecx
1538 ; CHECK-NO-FASTFMA-NEXT: movl $1, %eax
1539 ; CHECK-NO-FASTFMA-NEXT: # kill: def $cl killed $cl killed $ecx
1540 ; CHECK-NO-FASTFMA-NEXT: shll %cl, %eax
1541 ; CHECK-NO-FASTFMA-NEXT: movzwl %ax, %eax
1542 ; CHECK-NO-FASTFMA-NEXT: vcvtsi2ss %eax, %xmm0, %xmm0
1543 ; CHECK-NO-FASTFMA-NEXT: vcvtps2ph $4, %xmm0, %xmm0
1544 ; CHECK-NO-FASTFMA-NEXT: vcvtph2ps %xmm0, %xmm0
1545 ; CHECK-NO-FASTFMA-NEXT: vmovss {{.*#+}} xmm1 = [2.0E+0,0.0E+0,0.0E+0,0.0E+0]
1546 ; CHECK-NO-FASTFMA-NEXT: vdivss %xmm0, %xmm1, %xmm0
1547 ; CHECK-NO-FASTFMA-NEXT: vcvtps2ph $4, %xmm0, %xmm0
1548 ; CHECK-NO-FASTFMA-NEXT: vmovd %xmm0, %eax
1549 ; CHECK-NO-FASTFMA-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
1550 ; CHECK-NO-FASTFMA-NEXT: retq
1551 ;
1552 ; CHECK-FMA-LABEL: fdiv_pow_shl_cnt_fail_out_of_bound2:
1553 ; CHECK-FMA: # %bb.0:
1554 ; CHECK-FMA-NEXT: movl $1, %eax
1555 ; CHECK-FMA-NEXT: shlxl %edi, %eax, %eax
1556 ; CHECK-FMA-NEXT: movzwl %ax, %eax
1557 ; CHECK-FMA-NEXT: vcvtsi2ss %eax, %xmm0, %xmm0
1558 ; CHECK-FMA-NEXT: vcvtps2ph $4, %xmm0, %xmm0
1559 ; CHECK-FMA-NEXT: vcvtph2ps %xmm0, %xmm0
1560 ; CHECK-FMA-NEXT: vmovss {{.*#+}} xmm1 = [2.0E+0,0.0E+0,0.0E+0,0.0E+0]
1561 ; CHECK-FMA-NEXT: vdivss %xmm0, %xmm1, %xmm0
1562 ; CHECK-FMA-NEXT: vcvtps2ph $4, %xmm0, %xmm0
1563 ; CHECK-FMA-NEXT: vmovd %xmm0, %eax
1564 ; CHECK-FMA-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
1565 ; CHECK-FMA-NEXT: retq
1566 %shl = shl nuw i16 1, %cnt
1567 %conv = uitofp i16 %shl to half
1568 %mul = fdiv half 0xH4000, %conv
1569 ret half %mul
1570 }
1572 define double @fdiv_pow_shl_cnt32_to_dbl_okay(i32 %cnt) nounwind {
1573 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt32_to_dbl_okay:
1574 ; CHECK-SSE: # %bb.0:
1575 ; CHECK-SSE-NEXT: # kill: def $edi killed $edi def $rdi
1576 ; CHECK-SSE-NEXT: shlq $52, %rdi
1577 ; CHECK-SSE-NEXT: movabsq $3936146074321813504, %rax # imm = 0x36A0000000000000
1578 ; CHECK-SSE-NEXT: subq %rdi, %rax
1579 ; CHECK-SSE-NEXT: movq %rax, %xmm0
1580 ; CHECK-SSE-NEXT: retq
1581 ;
1582 ; CHECK-AVX-LABEL: fdiv_pow_shl_cnt32_to_dbl_okay:
1583 ; CHECK-AVX: # %bb.0:
1584 ; CHECK-AVX-NEXT: # kill: def $edi killed $edi def $rdi
1585 ; CHECK-AVX-NEXT: shlq $52, %rdi
1586 ; CHECK-AVX-NEXT: movabsq $3936146074321813504, %rax # imm = 0x36A0000000000000
1587 ; CHECK-AVX-NEXT: subq %rdi, %rax
1588 ; CHECK-AVX-NEXT: vmovq %rax, %xmm0
1589 ; CHECK-AVX-NEXT: retq
1590 %shl = shl nuw i32 1, %cnt
1591 %conv = uitofp i32 %shl to double
1592 %mul = fdiv double 0x36A0000000000000, %conv
1593 ret double %mul
1594 }
1596 define float @fdiv_pow_shl_cnt32_out_of_bounds2(i32 %cnt) nounwind {
1597 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt32_out_of_bounds2:
1598 ; CHECK-SSE: # %bb.0:
1599 ; CHECK-SSE-NEXT: movl %edi, %ecx
1600 ; CHECK-SSE-NEXT: movl $1, %eax
1601 ; CHECK-SSE-NEXT: # kill: def $cl killed $cl killed $ecx
1602 ; CHECK-SSE-NEXT: shll %cl, %eax
1603 ; CHECK-SSE-NEXT: cvtsi2ss %rax, %xmm1
1604 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [1.00974148E-28,0.0E+0,0.0E+0,0.0E+0]
1605 ; CHECK-SSE-NEXT: divss %xmm1, %xmm0
1606 ; CHECK-SSE-NEXT: retq
1607 ;
1608 ; CHECK-AVX2-LABEL: fdiv_pow_shl_cnt32_out_of_bounds2:
1609 ; CHECK-AVX2: # %bb.0:
1610 ; CHECK-AVX2-NEXT: movl %edi, %ecx
1611 ; CHECK-AVX2-NEXT: movl $1, %eax
1612 ; CHECK-AVX2-NEXT: # kill: def $cl killed $cl killed $ecx
1613 ; CHECK-AVX2-NEXT: shll %cl, %eax
1614 ; CHECK-AVX2-NEXT: vcvtsi2ss %rax, %xmm0, %xmm0
1615 ; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm1 = [1.00974148E-28,0.0E+0,0.0E+0,0.0E+0]
1616 ; CHECK-AVX2-NEXT: vdivss %xmm0, %xmm1, %xmm0
1617 ; CHECK-AVX2-NEXT: retq
1618 ;
1619 ; CHECK-NO-FASTFMA-LABEL: fdiv_pow_shl_cnt32_out_of_bounds2:
1620 ; CHECK-NO-FASTFMA: # %bb.0:
1621 ; CHECK-NO-FASTFMA-NEXT: movl %edi, %ecx
1622 ; CHECK-NO-FASTFMA-NEXT: movl $1, %eax
1623 ; CHECK-NO-FASTFMA-NEXT: # kill: def $cl killed $cl killed $ecx
1624 ; CHECK-NO-FASTFMA-NEXT: shll %cl, %eax
1625 ; CHECK-NO-FASTFMA-NEXT: vcvtusi2ss %eax, %xmm0, %xmm0
1626 ; CHECK-NO-FASTFMA-NEXT: vmovss {{.*#+}} xmm1 = [1.00974148E-28,0.0E+0,0.0E+0,0.0E+0]
1627 ; CHECK-NO-FASTFMA-NEXT: vdivss %xmm0, %xmm1, %xmm0
1628 ; CHECK-NO-FASTFMA-NEXT: retq
1629 ;
1630 ; CHECK-FMA-LABEL: fdiv_pow_shl_cnt32_out_of_bounds2:
1631 ; CHECK-FMA: # %bb.0:
1632 ; CHECK-FMA-NEXT: movl $1, %eax
1633 ; CHECK-FMA-NEXT: shlxl %edi, %eax, %eax
1634 ; CHECK-FMA-NEXT: vcvtusi2ss %eax, %xmm0, %xmm0
1635 ; CHECK-FMA-NEXT: vmovss {{.*#+}} xmm1 = [1.00974148E-28,0.0E+0,0.0E+0,0.0E+0]
1636 ; CHECK-FMA-NEXT: vdivss %xmm0, %xmm1, %xmm0
1637 ; CHECK-FMA-NEXT: retq
1638 %shl = shl nuw i32 1, %cnt
1639 %conv = uitofp i32 %shl to float
1640 %mul = fdiv float 0x3a1fffff00000000, %conv
1641 ret float %mul
1642 }
1644 define float @fdiv_pow_shl_cnt32_okay(i32 %cnt) nounwind {
1645 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt32_okay:
1646 ; CHECK-SSE: # %bb.0:
1647 ; CHECK-SSE-NEXT: shll $23, %edi
1648 ; CHECK-SSE-NEXT: movl $285212672, %eax # imm = 0x11000000
1649 ; CHECK-SSE-NEXT: subl %edi, %eax
1650 ; CHECK-SSE-NEXT: movd %eax, %xmm0
1651 ; CHECK-SSE-NEXT: retq
1652 ;
1653 ; CHECK-AVX-LABEL: fdiv_pow_shl_cnt32_okay:
1654 ; CHECK-AVX: # %bb.0:
1655 ; CHECK-AVX-NEXT: shll $23, %edi
1656 ; CHECK-AVX-NEXT: movl $285212672, %eax # imm = 0x11000000
1657 ; CHECK-AVX-NEXT: subl %edi, %eax
1658 ; CHECK-AVX-NEXT: vmovd %eax, %xmm0
1659 ; CHECK-AVX-NEXT: retq
1660 %shl = shl nuw i32 1, %cnt
1661 %conv = uitofp i32 %shl to float
1662 %mul = fdiv float 0x3a20000000000000, %conv
1663 ret float %mul
1664 }