[OpenACC] Create AST nodes for 'data' constructs
[llvm-project.git] / llvm / test / tools / llvm-mca / RISCV / SyntacoreSCR / SCR4_5-FPU.s
blob90fef749a1c3dd6c9571a1cc13671d21fdbe38c1
1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2 # RUN: llvm-mca --timeline -mtriple=riscv64-unknown-unknown -mcpu=syntacore-scr4-rv64 --iterations=1 < %s | FileCheck %s --check-prefixes=CHECK,SCR4_64
3 # RUN: llvm-mca --timeline -mtriple=riscv32-unknown-unknown -mcpu=syntacore-scr4-rv32 --iterations=1 < %s | FileCheck %s --check-prefixes=CHECK,SCR4_32
4 # RUN: llvm-mca --timeline -mtriple=riscv64-unknown-unknown -mcpu=syntacore-scr5-rv64 --iterations=1 < %s | FileCheck %s --check-prefixes=CHECK,SCR5_64
5 # RUN: llvm-mca --timeline -mtriple=riscv32-unknown-unknown -mcpu=syntacore-scr5-rv32 --iterations=1 < %s | FileCheck %s --check-prefixes=CHECK,SCR5_32
7 fadd.s ft0, ft0, ft0
8 fadd.d ft1, ft1, ft1
9 fmul.s ft2, ft2, ft2
10 fmul.d ft3, ft3, ft3
11 fmadd.s ft4, ft4, ft4, ft4
12 fmadd.d ft5, ft5, ft5, ft5
13 fdiv.s ft6, ft6, ft6
14 fdiv.d ft7, ft7, ft7
15 fadd.s ft0, ft0, ft0
16 fadd.d ft1, ft1, ft1
17 fmul.s ft2, ft2, ft2
18 fmul.d ft3, ft3, ft3
19 fmadd.s ft4, ft4, ft4, ft4
20 fmadd.d ft5, ft5, ft5, ft5
21 fdiv.s ft6, ft6, ft6
22 fdiv.d ft7, ft7, ft7
24 # CHECK: Iterations: 1
25 # CHECK-NEXT: Instructions: 16
26 # CHECK-NEXT: Total Cycles: 60
27 # CHECK-NEXT: Total uOps: 16
29 # CHECK: Dispatch Width: 1
30 # CHECK-NEXT: uOps Per Cycle: 0.27
31 # CHECK-NEXT: IPC: 0.27
32 # CHECK-NEXT: Block RThroughput: 46.0
34 # CHECK: Instruction Info:
35 # CHECK-NEXT: [1]: #uOps
36 # CHECK-NEXT: [2]: Latency
37 # CHECK-NEXT: [3]: RThroughput
38 # CHECK-NEXT: [4]: MayLoad
39 # CHECK-NEXT: [5]: MayStore
40 # CHECK-NEXT: [6]: HasSideEffects (U)
42 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
43 # CHECK-NEXT: 1 3 1.00 fadd.s ft0, ft0, ft0
44 # CHECK-NEXT: 1 3 1.00 fadd.d ft1, ft1, ft1
45 # CHECK-NEXT: 1 4 1.00 fmul.s ft2, ft2, ft2
46 # CHECK-NEXT: 1 4 1.00 fmul.d ft3, ft3, ft3
47 # CHECK-NEXT: 1 4 1.00 fmadd.s ft4, ft4, ft4, ft4
48 # CHECK-NEXT: 1 4 1.00 fmadd.d ft5, ft5, ft5, ft5
49 # CHECK-NEXT: 1 10 8.00 fdiv.s ft6, ft6, ft6
50 # CHECK-NEXT: 1 17 15.00 fdiv.d ft7, ft7, ft7
51 # CHECK-NEXT: 1 3 1.00 fadd.s ft0, ft0, ft0
52 # CHECK-NEXT: 1 3 1.00 fadd.d ft1, ft1, ft1
53 # CHECK-NEXT: 1 4 1.00 fmul.s ft2, ft2, ft2
54 # CHECK-NEXT: 1 4 1.00 fmul.d ft3, ft3, ft3
55 # CHECK-NEXT: 1 4 1.00 fmadd.s ft4, ft4, ft4, ft4
56 # CHECK-NEXT: 1 4 1.00 fmadd.d ft5, ft5, ft5, ft5
57 # CHECK-NEXT: 1 10 8.00 fdiv.s ft6, ft6, ft6
58 # CHECK-NEXT: 1 17 15.00 fdiv.d ft7, ft7, ft7
60 # CHECK: Resources:
62 # SCR4_32-NEXT: [0] - SCR4RV32_ALU
63 # SCR4_32-NEXT: [1] - SCR4RV32_CFU
64 # SCR4_32-NEXT: [2] - SCR4RV32_DIV
65 # SCR4_32-NEXT: [3] - SCR4RV32_FDU
66 # SCR4_32-NEXT: [4] - SCR4RV32_FPU
67 # SCR4_32-NEXT: [5] - SCR4RV32_LSU
68 # SCR4_32-NEXT: [6] - SCR4RV32_MUL
70 # SCR4_64-NEXT: [0] - SCR4RV64_ALU
71 # SCR4_64-NEXT: [1] - SCR4RV64_CFU
72 # SCR4_64-NEXT: [2] - SCR4RV64_DIV
73 # SCR4_64-NEXT: [3] - SCR4RV64_FDU
74 # SCR4_64-NEXT: [4] - SCR4RV64_FPU
75 # SCR4_64-NEXT: [5] - SCR4RV64_LSU
76 # SCR4_64-NEXT: [6] - SCR4RV64_MUL
78 # SCR5_32-NEXT: [0] - SCR5RV32_ALU
79 # SCR5_32-NEXT: [1] - SCR5RV32_CFU
80 # SCR5_32-NEXT: [2] - SCR5RV32_DIV
81 # SCR5_32-NEXT: [3] - SCR5RV32_FDU
82 # SCR5_32-NEXT: [4] - SCR5RV32_FPU
83 # SCR5_32-NEXT: [5] - SCR5RV32_LSU
84 # SCR5_32-NEXT: [6] - SCR5RV32_MUL
86 # SCR5_64-NEXT: [0] - SCR5RV64_ALU
87 # SCR5_64-NEXT: [1] - SCR5RV64_CFU
88 # SCR5_64-NEXT: [2] - SCR5RV64_DIV
89 # SCR5_64-NEXT: [3] - SCR5RV64_FDU
90 # SCR5_64-NEXT: [4] - SCR5RV64_FPU
91 # SCR5_64-NEXT: [5] - SCR5RV64_LSU
92 # SCR5_64-NEXT: [6] - SCR5RV64_MUL
94 # CHECK: Resource pressure per iteration:
95 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6]
96 # CHECK-NEXT: - - - 46.00 12.00 - -
98 # CHECK: Resource pressure by instruction:
99 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] Instructions:
100 # CHECK-NEXT: - - - - 1.00 - - fadd.s ft0, ft0, ft0
101 # CHECK-NEXT: - - - - 1.00 - - fadd.d ft1, ft1, ft1
102 # CHECK-NEXT: - - - - 1.00 - - fmul.s ft2, ft2, ft2
103 # CHECK-NEXT: - - - - 1.00 - - fmul.d ft3, ft3, ft3
104 # CHECK-NEXT: - - - - 1.00 - - fmadd.s ft4, ft4, ft4, ft4
105 # CHECK-NEXT: - - - - 1.00 - - fmadd.d ft5, ft5, ft5, ft5
106 # CHECK-NEXT: - - - 8.00 - - - fdiv.s ft6, ft6, ft6
107 # CHECK-NEXT: - - - 15.00 - - - fdiv.d ft7, ft7, ft7
108 # CHECK-NEXT: - - - - 1.00 - - fadd.s ft0, ft0, ft0
109 # CHECK-NEXT: - - - - 1.00 - - fadd.d ft1, ft1, ft1
110 # CHECK-NEXT: - - - - 1.00 - - fmul.s ft2, ft2, ft2
111 # CHECK-NEXT: - - - - 1.00 - - fmul.d ft3, ft3, ft3
112 # CHECK-NEXT: - - - - 1.00 - - fmadd.s ft4, ft4, ft4, ft4
113 # CHECK-NEXT: - - - - 1.00 - - fmadd.d ft5, ft5, ft5, ft5
114 # CHECK-NEXT: - - - 8.00 - - - fdiv.s ft6, ft6, ft6
115 # CHECK-NEXT: - - - 15.00 - - - fdiv.d ft7, ft7, ft7
117 # CHECK: Timeline view:
118 # CHECK-NEXT: 0123456789 0123456789 0123456789
119 # CHECK-NEXT: Index 0123456789 0123456789 0123456789
121 # CHECK: [0,0] DeeE . . . . . . . . . . . . fadd.s ft0, ft0, ft0
122 # CHECK-NEXT: [0,1] .DeeE. . . . . . . . . . . . fadd.d ft1, ft1, ft1
123 # CHECK-NEXT: [0,2] . DeeeE . . . . . . . . . . . fmul.s ft2, ft2, ft2
124 # CHECK-NEXT: [0,3] . DeeeE . . . . . . . . . . . fmul.d ft3, ft3, ft3
125 # CHECK-NEXT: [0,4] . DeeeE . . . . . . . . . . . fmadd.s ft4, ft4, ft4, ft4
126 # CHECK-NEXT: [0,5] . DeeeE. . . . . . . . . . . fmadd.d ft5, ft5, ft5, ft5
127 # CHECK-NEXT: [0,6] . .DeeeeeeeeeE . . . . . . . . . fdiv.s ft6, ft6, ft6
128 # CHECK-NEXT: [0,7] . . . DeeeeeeeeeeeeeeeeE . . . . . . fdiv.d ft7, ft7, ft7
129 # CHECK-NEXT: [0,8] . . . . . . DeeE . . . . . . fadd.s ft0, ft0, ft0
130 # CHECK-NEXT: [0,9] . . . . . . DeeE . . . . . . fadd.d ft1, ft1, ft1
131 # CHECK-NEXT: [0,10] . . . . . . DeeeE. . . . . . fmul.s ft2, ft2, ft2
132 # CHECK-NEXT: [0,11] . . . . . . .DeeeE . . . . . fmul.d ft3, ft3, ft3
133 # CHECK-NEXT: [0,12] . . . . . . . DeeeE . . . . . fmadd.s ft4, ft4, ft4, ft4
134 # CHECK-NEXT: [0,13] . . . . . . . DeeeE . . . . . fmadd.d ft5, ft5, ft5, ft5
135 # CHECK-NEXT: [0,14] . . . . . . . DeeeeeeeeeE. . . . fdiv.s ft6, ft6, ft6
136 # CHECK-NEXT: [0,15] . . . . . . . . . DeeeeeeeeeeeeeeeeE fdiv.d ft7, ft7, ft7
138 # CHECK: Average Wait times (based on the timeline view):
139 # CHECK-NEXT: [0]: Executions
140 # CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
141 # CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
142 # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
144 # CHECK: [0] [1] [2] [3]
145 # CHECK-NEXT: 0. 1 0.0 0.0 0.0 fadd.s ft0, ft0, ft0
146 # CHECK-NEXT: 1. 1 0.0 0.0 0.0 fadd.d ft1, ft1, ft1
147 # CHECK-NEXT: 2. 1 0.0 0.0 0.0 fmul.s ft2, ft2, ft2
148 # CHECK-NEXT: 3. 1 0.0 0.0 0.0 fmul.d ft3, ft3, ft3
149 # CHECK-NEXT: 4. 1 0.0 0.0 0.0 fmadd.s ft4, ft4, ft4, ft4
150 # CHECK-NEXT: 5. 1 0.0 0.0 0.0 fmadd.d ft5, ft5, ft5, ft5
151 # CHECK-NEXT: 6. 1 0.0 0.0 0.0 fdiv.s ft6, ft6, ft6
152 # CHECK-NEXT: 7. 1 0.0 0.0 0.0 fdiv.d ft7, ft7, ft7
153 # CHECK-NEXT: 8. 1 0.0 0.0 0.0 fadd.s ft0, ft0, ft0
154 # CHECK-NEXT: 9. 1 0.0 0.0 0.0 fadd.d ft1, ft1, ft1
155 # CHECK-NEXT: 10. 1 0.0 0.0 0.0 fmul.s ft2, ft2, ft2
156 # CHECK-NEXT: 11. 1 0.0 0.0 0.0 fmul.d ft3, ft3, ft3
157 # CHECK-NEXT: 12. 1 0.0 0.0 0.0 fmadd.s ft4, ft4, ft4, ft4
158 # CHECK-NEXT: 13. 1 0.0 0.0 0.0 fmadd.d ft5, ft5, ft5, ft5
159 # CHECK-NEXT: 14. 1 0.0 0.0 0.0 fdiv.s ft6, ft6, ft6
160 # CHECK-NEXT: 15. 1 0.0 0.0 0.0 fdiv.d ft7, ft7, ft7
161 # CHECK-NEXT: 1 0.0 0.0 0.0 <total>