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[llvm-project.git] / llvm / test / tools / llvm-mca / RISCV / SyntacoreSCR /

tree	df7ada5ac19c7663b78aa6048326da9f82478684

drwxr-xr-x		..
-rw-r--r--	7606	SCR3_4_5-ALU.s	blob \| blame \| history \| raw
-rw-r--r--	7950	SCR3_4_5-LSU.s	blob \| blame \| history \| raw
-rw-r--r--	9331	SCR4_5-FPU.s	blob \| blame \| history \| raw
-rw-r--r--	2868	SCR7-ALU.s	blob \| blame \| history \| raw
-rw-r--r--	3395	SCR7-FPALU_D.s	blob \| blame \| history \| raw
-rw-r--r--	3395	SCR7-FPALU_S.s	blob \| blame \| history \| raw
-rw-r--r--	2128	SCR7-LSU.s	blob \| blame \| history \| raw

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