1 //===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file implements a target parser to recognise ARM hardware features
10 // such as FPU/CPU/ARCH/extensions and specific support such as HWDIV.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/TargetParser/ARMTargetParser.h"
15 #include "llvm/ADT/StringSwitch.h"
16 #include "llvm/Support/Format.h"
17 #include "llvm/Support/raw_ostream.h"
18 #include "llvm/TargetParser/ARMTargetParserCommon.h"
19 #include "llvm/TargetParser/Triple.h"
24 static StringRef
getHWDivSynonym(StringRef HWDiv
) {
25 return StringSwitch
<StringRef
>(HWDiv
)
26 .Case("thumb,arm", "arm,thumb")
30 // Allows partial match, ex. "v7a" matches "armv7a".
31 ARM::ArchKind
ARM::parseArch(StringRef Arch
) {
32 Arch
= getCanonicalArchName(Arch
);
33 StringRef Syn
= getArchSynonym(Arch
);
34 for (const auto &A
: ARMArchNames
) {
35 if (A
.Name
.ends_with(Syn
))
38 return ArchKind::INVALID
;
41 // Version number (ex. v7 = 7).
42 unsigned ARM::parseArchVersion(StringRef Arch
) {
43 Arch
= getCanonicalArchName(Arch
);
44 switch (parseArch(Arch
)) {
46 case ArchKind::ARMV4T
:
48 case ArchKind::ARMV5T
:
49 case ArchKind::ARMV5TE
:
50 case ArchKind::IWMMXT
:
51 case ArchKind::IWMMXT2
:
52 case ArchKind::XSCALE
:
53 case ArchKind::ARMV5TEJ
:
56 case ArchKind::ARMV6K
:
57 case ArchKind::ARMV6T2
:
58 case ArchKind::ARMV6KZ
:
59 case ArchKind::ARMV6M
:
61 case ArchKind::ARMV7A
:
62 case ArchKind::ARMV7VE
:
63 case ArchKind::ARMV7R
:
64 case ArchKind::ARMV7M
:
65 case ArchKind::ARMV7S
:
66 case ArchKind::ARMV7EM
:
67 case ArchKind::ARMV7K
:
69 case ArchKind::ARMV8A
:
70 case ArchKind::ARMV8_1A
:
71 case ArchKind::ARMV8_2A
:
72 case ArchKind::ARMV8_3A
:
73 case ArchKind::ARMV8_4A
:
74 case ArchKind::ARMV8_5A
:
75 case ArchKind::ARMV8_6A
:
76 case ArchKind::ARMV8_7A
:
77 case ArchKind::ARMV8_8A
:
78 case ArchKind::ARMV8_9A
:
79 case ArchKind::ARMV8R
:
80 case ArchKind::ARMV8MBaseline
:
81 case ArchKind::ARMV8MMainline
:
82 case ArchKind::ARMV8_1MMainline
:
84 case ArchKind::ARMV9A
:
85 case ArchKind::ARMV9_1A
:
86 case ArchKind::ARMV9_2A
:
87 case ArchKind::ARMV9_3A
:
88 case ArchKind::ARMV9_4A
:
89 case ArchKind::ARMV9_5A
:
91 case ArchKind::INVALID
:
94 llvm_unreachable("Unhandled architecture");
97 static ARM::ProfileKind
getProfileKind(ARM::ArchKind AK
) {
99 case ARM::ArchKind::ARMV6M
:
100 case ARM::ArchKind::ARMV7M
:
101 case ARM::ArchKind::ARMV7EM
:
102 case ARM::ArchKind::ARMV8MMainline
:
103 case ARM::ArchKind::ARMV8MBaseline
:
104 case ARM::ArchKind::ARMV8_1MMainline
:
105 return ARM::ProfileKind::M
;
106 case ARM::ArchKind::ARMV7R
:
107 case ARM::ArchKind::ARMV8R
:
108 return ARM::ProfileKind::R
;
109 case ARM::ArchKind::ARMV7A
:
110 case ARM::ArchKind::ARMV7VE
:
111 case ARM::ArchKind::ARMV7K
:
112 case ARM::ArchKind::ARMV8A
:
113 case ARM::ArchKind::ARMV8_1A
:
114 case ARM::ArchKind::ARMV8_2A
:
115 case ARM::ArchKind::ARMV8_3A
:
116 case ARM::ArchKind::ARMV8_4A
:
117 case ARM::ArchKind::ARMV8_5A
:
118 case ARM::ArchKind::ARMV8_6A
:
119 case ARM::ArchKind::ARMV8_7A
:
120 case ARM::ArchKind::ARMV8_8A
:
121 case ARM::ArchKind::ARMV8_9A
:
122 case ARM::ArchKind::ARMV9A
:
123 case ARM::ArchKind::ARMV9_1A
:
124 case ARM::ArchKind::ARMV9_2A
:
125 case ARM::ArchKind::ARMV9_3A
:
126 case ARM::ArchKind::ARMV9_4A
:
127 case ARM::ArchKind::ARMV9_5A
:
128 return ARM::ProfileKind::A
;
129 case ARM::ArchKind::ARMV4
:
130 case ARM::ArchKind::ARMV4T
:
131 case ARM::ArchKind::ARMV5T
:
132 case ARM::ArchKind::ARMV5TE
:
133 case ARM::ArchKind::ARMV5TEJ
:
134 case ARM::ArchKind::ARMV6
:
135 case ARM::ArchKind::ARMV6K
:
136 case ARM::ArchKind::ARMV6T2
:
137 case ARM::ArchKind::ARMV6KZ
:
138 case ARM::ArchKind::ARMV7S
:
139 case ARM::ArchKind::IWMMXT
:
140 case ARM::ArchKind::IWMMXT2
:
141 case ARM::ArchKind::XSCALE
:
142 case ARM::ArchKind::INVALID
:
143 return ARM::ProfileKind::INVALID
;
145 llvm_unreachable("Unhandled architecture");
149 ARM::ProfileKind
ARM::parseArchProfile(StringRef Arch
) {
150 Arch
= getCanonicalArchName(Arch
);
151 return getProfileKind(parseArch(Arch
));
154 bool ARM::getFPUFeatures(ARM::FPUKind FPUKind
,
155 std::vector
<StringRef
> &Features
) {
157 if (FPUKind
>= FK_LAST
|| FPUKind
== FK_INVALID
)
160 static const struct FPUFeatureNameInfo
{
161 const char *PlusName
, *MinusName
;
162 FPUVersion MinVersion
;
163 FPURestriction MaxRestriction
;
164 } FPUFeatureInfoList
[] = {
165 // We have to specify the + and - versions of the name in full so
166 // that we can return them as static StringRefs.
168 // Also, the SubtargetFeatures ending in just "sp" are listed here
169 // under FPURestriction::None, which is the only FPURestriction in
170 // which they would be valid (since FPURestriction::SP doesn't
172 {"+vfp2", "-vfp2", FPUVersion::VFPV2
, FPURestriction::D16
},
173 {"+vfp2sp", "-vfp2sp", FPUVersion::VFPV2
, FPURestriction::SP_D16
},
174 {"+vfp3", "-vfp3", FPUVersion::VFPV3
, FPURestriction::None
},
175 {"+vfp3d16", "-vfp3d16", FPUVersion::VFPV3
, FPURestriction::D16
},
176 {"+vfp3d16sp", "-vfp3d16sp", FPUVersion::VFPV3
, FPURestriction::SP_D16
},
177 {"+vfp3sp", "-vfp3sp", FPUVersion::VFPV3
, FPURestriction::None
},
178 {"+fp16", "-fp16", FPUVersion::VFPV3_FP16
, FPURestriction::SP_D16
},
179 {"+vfp4", "-vfp4", FPUVersion::VFPV4
, FPURestriction::None
},
180 {"+vfp4d16", "-vfp4d16", FPUVersion::VFPV4
, FPURestriction::D16
},
181 {"+vfp4d16sp", "-vfp4d16sp", FPUVersion::VFPV4
, FPURestriction::SP_D16
},
182 {"+vfp4sp", "-vfp4sp", FPUVersion::VFPV4
, FPURestriction::None
},
183 {"+fp-armv8", "-fp-armv8", FPUVersion::VFPV5
, FPURestriction::None
},
184 {"+fp-armv8d16", "-fp-armv8d16", FPUVersion::VFPV5
, FPURestriction::D16
},
185 {"+fp-armv8d16sp", "-fp-armv8d16sp", FPUVersion::VFPV5
, FPURestriction::SP_D16
},
186 {"+fp-armv8sp", "-fp-armv8sp", FPUVersion::VFPV5
, FPURestriction::None
},
187 {"+fullfp16", "-fullfp16", FPUVersion::VFPV5_FULLFP16
, FPURestriction::SP_D16
},
188 {"+fp64", "-fp64", FPUVersion::VFPV2
, FPURestriction::D16
},
189 {"+d32", "-d32", FPUVersion::VFPV3
, FPURestriction::None
},
192 for (const auto &Info
: FPUFeatureInfoList
) {
193 if (FPUNames
[FPUKind
].FPUVer
>= Info
.MinVersion
&&
194 FPUNames
[FPUKind
].Restriction
<= Info
.MaxRestriction
)
195 Features
.push_back(Info
.PlusName
);
197 Features
.push_back(Info
.MinusName
);
200 static const struct NeonFeatureNameInfo
{
201 const char *PlusName
, *MinusName
;
202 NeonSupportLevel MinSupportLevel
;
203 } NeonFeatureInfoList
[] = {
204 {"+neon", "-neon", NeonSupportLevel::Neon
},
205 {"+sha2", "-sha2", NeonSupportLevel::Crypto
},
206 {"+aes", "-aes", NeonSupportLevel::Crypto
},
209 for (const auto &Info
: NeonFeatureInfoList
) {
210 if (FPUNames
[FPUKind
].NeonSupport
>= Info
.MinSupportLevel
)
211 Features
.push_back(Info
.PlusName
);
213 Features
.push_back(Info
.MinusName
);
219 ARM::FPUKind
ARM::parseFPU(StringRef FPU
) {
220 StringRef Syn
= getFPUSynonym(FPU
);
221 for (const auto &F
: FPUNames
) {
228 ARM::NeonSupportLevel
ARM::getFPUNeonSupportLevel(ARM::FPUKind FPUKind
) {
229 if (FPUKind
>= FK_LAST
)
230 return NeonSupportLevel::None
;
231 return FPUNames
[FPUKind
].NeonSupport
;
234 StringRef
ARM::getFPUSynonym(StringRef FPU
) {
235 return StringSwitch
<StringRef
>(FPU
)
236 .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported
237 .Case("vfp2", "vfpv2")
238 .Case("vfp3", "vfpv3")
239 .Case("vfp4", "vfpv4")
240 .Case("vfp3-d16", "vfpv3-d16")
241 .Case("vfp4-d16", "vfpv4-d16")
242 .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16")
243 .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16")
244 .Case("fp5-sp-d16", "fpv5-sp-d16")
245 .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16")
246 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3.
247 .Case("neon-vfpv3", "neon")
251 StringRef
ARM::getFPUName(ARM::FPUKind FPUKind
) {
252 if (FPUKind
>= FK_LAST
)
254 return FPUNames
[FPUKind
].Name
;
257 ARM::FPUVersion
ARM::getFPUVersion(ARM::FPUKind FPUKind
) {
258 if (FPUKind
>= FK_LAST
)
259 return FPUVersion::NONE
;
260 return FPUNames
[FPUKind
].FPUVer
;
263 ARM::FPURestriction
ARM::getFPURestriction(ARM::FPUKind FPUKind
) {
264 if (FPUKind
>= FK_LAST
)
265 return FPURestriction::None
;
266 return FPUNames
[FPUKind
].Restriction
;
269 ARM::FPUKind
ARM::getDefaultFPU(StringRef CPU
, ARM::ArchKind AK
) {
270 if (CPU
== "generic")
271 return ARM::ARMArchNames
[static_cast<unsigned>(AK
)].DefaultFPU
;
273 return StringSwitch
<ARM::FPUKind
>(CPU
)
274 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
275 .Case(NAME, DEFAULT_FPU)
276 #include "llvm/TargetParser/ARMTargetParser.def"
277 .Default(ARM::FK_INVALID
);
280 uint64_t ARM::getDefaultExtensions(StringRef CPU
, ARM::ArchKind AK
) {
281 if (CPU
== "generic")
282 return ARM::ARMArchNames
[static_cast<unsigned>(AK
)].ArchBaseExtensions
;
284 return StringSwitch
<uint64_t>(CPU
)
285 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
287 ARMArchNames[static_cast<unsigned>(ArchKind::ID)].ArchBaseExtensions | \
289 #include "llvm/TargetParser/ARMTargetParser.def"
290 .Default(ARM::AEK_INVALID
);
293 bool ARM::getHWDivFeatures(uint64_t HWDivKind
,
294 std::vector
<StringRef
> &Features
) {
296 if (HWDivKind
== AEK_INVALID
)
299 if (HWDivKind
& AEK_HWDIVARM
)
300 Features
.push_back("+hwdiv-arm");
302 Features
.push_back("-hwdiv-arm");
304 if (HWDivKind
& AEK_HWDIVTHUMB
)
305 Features
.push_back("+hwdiv");
307 Features
.push_back("-hwdiv");
312 bool ARM::getExtensionFeatures(uint64_t Extensions
,
313 std::vector
<StringRef
> &Features
) {
315 if (Extensions
== AEK_INVALID
)
318 for (const auto &AE
: ARCHExtNames
) {
319 if ((Extensions
& AE
.ID
) == AE
.ID
&& !AE
.Feature
.empty())
320 Features
.push_back(AE
.Feature
);
321 else if (!AE
.NegFeature
.empty())
322 Features
.push_back(AE
.NegFeature
);
325 return getHWDivFeatures(Extensions
, Features
);
328 StringRef
ARM::getArchName(ARM::ArchKind AK
) {
329 return ARMArchNames
[static_cast<unsigned>(AK
)].Name
;
332 StringRef
ARM::getCPUAttr(ARM::ArchKind AK
) {
333 return ARMArchNames
[static_cast<unsigned>(AK
)].CPUAttr
;
336 StringRef
ARM::getSubArch(ARM::ArchKind AK
) {
337 return ARMArchNames
[static_cast<unsigned>(AK
)].getSubArch();
340 unsigned ARM::getArchAttr(ARM::ArchKind AK
) {
341 return ARMArchNames
[static_cast<unsigned>(AK
)].ArchAttr
;
344 StringRef
ARM::getArchExtName(uint64_t ArchExtKind
) {
345 for (const auto &AE
: ARCHExtNames
) {
346 if (ArchExtKind
== AE
.ID
)
352 static bool stripNegationPrefix(StringRef
&Name
) {
353 return Name
.consume_front("no");
356 StringRef
ARM::getArchExtFeature(StringRef ArchExt
) {
357 bool Negated
= stripNegationPrefix(ArchExt
);
358 for (const auto &AE
: ARCHExtNames
) {
359 if (!AE
.Feature
.empty() && ArchExt
== AE
.Name
)
360 return StringRef(Negated
? AE
.NegFeature
: AE
.Feature
);
366 static ARM::FPUKind
findDoublePrecisionFPU(ARM::FPUKind InputFPUKind
) {
367 if (InputFPUKind
== ARM::FK_INVALID
|| InputFPUKind
== ARM::FK_NONE
)
368 return ARM::FK_INVALID
;
370 const ARM::FPUName
&InputFPU
= ARM::FPUNames
[InputFPUKind
];
372 // If the input FPU already supports double-precision, then there
373 // isn't any different FPU we can return here.
374 if (ARM::isDoublePrecision(InputFPU
.Restriction
))
377 // Otherwise, look for an FPU entry with all the same fields, except
378 // that it supports double precision.
379 for (const ARM::FPUName
&CandidateFPU
: ARM::FPUNames
) {
380 if (CandidateFPU
.FPUVer
== InputFPU
.FPUVer
&&
381 CandidateFPU
.NeonSupport
== InputFPU
.NeonSupport
&&
382 ARM::has32Regs(CandidateFPU
.Restriction
) ==
383 ARM::has32Regs(InputFPU
.Restriction
) &&
384 ARM::isDoublePrecision(CandidateFPU
.Restriction
)) {
385 return CandidateFPU
.ID
;
390 return ARM::FK_INVALID
;
393 static ARM::FPUKind
findSinglePrecisionFPU(ARM::FPUKind InputFPUKind
) {
394 if (InputFPUKind
== ARM::FK_INVALID
|| InputFPUKind
== ARM::FK_NONE
)
395 return ARM::FK_INVALID
;
397 const ARM::FPUName
&InputFPU
= ARM::FPUNames
[InputFPUKind
];
399 // If the input FPU already is single-precision only, then there
400 // isn't any different FPU we can return here.
401 if (!ARM::isDoublePrecision(InputFPU
.Restriction
))
404 // Otherwise, look for an FPU entry with all the same fields, except
405 // that it does not support double precision.
406 for (const ARM::FPUName
&CandidateFPU
: ARM::FPUNames
) {
407 if (CandidateFPU
.FPUVer
== InputFPU
.FPUVer
&&
408 CandidateFPU
.NeonSupport
== InputFPU
.NeonSupport
&&
409 ARM::has32Regs(CandidateFPU
.Restriction
) ==
410 ARM::has32Regs(InputFPU
.Restriction
) &&
411 !ARM::isDoublePrecision(CandidateFPU
.Restriction
)) {
412 return CandidateFPU
.ID
;
417 return ARM::FK_INVALID
;
420 bool ARM::appendArchExtFeatures(StringRef CPU
, ARM::ArchKind AK
,
422 std::vector
<StringRef
> &Features
,
423 ARM::FPUKind
&ArgFPUKind
) {
425 size_t StartingNumFeatures
= Features
.size();
426 const bool Negated
= stripNegationPrefix(ArchExt
);
427 uint64_t ID
= parseArchExt(ArchExt
);
429 if (ID
== AEK_INVALID
)
432 for (const auto &AE
: ARCHExtNames
) {
434 if ((AE
.ID
& ID
) == ID
&& !AE
.NegFeature
.empty())
435 Features
.push_back(AE
.NegFeature
);
437 if ((AE
.ID
& ID
) == AE
.ID
&& !AE
.Feature
.empty())
438 Features
.push_back(AE
.Feature
);
445 if (ArchExt
== "fp" || ArchExt
== "fp.dp") {
446 const ARM::FPUKind DefaultFPU
= getDefaultFPU(CPU
, AK
);
447 ARM::FPUKind FPUKind
;
448 if (ArchExt
== "fp.dp") {
449 const bool IsDP
= ArgFPUKind
!= ARM::FK_INVALID
&&
450 ArgFPUKind
!= ARM::FK_NONE
&&
451 isDoublePrecision(getFPURestriction(ArgFPUKind
));
453 /* If there is no FPU selected yet, we still need to set ArgFPUKind, as
454 * leaving it as FK_INVALID, would cause default FPU to be selected
455 * later and that could be double precision one. */
456 if (ArgFPUKind
!= ARM::FK_INVALID
&& !IsDP
)
458 FPUKind
= findSinglePrecisionFPU(DefaultFPU
);
459 if (FPUKind
== ARM::FK_INVALID
)
460 FPUKind
= ARM::FK_NONE
;
464 FPUKind
= findDoublePrecisionFPU(DefaultFPU
);
465 if (FPUKind
== ARM::FK_INVALID
)
468 } else if (Negated
) {
469 FPUKind
= ARM::FK_NONE
;
471 FPUKind
= DefaultFPU
;
473 ArgFPUKind
= FPUKind
;
476 return StartingNumFeatures
!= Features
.size();
479 ARM::ArchKind
ARM::convertV9toV8(ARM::ArchKind AK
) {
480 if (getProfileKind(AK
) != ProfileKind::A
)
481 return ARM::ArchKind::INVALID
;
482 if (AK
< ARM::ArchKind::ARMV9A
|| AK
> ARM::ArchKind::ARMV9_3A
)
483 return ARM::ArchKind::INVALID
;
484 unsigned AK_v8
= static_cast<unsigned>(ARM::ArchKind::ARMV8_5A
);
485 AK_v8
+= static_cast<unsigned>(AK
) -
486 static_cast<unsigned>(ARM::ArchKind::ARMV9A
);
487 return static_cast<ARM::ArchKind
>(AK_v8
);
490 StringRef
ARM::getDefaultCPU(StringRef Arch
) {
491 ArchKind AK
= parseArch(Arch
);
492 if (AK
== ArchKind::INVALID
)
495 // Look for multiple AKs to find the default for pair AK+Name.
496 for (const auto &CPU
: CPUNames
) {
497 if (CPU
.ArchID
== AK
&& CPU
.Default
)
501 // If we can't find a default then target the architecture instead
505 uint64_t ARM::parseHWDiv(StringRef HWDiv
) {
506 StringRef Syn
= getHWDivSynonym(HWDiv
);
507 for (const auto &D
: HWDivNames
) {
514 uint64_t ARM::parseArchExt(StringRef ArchExt
) {
515 for (const auto &A
: ARCHExtNames
) {
516 if (ArchExt
== A
.Name
)
522 ARM::ArchKind
ARM::parseCPUArch(StringRef CPU
) {
523 for (const auto &C
: CPUNames
) {
527 return ArchKind::INVALID
;
530 void ARM::fillValidCPUArchList(SmallVectorImpl
<StringRef
> &Values
) {
531 for (const auto &Arch
: CPUNames
) {
532 if (Arch
.ArchID
!= ArchKind::INVALID
)
533 Values
.push_back(Arch
.Name
);
537 StringRef
ARM::computeDefaultTargetABI(const Triple
&TT
, StringRef CPU
) {
539 CPU
.empty() ? TT
.getArchName() : getArchName(parseCPUArch(CPU
));
541 if (TT
.isOSBinFormatMachO()) {
542 if (TT
.getEnvironment() == Triple::EABI
||
543 TT
.getOS() == Triple::UnknownOS
||
544 parseArchProfile(ArchName
) == ProfileKind::M
)
549 } else if (TT
.isOSWindows())
550 // FIXME: this is invalid for WindowsCE.
553 // Select the default based on the platform.
554 switch (TT
.getEnvironment()) {
555 case Triple::Android
:
556 case Triple::GNUEABI
:
557 case Triple::GNUEABIHF
:
558 case Triple::MuslEABI
:
559 case Triple::MuslEABIHF
:
560 case Triple::OpenHOS
:
561 return "aapcs-linux";
568 if (TT
.isOSFreeBSD() || TT
.isOSOpenBSD() || TT
.isOSHaiku() ||
570 return "aapcs-linux";
575 StringRef
ARM::getARMCPUForArch(const llvm::Triple
&Triple
, StringRef MArch
) {
577 MArch
= Triple
.getArchName();
578 MArch
= llvm::ARM::getCanonicalArchName(MArch
);
580 // Some defaults are forced.
581 switch (Triple
.getOS()) {
582 case llvm::Triple::FreeBSD
:
583 case llvm::Triple::NetBSD
:
584 case llvm::Triple::OpenBSD
:
585 case llvm::Triple::Haiku
:
586 if (!MArch
.empty() && MArch
== "v6")
587 return "arm1176jzf-s";
588 if (!MArch
.empty() && MArch
== "v7")
591 case llvm::Triple::Win32
:
592 // FIXME: this is invalid for WindowsCE
593 if (llvm::ARM::parseArchVersion(MArch
) <= 7)
596 case llvm::Triple::IOS
:
597 case llvm::Triple::MacOSX
:
598 case llvm::Triple::TvOS
:
599 case llvm::Triple::WatchOS
:
600 case llvm::Triple::DriverKit
:
601 case llvm::Triple::XROS
:
612 StringRef CPU
= llvm::ARM::getDefaultCPU(MArch
);
613 if (!CPU
.empty() && !CPU
.equals("invalid"))
616 // If no specific architecture version is requested, return the minimum CPU
617 // required by the OS and environment.
618 switch (Triple
.getOS()) {
619 case llvm::Triple::Haiku
:
620 return "arm1176jzf-s";
621 case llvm::Triple::NetBSD
:
622 switch (Triple
.getEnvironment()) {
623 case llvm::Triple::EABI
:
624 case llvm::Triple::EABIHF
:
625 case llvm::Triple::GNUEABI
:
626 case llvm::Triple::GNUEABIHF
:
631 case llvm::Triple::NaCl
:
632 case llvm::Triple::OpenBSD
:
635 switch (Triple
.getEnvironment()) {
636 case llvm::Triple::EABIHF
:
637 case llvm::Triple::GNUEABIHF
:
638 case llvm::Triple::MuslEABIHF
:
639 return "arm1176jzf-s";
645 llvm_unreachable("invalid arch name");
648 void ARM::PrintSupportedExtensions(StringMap
<StringRef
> DescMap
) {
649 outs() << "All available -march extensions for ARM\n\n"
650 << " " << left_justify("Name", 20)
651 << (DescMap
.empty() ? "\n" : "Description\n");
652 for (const auto &Ext
: ARCHExtNames
) {
653 // Extensions without a feature cannot be used with -march.
654 if (!Ext
.Feature
.empty()) {
655 std::string Description
= DescMap
[Ext
.Name
].str();
657 << format(Description
.empty() ? "%s\n" : "%-20s%s\n",
658 Ext
.Name
.str().c_str(), Description
.c_str());