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[llvm-project.git] / llvm / lib / TargetParser / ARMTargetParser.cpp
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1 //===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements a target parser to recognise ARM hardware features
10 // such as FPU/CPU/ARCH/extensions and specific support such as HWDIV.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/TargetParser/ARMTargetParser.h"
15 #include "llvm/ADT/StringSwitch.h"
16 #include "llvm/Support/Format.h"
17 #include "llvm/Support/raw_ostream.h"
18 #include "llvm/TargetParser/ARMTargetParserCommon.h"
19 #include "llvm/TargetParser/Triple.h"
20 #include <cctype>
22 using namespace llvm;
24 static StringRef getHWDivSynonym(StringRef HWDiv) {
25 return StringSwitch<StringRef>(HWDiv)
26 .Case("thumb,arm", "arm,thumb")
27 .Default(HWDiv);
30 // Allows partial match, ex. "v7a" matches "armv7a".
31 ARM::ArchKind ARM::parseArch(StringRef Arch) {
32 Arch = getCanonicalArchName(Arch);
33 StringRef Syn = getArchSynonym(Arch);
34 for (const auto &A : ARMArchNames) {
35 if (A.Name.endswith(Syn))
36 return A.ID;
38 return ArchKind::INVALID;
41 // Version number (ex. v7 = 7).
42 unsigned ARM::parseArchVersion(StringRef Arch) {
43 Arch = getCanonicalArchName(Arch);
44 switch (parseArch(Arch)) {
45 case ArchKind::ARMV4:
46 case ArchKind::ARMV4T:
47 return 4;
48 case ArchKind::ARMV5T:
49 case ArchKind::ARMV5TE:
50 case ArchKind::IWMMXT:
51 case ArchKind::IWMMXT2:
52 case ArchKind::XSCALE:
53 case ArchKind::ARMV5TEJ:
54 return 5;
55 case ArchKind::ARMV6:
56 case ArchKind::ARMV6K:
57 case ArchKind::ARMV6T2:
58 case ArchKind::ARMV6KZ:
59 case ArchKind::ARMV6M:
60 return 6;
61 case ArchKind::ARMV7A:
62 case ArchKind::ARMV7VE:
63 case ArchKind::ARMV7R:
64 case ArchKind::ARMV7M:
65 case ArchKind::ARMV7S:
66 case ArchKind::ARMV7EM:
67 case ArchKind::ARMV7K:
68 return 7;
69 case ArchKind::ARMV8A:
70 case ArchKind::ARMV8_1A:
71 case ArchKind::ARMV8_2A:
72 case ArchKind::ARMV8_3A:
73 case ArchKind::ARMV8_4A:
74 case ArchKind::ARMV8_5A:
75 case ArchKind::ARMV8_6A:
76 case ArchKind::ARMV8_7A:
77 case ArchKind::ARMV8_8A:
78 case ArchKind::ARMV8_9A:
79 case ArchKind::ARMV8R:
80 case ArchKind::ARMV8MBaseline:
81 case ArchKind::ARMV8MMainline:
82 case ArchKind::ARMV8_1MMainline:
83 return 8;
84 case ArchKind::ARMV9A:
85 case ArchKind::ARMV9_1A:
86 case ArchKind::ARMV9_2A:
87 case ArchKind::ARMV9_3A:
88 case ArchKind::ARMV9_4A:
89 return 9;
90 case ArchKind::INVALID:
91 return 0;
93 llvm_unreachable("Unhandled architecture");
96 static ARM::ProfileKind getProfileKind(ARM::ArchKind AK) {
97 switch (AK) {
98 case ARM::ArchKind::ARMV6M:
99 case ARM::ArchKind::ARMV7M:
100 case ARM::ArchKind::ARMV7EM:
101 case ARM::ArchKind::ARMV8MMainline:
102 case ARM::ArchKind::ARMV8MBaseline:
103 case ARM::ArchKind::ARMV8_1MMainline:
104 return ARM::ProfileKind::M;
105 case ARM::ArchKind::ARMV7R:
106 case ARM::ArchKind::ARMV8R:
107 return ARM::ProfileKind::R;
108 case ARM::ArchKind::ARMV7A:
109 case ARM::ArchKind::ARMV7VE:
110 case ARM::ArchKind::ARMV7K:
111 case ARM::ArchKind::ARMV8A:
112 case ARM::ArchKind::ARMV8_1A:
113 case ARM::ArchKind::ARMV8_2A:
114 case ARM::ArchKind::ARMV8_3A:
115 case ARM::ArchKind::ARMV8_4A:
116 case ARM::ArchKind::ARMV8_5A:
117 case ARM::ArchKind::ARMV8_6A:
118 case ARM::ArchKind::ARMV8_7A:
119 case ARM::ArchKind::ARMV8_8A:
120 case ARM::ArchKind::ARMV8_9A:
121 case ARM::ArchKind::ARMV9A:
122 case ARM::ArchKind::ARMV9_1A:
123 case ARM::ArchKind::ARMV9_2A:
124 case ARM::ArchKind::ARMV9_3A:
125 case ARM::ArchKind::ARMV9_4A:
126 return ARM::ProfileKind::A;
127 case ARM::ArchKind::ARMV4:
128 case ARM::ArchKind::ARMV4T:
129 case ARM::ArchKind::ARMV5T:
130 case ARM::ArchKind::ARMV5TE:
131 case ARM::ArchKind::ARMV5TEJ:
132 case ARM::ArchKind::ARMV6:
133 case ARM::ArchKind::ARMV6K:
134 case ARM::ArchKind::ARMV6T2:
135 case ARM::ArchKind::ARMV6KZ:
136 case ARM::ArchKind::ARMV7S:
137 case ARM::ArchKind::IWMMXT:
138 case ARM::ArchKind::IWMMXT2:
139 case ARM::ArchKind::XSCALE:
140 case ARM::ArchKind::INVALID:
141 return ARM::ProfileKind::INVALID;
143 llvm_unreachable("Unhandled architecture");
146 // Profile A/R/M
147 ARM::ProfileKind ARM::parseArchProfile(StringRef Arch) {
148 Arch = getCanonicalArchName(Arch);
149 return getProfileKind(parseArch(Arch));
152 bool ARM::getFPUFeatures(ARM::FPUKind FPUKind,
153 std::vector<StringRef> &Features) {
155 if (FPUKind >= FK_LAST || FPUKind == FK_INVALID)
156 return false;
158 static const struct FPUFeatureNameInfo {
159 const char *PlusName, *MinusName;
160 FPUVersion MinVersion;
161 FPURestriction MaxRestriction;
162 } FPUFeatureInfoList[] = {
163 // We have to specify the + and - versions of the name in full so
164 // that we can return them as static StringRefs.
166 // Also, the SubtargetFeatures ending in just "sp" are listed here
167 // under FPURestriction::None, which is the only FPURestriction in
168 // which they would be valid (since FPURestriction::SP doesn't
169 // exist).
170 {"+vfp2", "-vfp2", FPUVersion::VFPV2, FPURestriction::D16},
171 {"+vfp2sp", "-vfp2sp", FPUVersion::VFPV2, FPURestriction::SP_D16},
172 {"+vfp3", "-vfp3", FPUVersion::VFPV3, FPURestriction::None},
173 {"+vfp3d16", "-vfp3d16", FPUVersion::VFPV3, FPURestriction::D16},
174 {"+vfp3d16sp", "-vfp3d16sp", FPUVersion::VFPV3, FPURestriction::SP_D16},
175 {"+vfp3sp", "-vfp3sp", FPUVersion::VFPV3, FPURestriction::None},
176 {"+fp16", "-fp16", FPUVersion::VFPV3_FP16, FPURestriction::SP_D16},
177 {"+vfp4", "-vfp4", FPUVersion::VFPV4, FPURestriction::None},
178 {"+vfp4d16", "-vfp4d16", FPUVersion::VFPV4, FPURestriction::D16},
179 {"+vfp4d16sp", "-vfp4d16sp", FPUVersion::VFPV4, FPURestriction::SP_D16},
180 {"+vfp4sp", "-vfp4sp", FPUVersion::VFPV4, FPURestriction::None},
181 {"+fp-armv8", "-fp-armv8", FPUVersion::VFPV5, FPURestriction::None},
182 {"+fp-armv8d16", "-fp-armv8d16", FPUVersion::VFPV5, FPURestriction::D16},
183 {"+fp-armv8d16sp", "-fp-armv8d16sp", FPUVersion::VFPV5, FPURestriction::SP_D16},
184 {"+fp-armv8sp", "-fp-armv8sp", FPUVersion::VFPV5, FPURestriction::None},
185 {"+fullfp16", "-fullfp16", FPUVersion::VFPV5_FULLFP16, FPURestriction::SP_D16},
186 {"+fp64", "-fp64", FPUVersion::VFPV2, FPURestriction::D16},
187 {"+d32", "-d32", FPUVersion::VFPV3, FPURestriction::None},
190 for (const auto &Info: FPUFeatureInfoList) {
191 if (FPUNames[FPUKind].FPUVer >= Info.MinVersion &&
192 FPUNames[FPUKind].Restriction <= Info.MaxRestriction)
193 Features.push_back(Info.PlusName);
194 else
195 Features.push_back(Info.MinusName);
198 static const struct NeonFeatureNameInfo {
199 const char *PlusName, *MinusName;
200 NeonSupportLevel MinSupportLevel;
201 } NeonFeatureInfoList[] = {
202 {"+neon", "-neon", NeonSupportLevel::Neon},
203 {"+sha2", "-sha2", NeonSupportLevel::Crypto},
204 {"+aes", "-aes", NeonSupportLevel::Crypto},
207 for (const auto &Info: NeonFeatureInfoList) {
208 if (FPUNames[FPUKind].NeonSupport >= Info.MinSupportLevel)
209 Features.push_back(Info.PlusName);
210 else
211 Features.push_back(Info.MinusName);
214 return true;
217 ARM::FPUKind ARM::parseFPU(StringRef FPU) {
218 StringRef Syn = getFPUSynonym(FPU);
219 for (const auto &F : FPUNames) {
220 if (Syn == F.Name)
221 return F.ID;
223 return FK_INVALID;
226 ARM::NeonSupportLevel ARM::getFPUNeonSupportLevel(ARM::FPUKind FPUKind) {
227 if (FPUKind >= FK_LAST)
228 return NeonSupportLevel::None;
229 return FPUNames[FPUKind].NeonSupport;
232 StringRef ARM::getFPUSynonym(StringRef FPU) {
233 return StringSwitch<StringRef>(FPU)
234 .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported
235 .Case("vfp2", "vfpv2")
236 .Case("vfp3", "vfpv3")
237 .Case("vfp4", "vfpv4")
238 .Case("vfp3-d16", "vfpv3-d16")
239 .Case("vfp4-d16", "vfpv4-d16")
240 .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16")
241 .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16")
242 .Case("fp5-sp-d16", "fpv5-sp-d16")
243 .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16")
244 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3.
245 .Case("neon-vfpv3", "neon")
246 .Default(FPU);
249 StringRef ARM::getFPUName(ARM::FPUKind FPUKind) {
250 if (FPUKind >= FK_LAST)
251 return StringRef();
252 return FPUNames[FPUKind].Name;
255 ARM::FPUVersion ARM::getFPUVersion(ARM::FPUKind FPUKind) {
256 if (FPUKind >= FK_LAST)
257 return FPUVersion::NONE;
258 return FPUNames[FPUKind].FPUVer;
261 ARM::FPURestriction ARM::getFPURestriction(ARM::FPUKind FPUKind) {
262 if (FPUKind >= FK_LAST)
263 return FPURestriction::None;
264 return FPUNames[FPUKind].Restriction;
267 ARM::FPUKind ARM::getDefaultFPU(StringRef CPU, ARM::ArchKind AK) {
268 if (CPU == "generic")
269 return ARM::ARMArchNames[static_cast<unsigned>(AK)].DefaultFPU;
271 return StringSwitch<ARM::FPUKind>(CPU)
272 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
273 .Case(NAME, DEFAULT_FPU)
274 #include "llvm/TargetParser/ARMTargetParser.def"
275 .Default(ARM::FK_INVALID);
278 uint64_t ARM::getDefaultExtensions(StringRef CPU, ARM::ArchKind AK) {
279 if (CPU == "generic")
280 return ARM::ARMArchNames[static_cast<unsigned>(AK)].ArchBaseExtensions;
282 return StringSwitch<uint64_t>(CPU)
283 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
284 .Case(NAME, \
285 ARMArchNames[static_cast<unsigned>(ArchKind::ID)].ArchBaseExtensions | \
286 DEFAULT_EXT)
287 #include "llvm/TargetParser/ARMTargetParser.def"
288 .Default(ARM::AEK_INVALID);
291 bool ARM::getHWDivFeatures(uint64_t HWDivKind,
292 std::vector<StringRef> &Features) {
294 if (HWDivKind == AEK_INVALID)
295 return false;
297 if (HWDivKind & AEK_HWDIVARM)
298 Features.push_back("+hwdiv-arm");
299 else
300 Features.push_back("-hwdiv-arm");
302 if (HWDivKind & AEK_HWDIVTHUMB)
303 Features.push_back("+hwdiv");
304 else
305 Features.push_back("-hwdiv");
307 return true;
310 bool ARM::getExtensionFeatures(uint64_t Extensions,
311 std::vector<StringRef> &Features) {
313 if (Extensions == AEK_INVALID)
314 return false;
316 for (const auto &AE : ARCHExtNames) {
317 if ((Extensions & AE.ID) == AE.ID && !AE.Feature.empty())
318 Features.push_back(AE.Feature);
319 else if (!AE.NegFeature.empty())
320 Features.push_back(AE.NegFeature);
323 return getHWDivFeatures(Extensions, Features);
326 StringRef ARM::getArchName(ARM::ArchKind AK) {
327 return ARMArchNames[static_cast<unsigned>(AK)].Name;
330 StringRef ARM::getCPUAttr(ARM::ArchKind AK) {
331 return ARMArchNames[static_cast<unsigned>(AK)].CPUAttr;
334 StringRef ARM::getSubArch(ARM::ArchKind AK) {
335 return ARMArchNames[static_cast<unsigned>(AK)].getSubArch();
338 unsigned ARM::getArchAttr(ARM::ArchKind AK) {
339 return ARMArchNames[static_cast<unsigned>(AK)].ArchAttr;
342 StringRef ARM::getArchExtName(uint64_t ArchExtKind) {
343 for (const auto &AE : ARCHExtNames) {
344 if (ArchExtKind == AE.ID)
345 return AE.Name;
347 return StringRef();
350 static bool stripNegationPrefix(StringRef &Name) {
351 if (Name.startswith("no")) {
352 Name = Name.substr(2);
353 return true;
355 return false;
358 StringRef ARM::getArchExtFeature(StringRef ArchExt) {
359 bool Negated = stripNegationPrefix(ArchExt);
360 for (const auto &AE : ARCHExtNames) {
361 if (!AE.Feature.empty() && ArchExt == AE.Name)
362 return StringRef(Negated ? AE.NegFeature : AE.Feature);
365 return StringRef();
368 static ARM::FPUKind findDoublePrecisionFPU(ARM::FPUKind InputFPUKind) {
369 if (InputFPUKind == ARM::FK_INVALID || InputFPUKind == ARM::FK_NONE)
370 return ARM::FK_INVALID;
372 const ARM::FPUName &InputFPU = ARM::FPUNames[InputFPUKind];
374 // If the input FPU already supports double-precision, then there
375 // isn't any different FPU we can return here.
376 if (ARM::isDoublePrecision(InputFPU.Restriction))
377 return InputFPUKind;
379 // Otherwise, look for an FPU entry with all the same fields, except
380 // that it supports double precision.
381 for (const ARM::FPUName &CandidateFPU : ARM::FPUNames) {
382 if (CandidateFPU.FPUVer == InputFPU.FPUVer &&
383 CandidateFPU.NeonSupport == InputFPU.NeonSupport &&
384 ARM::has32Regs(CandidateFPU.Restriction) ==
385 ARM::has32Regs(InputFPU.Restriction) &&
386 ARM::isDoublePrecision(CandidateFPU.Restriction)) {
387 return CandidateFPU.ID;
391 // nothing found
392 return ARM::FK_INVALID;
395 static ARM::FPUKind findSinglePrecisionFPU(ARM::FPUKind InputFPUKind) {
396 if (InputFPUKind == ARM::FK_INVALID || InputFPUKind == ARM::FK_NONE)
397 return ARM::FK_INVALID;
399 const ARM::FPUName &InputFPU = ARM::FPUNames[InputFPUKind];
401 // If the input FPU already is single-precision only, then there
402 // isn't any different FPU we can return here.
403 if (!ARM::isDoublePrecision(InputFPU.Restriction))
404 return InputFPUKind;
406 // Otherwise, look for an FPU entry with all the same fields, except
407 // that it does not support double precision.
408 for (const ARM::FPUName &CandidateFPU : ARM::FPUNames) {
409 if (CandidateFPU.FPUVer == InputFPU.FPUVer &&
410 CandidateFPU.NeonSupport == InputFPU.NeonSupport &&
411 ARM::has32Regs(CandidateFPU.Restriction) ==
412 ARM::has32Regs(InputFPU.Restriction) &&
413 !ARM::isDoublePrecision(CandidateFPU.Restriction)) {
414 return CandidateFPU.ID;
418 // nothing found
419 return ARM::FK_INVALID;
422 bool ARM::appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK,
423 StringRef ArchExt,
424 std::vector<StringRef> &Features,
425 ARM::FPUKind &ArgFPUKind) {
427 size_t StartingNumFeatures = Features.size();
428 const bool Negated = stripNegationPrefix(ArchExt);
429 uint64_t ID = parseArchExt(ArchExt);
431 if (ID == AEK_INVALID)
432 return false;
434 for (const auto &AE : ARCHExtNames) {
435 if (Negated) {
436 if ((AE.ID & ID) == ID && !AE.NegFeature.empty())
437 Features.push_back(AE.NegFeature);
438 } else {
439 if ((AE.ID & ID) == AE.ID && !AE.Feature.empty())
440 Features.push_back(AE.Feature);
444 if (CPU == "")
445 CPU = "generic";
447 if (ArchExt == "fp" || ArchExt == "fp.dp") {
448 const ARM::FPUKind DefaultFPU = getDefaultFPU(CPU, AK);
449 ARM::FPUKind FPUKind;
450 if (ArchExt == "fp.dp") {
451 const bool IsDP = ArgFPUKind != ARM::FK_INVALID &&
452 ArgFPUKind != ARM::FK_NONE &&
453 isDoublePrecision(getFPURestriction(ArgFPUKind));
454 if (Negated) {
455 /* If there is no FPU selected yet, we still need to set ArgFPUKind, as
456 * leaving it as FK_INVALID, would cause default FPU to be selected
457 * later and that could be double precision one. */
458 if (ArgFPUKind != ARM::FK_INVALID && !IsDP)
459 return true;
460 FPUKind = findSinglePrecisionFPU(DefaultFPU);
461 if (FPUKind == ARM::FK_INVALID)
462 FPUKind = ARM::FK_NONE;
463 } else {
464 if (IsDP)
465 return true;
466 FPUKind = findDoublePrecisionFPU(DefaultFPU);
467 if (FPUKind == ARM::FK_INVALID)
468 return false;
470 } else if (Negated) {
471 FPUKind = ARM::FK_NONE;
472 } else {
473 FPUKind = DefaultFPU;
475 ArgFPUKind = FPUKind;
476 return true;
478 return StartingNumFeatures != Features.size();
481 ARM::ArchKind ARM::convertV9toV8(ARM::ArchKind AK) {
482 if (getProfileKind(AK) != ProfileKind::A)
483 return ARM::ArchKind::INVALID;
484 if (AK < ARM::ArchKind::ARMV9A || AK > ARM::ArchKind::ARMV9_3A)
485 return ARM::ArchKind::INVALID;
486 unsigned AK_v8 = static_cast<unsigned>(ARM::ArchKind::ARMV8_5A);
487 AK_v8 += static_cast<unsigned>(AK) -
488 static_cast<unsigned>(ARM::ArchKind::ARMV9A);
489 return static_cast<ARM::ArchKind>(AK_v8);
492 StringRef ARM::getDefaultCPU(StringRef Arch) {
493 ArchKind AK = parseArch(Arch);
494 if (AK == ArchKind::INVALID)
495 return StringRef();
497 // Look for multiple AKs to find the default for pair AK+Name.
498 for (const auto &CPU : CPUNames) {
499 if (CPU.ArchID == AK && CPU.Default)
500 return CPU.Name;
503 // If we can't find a default then target the architecture instead
504 return "generic";
507 uint64_t ARM::parseHWDiv(StringRef HWDiv) {
508 StringRef Syn = getHWDivSynonym(HWDiv);
509 for (const auto &D : HWDivNames) {
510 if (Syn == D.Name)
511 return D.ID;
513 return AEK_INVALID;
516 uint64_t ARM::parseArchExt(StringRef ArchExt) {
517 for (const auto &A : ARCHExtNames) {
518 if (ArchExt == A.Name)
519 return A.ID;
521 return AEK_INVALID;
524 ARM::ArchKind ARM::parseCPUArch(StringRef CPU) {
525 for (const auto &C : CPUNames) {
526 if (CPU == C.Name)
527 return C.ArchID;
529 return ArchKind::INVALID;
532 void ARM::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {
533 for (const auto &Arch : CPUNames) {
534 if (Arch.ArchID != ArchKind::INVALID)
535 Values.push_back(Arch.Name);
539 StringRef ARM::computeDefaultTargetABI(const Triple &TT, StringRef CPU) {
540 StringRef ArchName =
541 CPU.empty() ? TT.getArchName() : getArchName(parseCPUArch(CPU));
543 if (TT.isOSBinFormatMachO()) {
544 if (TT.getEnvironment() == Triple::EABI ||
545 TT.getOS() == Triple::UnknownOS ||
546 parseArchProfile(ArchName) == ProfileKind::M)
547 return "aapcs";
548 if (TT.isWatchABI())
549 return "aapcs16";
550 return "apcs-gnu";
551 } else if (TT.isOSWindows())
552 // FIXME: this is invalid for WindowsCE.
553 return "aapcs";
555 // Select the default based on the platform.
556 switch (TT.getEnvironment()) {
557 case Triple::Android:
558 case Triple::GNUEABI:
559 case Triple::GNUEABIHF:
560 case Triple::MuslEABI:
561 case Triple::MuslEABIHF:
562 case Triple::OpenHOS:
563 return "aapcs-linux";
564 case Triple::EABIHF:
565 case Triple::EABI:
566 return "aapcs";
567 default:
568 if (TT.isOSNetBSD())
569 return "apcs-gnu";
570 if (TT.isOSFreeBSD() || TT.isOSOpenBSD() || TT.isOSHaiku() ||
571 TT.isOHOSFamily())
572 return "aapcs-linux";
573 return "aapcs";
577 StringRef ARM::getARMCPUForArch(const llvm::Triple &Triple, StringRef MArch) {
578 if (MArch.empty())
579 MArch = Triple.getArchName();
580 MArch = llvm::ARM::getCanonicalArchName(MArch);
582 // Some defaults are forced.
583 switch (Triple.getOS()) {
584 case llvm::Triple::FreeBSD:
585 case llvm::Triple::NetBSD:
586 case llvm::Triple::OpenBSD:
587 case llvm::Triple::Haiku:
588 if (!MArch.empty() && MArch == "v6")
589 return "arm1176jzf-s";
590 if (!MArch.empty() && MArch == "v7")
591 return "cortex-a8";
592 break;
593 case llvm::Triple::Win32:
594 // FIXME: this is invalid for WindowsCE
595 if (llvm::ARM::parseArchVersion(MArch) <= 7)
596 return "cortex-a9";
597 break;
598 case llvm::Triple::IOS:
599 case llvm::Triple::MacOSX:
600 case llvm::Triple::TvOS:
601 case llvm::Triple::WatchOS:
602 case llvm::Triple::DriverKit:
603 if (MArch == "v7k")
604 return "cortex-a7";
605 break;
606 default:
607 break;
610 if (MArch.empty())
611 return StringRef();
613 StringRef CPU = llvm::ARM::getDefaultCPU(MArch);
614 if (!CPU.empty() && !CPU.equals("invalid"))
615 return CPU;
617 // If no specific architecture version is requested, return the minimum CPU
618 // required by the OS and environment.
619 switch (Triple.getOS()) {
620 case llvm::Triple::Haiku:
621 return "arm1176jzf-s";
622 case llvm::Triple::NetBSD:
623 switch (Triple.getEnvironment()) {
624 case llvm::Triple::EABI:
625 case llvm::Triple::EABIHF:
626 case llvm::Triple::GNUEABI:
627 case llvm::Triple::GNUEABIHF:
628 return "arm926ej-s";
629 default:
630 return "strongarm";
632 case llvm::Triple::NaCl:
633 case llvm::Triple::OpenBSD:
634 return "cortex-a8";
635 default:
636 switch (Triple.getEnvironment()) {
637 case llvm::Triple::EABIHF:
638 case llvm::Triple::GNUEABIHF:
639 case llvm::Triple::MuslEABIHF:
640 return "arm1176jzf-s";
641 default:
642 return "arm7tdmi";
646 llvm_unreachable("invalid arch name");
649 void ARM::PrintSupportedExtensions(StringMap<StringRef> DescMap) {
650 outs() << "All available -march extensions for ARM\n\n"
651 << " " << left_justify("Name", 20)
652 << (DescMap.empty() ? "\n" : "Description\n");
653 for (const auto &Ext : ARCHExtNames) {
654 // Extensions without a feature cannot be used with -march.
655 if (!Ext.Feature.empty()) {
656 std::string Description = DescMap[Ext.Name].str();
657 outs() << " "
658 << format(Description.empty() ? "%s\n" : "%-20s%s\n",
659 Ext.Name.str().c_str(), Description.c_str());