llvm/lib/TargetParser/ARMTargetParser.cpp

   1 //===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file implements a target parser to recognise ARM hardware features
  10 // such as FPU/CPU/ARCH/extensions and specific support such as HWDIV.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "llvm/TargetParser/ARMTargetParser.h"
  15 #include "llvm/ADT/StringSwitch.h"
  16 #include "llvm/Support/Format.h"
  17 #include "llvm/Support/raw_ostream.h"
  18 #include "llvm/TargetParser/ARMTargetParserCommon.h"
  19 #include "llvm/TargetParser/Triple.h"
  20 #include <cctype>
  21
  22 using namespace llvm;
  23
  24 static StringRef getHWDivSynonym(StringRef HWDiv) {
  25   return StringSwitch<StringRef>(HWDiv)
  26       .Case("thumb,arm", "arm,thumb")
  27       .Default(HWDiv);
  28 }
  29
  30 // Allows partial match, ex. "v7a" matches "armv7a".
  31 ARM::ArchKind ARM::parseArch(StringRef Arch) {
  32   Arch = getCanonicalArchName(Arch);
  33   StringRef Syn = getArchSynonym(Arch);
  34   for (const auto &A : ARMArchNames) {
  35     if (A.Name.endswith(Syn))
  36       return A.ID;
  37   }
  38   return ArchKind::INVALID;
  39 }
  40
  41 // Version number (ex. v7 = 7).
  42 unsigned ARM::parseArchVersion(StringRef Arch) {
  43   Arch = getCanonicalArchName(Arch);
  44   switch (parseArch(Arch)) {
  45   case ArchKind::ARMV4:
  46   case ArchKind::ARMV4T:
  47     return 4;
  48   case ArchKind::ARMV5T:
  49   case ArchKind::ARMV5TE:
  50   case ArchKind::IWMMXT:
  51   case ArchKind::IWMMXT2:
  52   case ArchKind::XSCALE:
  53   case ArchKind::ARMV5TEJ:
  54     return 5;
  55   case ArchKind::ARMV6:
  56   case ArchKind::ARMV6K:
  57   case ArchKind::ARMV6T2:
  58   case ArchKind::ARMV6KZ:
  59   case ArchKind::ARMV6M:
  60     return 6;
  61   case ArchKind::ARMV7A:
  62   case ArchKind::ARMV7VE:
  63   case ArchKind::ARMV7R:
  64   case ArchKind::ARMV7M:
  65   case ArchKind::ARMV7S:
  66   case ArchKind::ARMV7EM:
  67   case ArchKind::ARMV7K:
  68     return 7;
  69   case ArchKind::ARMV8A:
  70   case ArchKind::ARMV8_1A:
  71   case ArchKind::ARMV8_2A:
  72   case ArchKind::ARMV8_3A:
  73   case ArchKind::ARMV8_4A:
  74   case ArchKind::ARMV8_5A:
  75   case ArchKind::ARMV8_6A:
  76   case ArchKind::ARMV8_7A:
  77   case ArchKind::ARMV8_8A:
  78   case ArchKind::ARMV8_9A:
  79   case ArchKind::ARMV8R:
  80   case ArchKind::ARMV8MBaseline:
  81   case ArchKind::ARMV8MMainline:
  82   case ArchKind::ARMV8_1MMainline:
  83     return 8;
  84   case ArchKind::ARMV9A:
  85   case ArchKind::ARMV9_1A:
  86   case ArchKind::ARMV9_2A:
  87   case ArchKind::ARMV9_3A:
  88   case ArchKind::ARMV9_4A:
  89     return 9;
  90   case ArchKind::INVALID:
  91     return 0;
  92   }
  93   llvm_unreachable("Unhandled architecture");
  94 }
  95
  96 static ARM::ProfileKind getProfileKind(ARM::ArchKind AK) {
  97   switch (AK) {
  98   case ARM::ArchKind::ARMV6M:
  99   case ARM::ArchKind::ARMV7M:
 100   case ARM::ArchKind::ARMV7EM:
 101   case ARM::ArchKind::ARMV8MMainline:
 102   case ARM::ArchKind::ARMV8MBaseline:
 103   case ARM::ArchKind::ARMV8_1MMainline:
 104     return ARM::ProfileKind::M;
 105   case ARM::ArchKind::ARMV7R:
 106   case ARM::ArchKind::ARMV8R:
 107     return ARM::ProfileKind::R;
 108   case ARM::ArchKind::ARMV7A:
 109   case ARM::ArchKind::ARMV7VE:
 110   case ARM::ArchKind::ARMV7K:
 111   case ARM::ArchKind::ARMV8A:
 112   case ARM::ArchKind::ARMV8_1A:
 113   case ARM::ArchKind::ARMV8_2A:
 114   case ARM::ArchKind::ARMV8_3A:
 115   case ARM::ArchKind::ARMV8_4A:
 116   case ARM::ArchKind::ARMV8_5A:
 117   case ARM::ArchKind::ARMV8_6A:
 118   case ARM::ArchKind::ARMV8_7A:
 119   case ARM::ArchKind::ARMV8_8A:
 120   case ARM::ArchKind::ARMV8_9A:
 121   case ARM::ArchKind::ARMV9A:
 122   case ARM::ArchKind::ARMV9_1A:
 123   case ARM::ArchKind::ARMV9_2A:
 124   case ARM::ArchKind::ARMV9_3A:
 125   case ARM::ArchKind::ARMV9_4A:
 126     return ARM::ProfileKind::A;
 127   case ARM::ArchKind::ARMV4:
 128   case ARM::ArchKind::ARMV4T:
 129   case ARM::ArchKind::ARMV5T:
 130   case ARM::ArchKind::ARMV5TE:
 131   case ARM::ArchKind::ARMV5TEJ:
 132   case ARM::ArchKind::ARMV6:
 133   case ARM::ArchKind::ARMV6K:
 134   case ARM::ArchKind::ARMV6T2:
 135   case ARM::ArchKind::ARMV6KZ:
 136   case ARM::ArchKind::ARMV7S:
 137   case ARM::ArchKind::IWMMXT:
 138   case ARM::ArchKind::IWMMXT2:
 139   case ARM::ArchKind::XSCALE:
 140   case ARM::ArchKind::INVALID:
 141     return ARM::ProfileKind::INVALID;
 142   }
 143   llvm_unreachable("Unhandled architecture");
 144 }
 145
 146 // Profile A/R/M
 147 ARM::ProfileKind ARM::parseArchProfile(StringRef Arch) {
 148   Arch = getCanonicalArchName(Arch);
 149   return getProfileKind(parseArch(Arch));
 150 }
 151
 152 bool ARM::getFPUFeatures(ARM::FPUKind FPUKind,
 153                          std::vector<StringRef> &Features) {
 154
 155   if (FPUKind >= FK_LAST || FPUKind == FK_INVALID)
 156     return false;
 157
 158   static const struct FPUFeatureNameInfo {
 159     const char *PlusName, *MinusName;
 160     FPUVersion MinVersion;
 161     FPURestriction MaxRestriction;
 162   } FPUFeatureInfoList[] = {
 163     // We have to specify the + and - versions of the name in full so
 164     // that we can return them as static StringRefs.
 165     //
 166     // Also, the SubtargetFeatures ending in just "sp" are listed here
 167     // under FPURestriction::None, which is the only FPURestriction in
 168     // which they would be valid (since FPURestriction::SP doesn't
 169     // exist).
 170     {"+vfp2", "-vfp2", FPUVersion::VFPV2, FPURestriction::D16},
 171     {"+vfp2sp", "-vfp2sp", FPUVersion::VFPV2, FPURestriction::SP_D16},
 172     {"+vfp3", "-vfp3", FPUVersion::VFPV3, FPURestriction::None},
 173     {"+vfp3d16", "-vfp3d16", FPUVersion::VFPV3, FPURestriction::D16},
 174     {"+vfp3d16sp", "-vfp3d16sp", FPUVersion::VFPV3, FPURestriction::SP_D16},
 175     {"+vfp3sp", "-vfp3sp", FPUVersion::VFPV3, FPURestriction::None},
 176     {"+fp16", "-fp16", FPUVersion::VFPV3_FP16, FPURestriction::SP_D16},
 177     {"+vfp4", "-vfp4", FPUVersion::VFPV4, FPURestriction::None},
 178     {"+vfp4d16", "-vfp4d16", FPUVersion::VFPV4, FPURestriction::D16},
 179     {"+vfp4d16sp", "-vfp4d16sp", FPUVersion::VFPV4, FPURestriction::SP_D16},
 180     {"+vfp4sp", "-vfp4sp", FPUVersion::VFPV4, FPURestriction::None},
 181     {"+fp-armv8", "-fp-armv8", FPUVersion::VFPV5, FPURestriction::None},
 182     {"+fp-armv8d16", "-fp-armv8d16", FPUVersion::VFPV5, FPURestriction::D16},
 183     {"+fp-armv8d16sp", "-fp-armv8d16sp", FPUVersion::VFPV5, FPURestriction::SP_D16},
 184     {"+fp-armv8sp", "-fp-armv8sp", FPUVersion::VFPV5, FPURestriction::None},
 185     {"+fullfp16", "-fullfp16", FPUVersion::VFPV5_FULLFP16, FPURestriction::SP_D16},
 186     {"+fp64", "-fp64", FPUVersion::VFPV2, FPURestriction::D16},
 187     {"+d32", "-d32", FPUVersion::VFPV3, FPURestriction::None},
 188   };
 189
 190   for (const auto &Info: FPUFeatureInfoList) {
 191     if (FPUNames[FPUKind].FPUVer >= Info.MinVersion &&
 192         FPUNames[FPUKind].Restriction <= Info.MaxRestriction)
 193       Features.push_back(Info.PlusName);
 194     else
 195       Features.push_back(Info.MinusName);
 196   }
 197
 198   static const struct NeonFeatureNameInfo {
 199     const char *PlusName, *MinusName;
 200     NeonSupportLevel MinSupportLevel;
 201   } NeonFeatureInfoList[] = {
 202       {"+neon", "-neon", NeonSupportLevel::Neon},
 203       {"+sha2", "-sha2", NeonSupportLevel::Crypto},
 204       {"+aes", "-aes", NeonSupportLevel::Crypto},
 205   };
 206
 207   for (const auto &Info: NeonFeatureInfoList) {
 208     if (FPUNames[FPUKind].NeonSupport >= Info.MinSupportLevel)
 209       Features.push_back(Info.PlusName);
 210     else
 211       Features.push_back(Info.MinusName);
 212   }
 213
 214   return true;
 215 }
 216
 217 ARM::FPUKind ARM::parseFPU(StringRef FPU) {
 218   StringRef Syn = getFPUSynonym(FPU);
 219   for (const auto &F : FPUNames) {
 220     if (Syn == F.Name)
 221       return F.ID;
 222   }
 223   return FK_INVALID;
 224 }
 225
 226 ARM::NeonSupportLevel ARM::getFPUNeonSupportLevel(ARM::FPUKind FPUKind) {
 227   if (FPUKind >= FK_LAST)
 228     return NeonSupportLevel::None;
 229   return FPUNames[FPUKind].NeonSupport;
 230 }
 231
 232 StringRef ARM::getFPUSynonym(StringRef FPU) {
 233   return StringSwitch<StringRef>(FPU)
 234       .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported
 235       .Case("vfp2", "vfpv2")
 236       .Case("vfp3", "vfpv3")
 237       .Case("vfp4", "vfpv4")
 238       .Case("vfp3-d16", "vfpv3-d16")
 239       .Case("vfp4-d16", "vfpv4-d16")
 240       .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16")
 241       .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16")
 242       .Case("fp5-sp-d16", "fpv5-sp-d16")
 243       .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16")
 244       // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3.
 245       .Case("neon-vfpv3", "neon")
 246       .Default(FPU);
 247 }
 248
 249 StringRef ARM::getFPUName(ARM::FPUKind FPUKind) {
 250   if (FPUKind >= FK_LAST)
 251     return StringRef();
 252   return FPUNames[FPUKind].Name;
 253 }
 254
 255 ARM::FPUVersion ARM::getFPUVersion(ARM::FPUKind FPUKind) {
 256   if (FPUKind >= FK_LAST)
 257     return FPUVersion::NONE;
 258   return FPUNames[FPUKind].FPUVer;
 259 }
 260
 261 ARM::FPURestriction ARM::getFPURestriction(ARM::FPUKind FPUKind) {
 262   if (FPUKind >= FK_LAST)
 263     return FPURestriction::None;
 264   return FPUNames[FPUKind].Restriction;
 265 }
 266
 267 ARM::FPUKind ARM::getDefaultFPU(StringRef CPU, ARM::ArchKind AK) {
 268   if (CPU == "generic")
 269     return ARM::ARMArchNames[static_cast<unsigned>(AK)].DefaultFPU;
 270
 271   return StringSwitch<ARM::FPUKind>(CPU)
 272 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)           \
 273   .Case(NAME, DEFAULT_FPU)
 274 #include "llvm/TargetParser/ARMTargetParser.def"
 275       .Default(ARM::FK_INVALID);
 276 }
 277
 278 uint64_t ARM::getDefaultExtensions(StringRef CPU, ARM::ArchKind AK) {
 279   if (CPU == "generic")
 280     return ARM::ARMArchNames[static_cast<unsigned>(AK)].ArchBaseExtensions;
 281
 282   return StringSwitch<uint64_t>(CPU)
 283 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)           \
 284   .Case(NAME,                                                                  \
 285         ARMArchNames[static_cast<unsigned>(ArchKind::ID)].ArchBaseExtensions | \
 286             DEFAULT_EXT)
 287 #include "llvm/TargetParser/ARMTargetParser.def"
 288   .Default(ARM::AEK_INVALID);
 289 }
 290
 291 bool ARM::getHWDivFeatures(uint64_t HWDivKind,
 292                            std::vector<StringRef> &Features) {
 293
 294   if (HWDivKind == AEK_INVALID)
 295     return false;
 296
 297   if (HWDivKind & AEK_HWDIVARM)
 298     Features.push_back("+hwdiv-arm");
 299   else
 300     Features.push_back("-hwdiv-arm");
 301
 302   if (HWDivKind & AEK_HWDIVTHUMB)
 303     Features.push_back("+hwdiv");
 304   else
 305     Features.push_back("-hwdiv");
 306
 307   return true;
 308 }
 309
 310 bool ARM::getExtensionFeatures(uint64_t Extensions,
 311                                std::vector<StringRef> &Features) {
 312
 313   if (Extensions == AEK_INVALID)
 314     return false;
 315
 316   for (const auto &AE : ARCHExtNames) {
 317     if ((Extensions & AE.ID) == AE.ID && !AE.Feature.empty())
 318       Features.push_back(AE.Feature);
 319     else if (!AE.NegFeature.empty())
 320       Features.push_back(AE.NegFeature);
 321   }
 322
 323   return getHWDivFeatures(Extensions, Features);
 324 }
 325
 326 StringRef ARM::getArchName(ARM::ArchKind AK) {
 327   return ARMArchNames[static_cast<unsigned>(AK)].Name;
 328 }
 329
 330 StringRef ARM::getCPUAttr(ARM::ArchKind AK) {
 331   return ARMArchNames[static_cast<unsigned>(AK)].CPUAttr;
 332 }
 333
 334 StringRef ARM::getSubArch(ARM::ArchKind AK) {
 335   return ARMArchNames[static_cast<unsigned>(AK)].getSubArch();
 336 }
 337
 338 unsigned ARM::getArchAttr(ARM::ArchKind AK) {
 339   return ARMArchNames[static_cast<unsigned>(AK)].ArchAttr;
 340 }
 341
 342 StringRef ARM::getArchExtName(uint64_t ArchExtKind) {
 343   for (const auto &AE : ARCHExtNames) {
 344     if (ArchExtKind == AE.ID)
 345       return AE.Name;
 346   }
 347   return StringRef();
 348 }
 349
 350 static bool stripNegationPrefix(StringRef &Name) {
 351   if (Name.startswith("no")) {
 352     Name = Name.substr(2);
 353     return true;
 354   }
 355   return false;
 356 }
 357
 358 StringRef ARM::getArchExtFeature(StringRef ArchExt) {
 359   bool Negated = stripNegationPrefix(ArchExt);
 360   for (const auto &AE : ARCHExtNames) {
 361     if (!AE.Feature.empty() && ArchExt == AE.Name)
 362       return StringRef(Negated ? AE.NegFeature : AE.Feature);
 363   }
 364
 365   return StringRef();
 366 }
 367
 368 static ARM::FPUKind findDoublePrecisionFPU(ARM::FPUKind InputFPUKind) {
 369   const ARM::FPUName &InputFPU = ARM::FPUNames[InputFPUKind];
 370
 371   // If the input FPU already supports double-precision, then there
 372   // isn't any different FPU we can return here.
 373   //
 374   // The current available FPURestriction values are None (no
 375   // restriction), D16 (only 16 d-regs) and SP_D16 (16 d-regs
 376   // and single precision only); there's no value representing
 377   // SP restriction without D16. So this test just means 'is it
 378   // SP only?'.
 379   if (InputFPU.Restriction != ARM::FPURestriction::SP_D16)
 380     return ARM::FK_INVALID;
 381
 382   // Otherwise, look for an FPU entry with all the same fields, except
 383   // that SP_D16 has been replaced with just D16, representing adding
 384   // double precision and not changing anything else.
 385   for (const ARM::FPUName &CandidateFPU : ARM::FPUNames) {
 386     if (CandidateFPU.FPUVer == InputFPU.FPUVer &&
 387         CandidateFPU.NeonSupport == InputFPU.NeonSupport &&
 388         CandidateFPU.Restriction == ARM::FPURestriction::D16) {
 389       return CandidateFPU.ID;
 390     }
 391   }
 392
 393   // nothing found
 394   return ARM::FK_INVALID;
 395 }
 396
 397 bool ARM::appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK,
 398                                 StringRef ArchExt,
 399                                 std::vector<StringRef> &Features,
 400                                 ARM::FPUKind &ArgFPUKind) {
 401
 402   size_t StartingNumFeatures = Features.size();
 403   const bool Negated = stripNegationPrefix(ArchExt);
 404   uint64_t ID = parseArchExt(ArchExt);
 405
 406   if (ID == AEK_INVALID)
 407     return false;
 408
 409   for (const auto &AE : ARCHExtNames) {
 410     if (Negated) {
 411       if ((AE.ID & ID) == ID && !AE.NegFeature.empty())
 412         Features.push_back(AE.NegFeature);
 413     } else {
 414       if ((AE.ID & ID) == AE.ID && !AE.Feature.empty())
 415         Features.push_back(AE.Feature);
 416     }
 417   }
 418
 419   if (CPU == "")
 420     CPU = "generic";
 421
 422   if (ArchExt == "fp" || ArchExt == "fp.dp") {
 423     ARM::FPUKind FPUKind;
 424     if (ArchExt == "fp.dp") {
 425       if (Negated) {
 426         Features.push_back("-fp64");
 427         return true;
 428       }
 429       FPUKind = findDoublePrecisionFPU(getDefaultFPU(CPU, AK));
 430     } else if (Negated) {
 431       FPUKind = ARM::FK_NONE;
 432     } else {
 433       FPUKind = getDefaultFPU(CPU, AK);
 434     }
 435     ArgFPUKind = FPUKind;
 436     return ARM::getFPUFeatures(FPUKind, Features);
 437   }
 438   return StartingNumFeatures != Features.size();
 439 }
 440
 441 ARM::ArchKind ARM::convertV9toV8(ARM::ArchKind AK) {
 442   if (getProfileKind(AK) != ProfileKind::A)
 443     return ARM::ArchKind::INVALID;
 444   if (AK < ARM::ArchKind::ARMV9A || AK > ARM::ArchKind::ARMV9_3A)
 445     return ARM::ArchKind::INVALID;
 446   unsigned AK_v8 = static_cast<unsigned>(ARM::ArchKind::ARMV8_5A);
 447   AK_v8 += static_cast<unsigned>(AK) -
 448            static_cast<unsigned>(ARM::ArchKind::ARMV9A);
 449   return static_cast<ARM::ArchKind>(AK_v8);
 450 }
 451
 452 StringRef ARM::getDefaultCPU(StringRef Arch) {
 453   ArchKind AK = parseArch(Arch);
 454   if (AK == ArchKind::INVALID)
 455     return StringRef();
 456
 457   // Look for multiple AKs to find the default for pair AK+Name.
 458   for (const auto &CPU : CPUNames) {
 459     if (CPU.ArchID == AK && CPU.Default)
 460       return CPU.Name;
 461   }
 462
 463   // If we can't find a default then target the architecture instead
 464   return "generic";
 465 }
 466
 467 uint64_t ARM::parseHWDiv(StringRef HWDiv) {
 468   StringRef Syn = getHWDivSynonym(HWDiv);
 469   for (const auto &D : HWDivNames) {
 470     if (Syn == D.Name)
 471       return D.ID;
 472   }
 473   return AEK_INVALID;
 474 }
 475
 476 uint64_t ARM::parseArchExt(StringRef ArchExt) {
 477   for (const auto &A : ARCHExtNames) {
 478     if (ArchExt == A.Name)
 479       return A.ID;
 480   }
 481   return AEK_INVALID;
 482 }
 483
 484 ARM::ArchKind ARM::parseCPUArch(StringRef CPU) {
 485   for (const auto &C : CPUNames) {
 486     if (CPU == C.Name)
 487       return C.ArchID;
 488   }
 489   return ArchKind::INVALID;
 490 }
 491
 492 void ARM::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {
 493   for (const auto &Arch : CPUNames) {
 494     if (Arch.ArchID != ArchKind::INVALID)
 495       Values.push_back(Arch.Name);
 496   }
 497 }
 498
 499 StringRef ARM::computeDefaultTargetABI(const Triple &TT, StringRef CPU) {
 500   StringRef ArchName =
 501       CPU.empty() ? TT.getArchName() : getArchName(parseCPUArch(CPU));
 502
 503   if (TT.isOSBinFormatMachO()) {
 504     if (TT.getEnvironment() == Triple::EABI ||
 505         TT.getOS() == Triple::UnknownOS ||
 506         parseArchProfile(ArchName) == ProfileKind::M)
 507       return "aapcs";
 508     if (TT.isWatchABI())
 509       return "aapcs16";
 510     return "apcs-gnu";
 511   } else if (TT.isOSWindows())
 512     // FIXME: this is invalid for WindowsCE.
 513     return "aapcs";
 514
 515   // Select the default based on the platform.
 516   switch (TT.getEnvironment()) {
 517   case Triple::Android:
 518   case Triple::GNUEABI:
 519   case Triple::GNUEABIHF:
 520   case Triple::MuslEABI:
 521   case Triple::MuslEABIHF:
 522     return "aapcs-linux";
 523   case Triple::EABIHF:
 524   case Triple::EABI:
 525     return "aapcs";
 526   default:
 527     if (TT.isOSNetBSD())
 528       return "apcs-gnu";
 529     if (TT.isOSFreeBSD() || TT.isOSOpenBSD() || TT.isOHOSFamily())
 530       return "aapcs-linux";
 531     return "aapcs";
 532   }
 533 }
 534
 535 StringRef ARM::getARMCPUForArch(const llvm::Triple &Triple, StringRef MArch) {
 536   if (MArch.empty())
 537     MArch = Triple.getArchName();
 538   MArch = llvm::ARM::getCanonicalArchName(MArch);
 539
 540   // Some defaults are forced.
 541   switch (Triple.getOS()) {
 542   case llvm::Triple::FreeBSD:
 543   case llvm::Triple::NetBSD:
 544   case llvm::Triple::OpenBSD:
 545     if (!MArch.empty() && MArch == "v6")
 546       return "arm1176jzf-s";
 547     if (!MArch.empty() && MArch == "v7")
 548       return "cortex-a8";
 549     break;
 550   case llvm::Triple::Win32:
 551     // FIXME: this is invalid for WindowsCE
 552     if (llvm::ARM::parseArchVersion(MArch) <= 7)
 553       return "cortex-a9";
 554     break;
 555   case llvm::Triple::IOS:
 556   case llvm::Triple::MacOSX:
 557   case llvm::Triple::TvOS:
 558   case llvm::Triple::WatchOS:
 559   case llvm::Triple::DriverKit:
 560     if (MArch == "v7k")
 561       return "cortex-a7";
 562     break;
 563   default:
 564     break;
 565   }
 566
 567   if (MArch.empty())
 568     return StringRef();
 569
 570   StringRef CPU = llvm::ARM::getDefaultCPU(MArch);
 571   if (!CPU.empty() && !CPU.equals("invalid"))
 572     return CPU;
 573
 574   // If no specific architecture version is requested, return the minimum CPU
 575   // required by the OS and environment.
 576   switch (Triple.getOS()) {
 577   case llvm::Triple::NetBSD:
 578     switch (Triple.getEnvironment()) {
 579     case llvm::Triple::EABI:
 580     case llvm::Triple::EABIHF:
 581     case llvm::Triple::GNUEABI:
 582     case llvm::Triple::GNUEABIHF:
 583       return "arm926ej-s";
 584     default:
 585       return "strongarm";
 586     }
 587   case llvm::Triple::NaCl:
 588   case llvm::Triple::OpenBSD:
 589     return "cortex-a8";
 590   default:
 591     switch (Triple.getEnvironment()) {
 592     case llvm::Triple::EABIHF:
 593     case llvm::Triple::GNUEABIHF:
 594     case llvm::Triple::MuslEABIHF:
 595       return "arm1176jzf-s";
 596     default:
 597       return "arm7tdmi";
 598     }
 599   }
 600
 601   llvm_unreachable("invalid arch name");
 602 }
 603
 604 void ARM::PrintSupportedExtensions(StringMap<StringRef> DescMap) {
 605   outs() << "All available -march extensions for ARM\n\n"
 606          << "    " << left_justify("Name", 20)
 607          << (DescMap.empty() ? "\n" : "Description\n");
 608   for (const auto &Ext : ARCHExtNames) {
 609     // Extensions without a feature cannot be used with -march.
 610     if (!Ext.Feature.empty()) {
 611       std::string Description = DescMap[Ext.Name].str();
 612       outs() << "    "
 613              << format(Description.empty() ? "%s\n" : "%-20s%s\n",
 614                        Ext.Name.str().c_str(), Description.c_str());
 615     }
 616   }
 617 }