llvm/test/MC/SystemZ/fixups.s

   1
   2 # RUN: llvm-mc -triple s390x-unknown-unknown -mcpu=z13 --show-encoding %s | FileCheck %s
   3
   4 # RUN: llvm-mc -triple s390x-unknown-unknown -mcpu=z13 -filetype=obj %s | \
   5 # RUN: llvm-readobj -r - | FileCheck %s -check-prefix=CHECK-REL
   6
   7 # RUN: llvm-mc -triple s390x-unknown-unknown -mcpu=z13 -filetype=obj %s | \
   8 # RUN: llvm-objdump -d - | FileCheck %s -check-prefix=CHECK-DIS
   9
  10 # CHECK: larl %r14, target                      # encoding: [0xc0,0xe0,A,A,A,A]
  11 # CHECK-NEXT:                                   # fixup A - offset: 2, value: target+2, kind: FK_390_PC32DBL
  12 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_PC32DBL target 0x2
  13         .align 16
  14         larl %r14, target
  15
  16 # CHECK: larl %r14, target@GOT                  # encoding: [0xc0,0xe0,A,A,A,A]
  17 # CHECK-NEXT:                                   # fixup A - offset: 2, value: target@GOT+2, kind: FK_390_PC32DBL
  18 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_GOTENT target 0x2
  19         .align 16
  20         larl %r14, target@got
  21
  22 # CHECK: larl %r14, target@INDNTPOFF            # encoding: [0xc0,0xe0,A,A,A,A]
  23 # CHECK-NEXT:                                   # fixup A - offset: 2, value: target@INDNTPOFF+2, kind: FK_390_PC32DBL
  24 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_TLS_IEENT target 0x2
  25         .align 16
  26         larl %r14, target@indntpoff
  27
  28 # CHECK: brasl %r14, target                     # encoding: [0xc0,0xe5,A,A,A,A]
  29 # CHECK-NEXT:                                   # fixup A - offset: 2, value: target+2, kind: FK_390_PC32DBL
  30 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_PC32DBL target 0x2
  31         .align 16
  32         brasl %r14, target
  33
  34 # CHECK: brasl %r14, target@PLT                 # encoding: [0xc0,0xe5,A,A,A,A]
  35 # CHECK-NEXT:                                   # fixup A - offset: 2, value: target@PLT+2, kind: FK_390_PC32DBL
  36 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_PLT32DBL target 0x2
  37         .align 16
  38         brasl %r14, target@plt
  39
  40 # CHECK: brasl %r14, target@PLT:tls_gdcall:sym  # encoding: [0xc0,0xe5,A,A,A,A]
  41 # CHECK-NEXT:                                   # fixup A - offset: 2, value: target@PLT+2, kind: FK_390_PC32DBL
  42 # CHECK-NEXT:                                   # fixup B - offset: 0, value: sym@TLSGD, kind: FK_390_TLS_CALL
  43 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_PLT32DBL target 0x2
  44 # CHECK-REL:                                    0x{{[0-9A-F]*0}} R_390_TLS_GDCALL sym 0x0
  45         .align 16
  46         brasl %r14, target@plt:tls_gdcall:sym
  47
  48 # CHECK: brasl %r14, target@PLT:tls_ldcall:sym  # encoding: [0xc0,0xe5,A,A,A,A]
  49 # CHECK-NEXT:                                   # fixup A - offset: 2, value: target@PLT+2, kind: FK_390_PC32DBL
  50 # CHECK-NEXT:                                   # fixup B - offset: 0, value: sym@TLSLDM, kind: FK_390_TLS_CALL
  51 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_PLT32DBL target 0x2
  52 # CHECK-REL:                                    0x{{[0-9A-F]*0}} R_390_TLS_LDCALL sym 0x0
  53         .align 16
  54         brasl %r14, target@plt:tls_ldcall:sym
  55
  56 # CHECK: bras %r14, target                      # encoding: [0xa7,0xe5,A,A]
  57 # CHECK-NEXT:                                   # fixup A - offset: 2, value: target+2, kind: FK_390_PC16DBL
  58 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_PC16DBL target 0x2
  59         .align 16
  60         bras %r14, target
  61
  62 # CHECK: bras %r14, target@PLT                  # encoding: [0xa7,0xe5,A,A]
  63 # CHECK-NEXT:                                   # fixup A - offset: 2, value: target@PLT+2, kind: FK_390_PC16DBL
  64 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_PLT16DBL target 0x2
  65         .align 16
  66         bras %r14, target@plt
  67
  68 # CHECK: bras %r14, target@PLT:tls_gdcall:sym   # encoding: [0xa7,0xe5,A,A]
  69 # CHECK-NEXT:                                   # fixup A - offset: 2, value: target@PLT+2, kind: FK_390_PC16DBL
  70 # CHECK-NEXT:                                   # fixup B - offset: 0, value: sym@TLSGD, kind: FK_390_TLS_CALL
  71 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_PLT16DBL target 0x2
  72 # CHECK-REL:                                    0x{{[0-9A-F]*0}} R_390_TLS_GDCALL sym 0x0
  73         .align 16
  74         bras %r14, target@plt:tls_gdcall:sym
  75
  76 # CHECK: bras %r14, target@PLT:tls_ldcall:sym   # encoding: [0xa7,0xe5,A,A]
  77 # CHECK-NEXT:                                   # fixup A - offset: 2, value: target@PLT+2, kind: FK_390_PC16DBL
  78 # CHECK-NEXT:                                   # fixup B - offset: 0, value: sym@TLSLDM, kind: FK_390_TLS_CALL
  79 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_PLT16DBL target 0x2
  80 # CHECK-REL:                                    0x{{[0-9A-F]*0}} R_390_TLS_LDCALL sym 0x0
  81         .align 16
  82         bras %r14, target@plt:tls_ldcall:sym
  83
  84
  85 # Symbolic displacements
  86
  87 ## BD12
  88 # CHECK: vl %v0, src                            # encoding: [0xe7,0x00,0b0000AAAA,A,0x00,0x06]
  89 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
  90 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_12 src 0x0
  91         .align 16
  92         vl %v0, src
  93
  94 # CHECK: vl %v0, src(%r1)                       # encoding: [0xe7,0x00,0b0001AAAA,A,0x00,0x06]
  95 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
  96 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_12 src 0x0
  97         .align 16
  98         vl %v0, src(%r1)
  99
 100 # CHECK: .insn vrx,253987186016262,%v0,src(%r1),3  # encoding: [0xe7,0x00,0b0001AAAA,A,0x30,0x06]
 101 # CHECK-NEXT:                                      # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
 102 # CHECK-REL:                                       0x{{[0-9A-F]*2}} R_390_12 src 0x0
 103         .align 16
 104         .insn vrx,0xe70000000006,%v0,src(%r1),3    # vl
 105
 106 ## BD20
 107 # CHECK: lmg %r6, %r15, src                     # encoding: [0xeb,0x6f,0b0000AAAA,A,A,0x04]
 108 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src, kind: FK_390_S20Imm
 109 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_20 src 0x0
 110         .align 16
 111         lmg %r6, %r15, src
 112
 113 # CHECK: lmg %r6, %r15, src(%r1)                # encoding: [0xeb,0x6f,0b0001AAAA,A,A,0x04]
 114 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src, kind: FK_390_S20Imm
 115 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_20 src 0x0
 116         .align 16
 117         lmg %r6, %r15, src(%r1)
 118
 119 # CHECK: .insn siy,258385232527441,src(%r15),240  # encoding: [0xeb,0xf0,0b1111AAAA,A,A,0x51]
 120 # CHECK-NEXT:                                     # fixup A - offset: 2, value: src, kind: FK_390_S20Imm
 121 # CHECK-REL:                                      0x{{[0-9A-F]*2}} R_390_20 src 0x0
 122         .align 16
 123         .insn siy,0xeb0000000051,src(%r15),240    # tmy
 124
 125 ## BDX12
 126 # CHECK: la %r14, src                           # encoding: [0x41,0xe0,0b0000AAAA,A]
 127 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
 128 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_12 src 0x0
 129         .align 16
 130         la %r14, src
 131
 132 # CHECK: la %r14, src(%r1)                      # encoding: [0x41,0xe0,0b0001AAAA,A]
 133 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
 134 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_12 src 0x0
 135         .align 16
 136         la %r14, src(%r1)
 137
 138 # CHECK: la %r14, src(%r1,%r2)                  # encoding: [0x41,0xe1,0b0010AAAA,A]
 139 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
 140 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_12 src 0x0
 141         .align 16
 142         la %r14, src(%r1, %r2)
 143
 144 # CHECK: .insn vrx,253987186016262,%v2,src(%r2,%r3),3  # encoding: [0xe7,0x22,0b0011AAAA,A,0x30,0x06]
 145 # CHECK-NEXT:                                          # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
 146 # CHECK-REL:                                           0x{{[0-9A-F]*2}} R_390_12 src 0x0
 147         .align 16
 148         .insn vrx,0xe70000000006,%v2,src(%r2, %r3),3   # vl
 149
 150 ##BDX20
 151 # CHECK: lg %r14, src                           # encoding: [0xe3,0xe0,0b0000AAAA,A,A,0x04]
 152 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src, kind: FK_390_S20Imm
 153 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_20 src 0x0
 154         .align 16
 155         lg %r14, src
 156
 157 # CHECK: lg %r14, src(%r1)                      # encoding: [0xe3,0xe0,0b0001AAAA,A,A,0x04]
 158 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src, kind: FK_390_S20Imm
 159 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_20 src 0x0
 160         .align 16
 161         lg %r14, src(%r1)
 162
 163 # CHECK: lg %r14, src(%r1,%r2)                  # encoding: [0xe3,0xe1,0b0010AAAA,A,A,0x04]
 164 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src, kind: FK_390_S20Imm
 165 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_20 src 0x0
 166         .align 16
 167         lg %r14, src(%r1, %r2)
 168
 169 # CHECK:  .insn rxy,260584255783013,%f1,src(%r2,%r15)  # encoding: [0xed,0x12,0b1111AAAA,A,A,0x65]
 170 # CHECK-NEXT:                                          # fixup A - offset: 2, value: src, kind: FK_390_S20Imm
 171 # CHECK-REL:                                           0x{{[0-9A-F]*2}} R_390_20 src 0x0
 172         .align 16
 173         .insn rxy,0xed0000000065,%f1,src(%r2,%r15)     # ldy
 174
 175 ##BD12L4
 176 # CHECK: tp src(16)                             # encoding: [0xeb,0xf0,0b0000AAAA,A,0x00,0xc0]
 177 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
 178 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_12 src 0x0
 179         .align 16
 180         tp src(16)
 181
 182 # CHECK: tp src(16,%r1)                         # encoding: [0xeb,0xf0,0b0001AAAA,A,0x00,0xc0]
 183 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
 184 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_12 src 0x0
 185         .align 16
 186         tp src(16, %r1)
 187
 188 ##BD12L8
 189 #SSa
 190 # CHECK: mvc dst(1,%r1), src(%r1)               # encoding: [0xd2,0x00,0b0001AAAA,A,0b0001BBBB,B]
 191 # CHECK-NEXT:                                   # fixup A - offset: 2, value: dst, kind: FK_390_U12Imm
 192 # CHECK-NEXT:                                   # fixup B - offset: 4, value: src, kind: FK_390_U12Imm
 193 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_12 dst 0x0
 194 # CHECK-REL:                                    0x{{[0-9A-F]*4}} R_390_12 src 0x0
 195         .align 16
 196         mvc dst(1,%r1), src(%r1)
 197
 198 #SSb
 199 # CHECK: mvo src(16,%r1), src(1,%r2)            # encoding: [0xf1,0xf0,0b0001AAAA,A,0b0010BBBB,B]
 200 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
 201 # CHECK-NEXT:                                   # fixup B - offset: 4, value: src, kind: FK_390_U12Imm
 202 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_12 src 0x0
 203 # CHECK-REL:                                    0x{{[0-9A-F]*4}} R_390_12 src 0x0
 204         .align 16
 205         mvo src(16,%r1), src(1,%r2)
 206
 207 #SSc
 208 # CHECK: srp src(1,%r1), src(%r15), 0           # encoding: [0xf0,0x00,0b0001AAAA,A,0b1111BBBB,B]
 209 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
 210 # CHECK-NEXT:                                   # fixup B - offset: 4, value: src, kind: FK_390_U12Imm
 211 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_12 src 0x0
 212 # CHECK-REL:                                    0x{{[0-9A-F]*4}} R_390_12 src 0x0
 213         .align 16
 214         srp src(1,%r1), src(%r15), 0
 215
 216 ##BDR12
 217 #SSd
 218 # CHECK: mvck dst(%r2,%r1), src, %r3            # encoding: [0xd9,0x23,0b0001AAAA,A,0b0000BBBB,B]
 219 # CHECK-NEXT:                                   # fixup A - offset: 2, value: dst, kind: FK_390_U12Imm
 220 # CHECK-NEXT:                                   # fixup B - offset: 4, value: src, kind: FK_390_U12Imm
 221 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_12 dst 0x0
 222 # CHECK-REL:                                    0x{{[0-9A-F]*4}} R_390_12 src 0x0
 223         .align 16
 224         mvck dst(%r2,%r1), src, %r3
 225
 226 # CHECK: .insn ss,238594023227392,dst(%r2,%r1),src,%r3  # encoding: [0xd9,0x23,0b0001AAAA,A,0b0000BBBB,B]
 227 # CHECK-NEXT:                                           # fixup A - offset: 2, value: dst, kind: FK_390_U12Imm
 228 # CHECK-NEXT:                                           # fixup B - offset: 4, value: src, kind: FK_390_U12Imm
 229 # CHECK-REL:                                            0x{{[0-9A-F]*2}} R_390_12 dst 0x0
 230 # CHECK-REL:                                            0x{{[0-9A-F]*4}} R_390_12 src 0x0
 231         .align 16
 232         .insn ss,0xd90000000000,dst(%r2,%r1),src,%r3    # mvck
 233
 234 #SSe
 235 # CHECK: lmd %r2, %r4, src1(%r1), src2(%r1)     # encoding: [0xef,0x24,0b0001AAAA,A,0b0001BBBB,B]
 236 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src1, kind: FK_390_U12Imm
 237 # CHECK-NEXT:                                   # fixup B - offset: 4, value: src2, kind: FK_390_U12Imm
 238 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_12 src1 0x0
 239 # CHECK-REL:                                    0x{{[0-9A-F]*4}} R_390_12 src2 0x0
 240         .align 16
 241         lmd %r2, %r4, src1(%r1), src2(%r1)
 242
 243 #SSf
 244 # CHECK: pka dst(%r15), src(256,%r15)           # encoding: [0xe9,0xff,0b1111AAAA,A,0b1111BBBB,B]
 245 # CHECK-NEXT:                                   # fixup A - offset: 2, value: dst, kind: FK_390_U12Imm
 246 # CHECK-NEXT:                                   # fixup B - offset: 4, value: src, kind: FK_390_U12Imm
 247 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_12 dst 0x0
 248 # CHECK-REL:                                    0x{{[0-9A-F]*4}} R_390_12 src 0x0
 249         .align 16
 250         pka     dst(%r15), src(256,%r15)
 251
 252 #SSE
 253 # CHECK: strag dst(%r1), src(%r15)              # encoding: [0xe5,0x02,0b0001AAAA,A,0b1111BBBB,B]
 254 # CHECK-NEXT:                                   # fixup A - offset: 2, value: dst, kind: FK_390_U12Imm
 255 # CHECK-NEXT:                                   # fixup B - offset: 4, value: src, kind: FK_390_U12Imm
 256 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_12 dst 0x0
 257 # CHECK-REL:                                    0x{{[0-9A-F]*4}} R_390_12 src 0x0
 258         .align 16
 259         strag dst(%r1), src(%r15)
 260
 261 # CHECK: .insn sse,251796752695296,dst(%r1),src(%r15)  # encoding: [0xe5,0x02,0b0001AAAA,A,0b1111BBBB,B]
 262 # CHECK-NEXT:                                          # fixup A - offset: 2, value: dst, kind: FK_390_U12Imm
 263 # CHECK-NEXT:                                          # fixup B - offset: 4, value: src, kind: FK_390_U12Imm
 264 # CHECK-REL:                                           0x{{[0-9A-F]*2}} R_390_12 dst 0x0
 265 # CHECK-REL:                                           0x{{[0-9A-F]*4}} R_390_12 src 0x0
 266         .align 16
 267         .insn sse,0xe50200000000,dst(%r1),src(%r15)    # strag
 268
 269 #SSF
 270 # CHECK: ectg src, src(%r15), %r2               # encoding: [0xc8,0x21,0b0000AAAA,A,0b1111BBBB,B]
 271 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
 272 # CHECK-NEXT:                                   # fixup B - offset: 4, value: src, kind: FK_390_U12Imm
 273 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_12 src 0x0
 274 # CHECK-REL:                                    0x{{[0-9A-F]*4}} R_390_12 src 0x0
 275         .align 16
 276         ectg src, src(%r15), %r2
 277
 278 # CHECK: .insn ssf,219906620522496,src,src(%r15),%r2   # encoding: [0xc8,0x21,0b0000AAAA,A,0b1111BBBB,B]
 279 # CHECK-NEXT:                                          # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
 280 # CHECK-NEXT:                                          # fixup B - offset: 4, value: src, kind: FK_390_U12Imm
 281 # CHECK-REL:                                           0x{{[0-9A-F]*2}} R_390_12 src 0x0
 282 # CHECK-REL:                                           0x{{[0-9A-F]*4}} R_390_12 src 0x0
 283         .align 16
 284         .insn ssf,0xc80100000000,src,src(%r15),%r2     # ectg
 285
 286 ##BDV12
 287 # CHECK: vgeg %v0, src(%v0,%r1), 0              # encoding: [0xe7,0x00,0b0001AAAA,A,0x00,0x12]
 288 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src, kind: FK_390_U12Imm
 289 # CHECK-REL:                                    0x{{[0-9A-F]*2}} R_390_12 src 0x0
 290         .align 16
 291         vgeg %v0, src(%v0,%r1), 0
 292
 293 ## Fixup for second operand only
 294 # CHECK:  mvc     32(8,%r0), src                # encoding: [0xd2,0x07,0x00,0x20,0b0000AAAA,A]
 295 # CHECK-NEXT:                                   # fixup A - offset: 4, value: src, kind: FK_390_U12Imm
 296         .align 16
 297         mvc     32(8,%r0),src
 298
 299 ##U8
 300 # CHECK: cli 0(%r1), src                        # encoding: [0x95,A,0x10,0x00]
 301 # CHECK-NEXT:                                   # fixup A - offset: 1, value: src, kind: FK_390_U8Imm
 302 # CHECK-REL:                                    0x{{[0-9A-F]+}} R_390_8 src 0x0
 303        .align 16
 304        cli 0(%r1),src
 305
 306 # CHECK: [[L:\..+]]:
 307 # CHECK-NEXT: cli 0(%r1), local_u8-[[L]]        # encoding: [0x95,A,0x10,0x00]
 308 # CHECK-NEXT:                                   # fixup A - offset: 1, value: local_u8-[[L]], kind: FK_390_U8Imm
 309 # CHECK-DIS:                                    95 04 10 00   cli     0(%r1), 4
 310        .align 16
 311        cli 0(%r1),local_u8-.
 312 local_u8:
 313
 314 ##S8
 315 # CHECK: asi 0(%r1), src                        # encoding: [0xeb,A,0x10,0x00,0x00,0x6a]
 316 # CHECK-NEXT:                                   # fixup A - offset: 1, value: src, kind: FK_390_S8Imm
 317 # CHECK-REL:                                    0x{{[0-9A-F]+}} R_390_8 src 0x0
 318        .align 16
 319        asi 0(%r1),src
 320
 321 # CHECK: [[L:\..+]]:
 322 # CHECK-NEXT: asi 0(%r1), local_s8-[[L]]        # encoding: [0xeb,A,0x10,0x00,0x00,0x6a]
 323 # CHECK-NEXT:                                   # fixup A - offset: 1, value: local_s8-[[L]], kind: FK_390_S8Imm
 324 # CHECK-DIS:                                    eb 06 10 00 00 6a     asi     0(%r1), 6
 325        .align 16
 326        asi 0(%r1),local_s8-.
 327 local_s8:
 328
 329 ##U16
 330 # CHECK: oill %r1, src                          # encoding: [0xa5,0x1b,A,A]
 331 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src, kind: FK_390_U16Imm
 332 # CHECK-REL:                                    0x{{[0-9A-F]+}} R_390_16 src 0x0
 333         .align 16
 334         oill %r1,src
 335
 336 # CHECK: [[L:\..+]]:
 337 # CHECK-NEXT: oill %r1, local_u16-[[L]]         # encoding: [0xa5,0x1b,A,A]
 338 # CHECK-NEXT:                                   # fixup A - offset: 2, value: local_u16-[[L]], kind: FK_390_U16Imm
 339 # CHECK-DIS:                                    a5 1b 00 04   oill    %r1, 4
 340         .align 16
 341         oill %r1,local_u16-.
 342 local_u16:
 343
 344 # CHECK: [[L:\..+]]:
 345 # CHECK-NEXT: oill %r1, src-[[L]]               # encoding: [0xa5,0x1b,A,A]
 346 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src-[[L]], kind: FK_390_U16Imm
 347 # CHECK-REL:                                    0x{{[0-9A-F]+}} R_390_PC16 src 0x2
 348         .align 16
 349         oill %r1,src-.
 350
 351 ##S16
 352 # CHECK: lghi %r1, src                          # encoding: [0xa7,0x19,A,A]
 353 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src, kind: FK_390_S16Imm
 354 # CHECK-REL:                                    0x{{[0-9A-F]+}} R_390_16 src 0x0
 355         .align 16
 356         lghi %r1,src
 357
 358 # CHECK: [[L:\..+]]:
 359 # CHECK-NEXT: lghi %r1, local_s16-[[L]]         # encoding: [0xa7,0x19,A,A]
 360 # CHECK-NEXT:                                   # fixup A - offset: 2, value: local_s16-[[L]], kind: FK_390_S16Imm
 361 # CHECK-DIS:                                    a7 19 00 04   lghi    %r1, 4
 362         .align 16
 363         lghi %r1,local_s16-.
 364 local_s16:
 365
 366 # CHECK: [[L:\..+]]:
 367 # CHECK-NEXT: lghi %r1, src-[[L]]               # encoding: [0xa7,0x19,A,A]
 368 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src-[[L]], kind: FK_390_S16Imm
 369 # CHECK-REL:                                    0x{{[0-9A-F]+}} R_390_PC16 src 0x2
 370         .align 16
 371         lghi %r1,src-.
 372
 373 ##U32
 374 # CHECK: clfi %r1, src                          # encoding: [0xc2,0x1f,A,A,A,A]
 375 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src, kind: FK_390_U32Imm
 376 # CHECK-REL:                                    0x{{[0-9A-F]+}} R_390_32 src 0x0
 377         .align 16
 378         clfi %r1,src
 379
 380 # CHECK: [[L:\..+]]:
 381 # CHECK-NEXT: clfi %r1, local_u32-[[L]]         # encoding: [0xc2,0x1f,A,A,A,A]
 382 # CHECK-NEXT:                                   # fixup A - offset: 2, value: local_u32-[[L]], kind: FK_390_U32Imm
 383 # CHECK-DIS:                                    c2 1f 00 00 00 06     clfi    %r1, 6
 384         .align 16
 385         clfi %r1,local_u32-.
 386 local_u32:
 387
 388 # CHECK: [[L:\..+]]:
 389 # CHECK: clfi %r1, src-[[L]]                    # encoding: [0xc2,0x1f,A,A,A,A]
 390 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src-[[L]], kind: FK_390_U32Imm
 391 # CHECK-REL:                                    0x{{[0-9A-F]+}} R_390_PC32 src 0x2
 392         .align 16
 393         clfi %r1,src-.
 394
 395 ##S32
 396 # CHECK: lgfi %r1, src                          # encoding: [0xc0,0x11,A,A,A,A]
 397 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src, kind: FK_390_S32Imm
 398 # CHECK-REL:                                    0x{{[0-9A-F]+}} R_390_32 src 0x0
 399         .align 16
 400         lgfi %r1,src
 401
 402 # CHECK: [[L:\..+]]:
 403 # CHECK: lgfi %r1, local_s32-[[L]]              # encoding: [0xc0,0x11,A,A,A,A]
 404 # CHECK-NEXT:                                   # fixup A - offset: 2, value: local_s32-[[L]], kind: FK_390_S32Imm
 405 # CHECK-DIS:                                    c0 11 00 00 00 06     lgfi    %r1, 6
 406         .align 16
 407         lgfi %r1,local_s32-.
 408 local_s32:
 409
 410 # CHECK: [[L:\..+]]:
 411 # CHECK: lgfi %r1, src-[[L]]                    # encoding: [0xc0,0x11,A,A,A,A]
 412 # CHECK-NEXT:                                   # fixup A - offset: 2, value: src-[[L]], kind: FK_390_S32Imm
 413 # CHECK-REL:                                    0x{{[0-9A-F]+}} R_390_PC32 src 0x2
 414         .align 16
 415         lgfi %r1,src-.
 416
 417 # Data relocs
 418 # llvm-mc does not show any "encoding" string for data, so we just check the relocs
 419
 420 # CHECK-REL: .rela.data
 421         .data
 422
 423 # CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_LE64 target 0x0
 424         .align 16
 425         .quad target@ntpoff
 426
 427 # CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_LDO64 target 0x0
 428         .align 16
 429         .quad target@dtpoff
 430
 431 # CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_LDM64 target 0x0
 432         .align 16
 433         .quad target@tlsldm
 434
 435 # CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_GD64 target 0x0
 436         .align 16
 437         .quad target@tlsgd
 438
 439 # CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_LE32 target 0x0
 440         .align 16
 441         .long target@ntpoff
 442
 443 # CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_LDO32 target 0x0
 444         .align 16
 445         .long target@dtpoff
 446
 447 # CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_LDM32 target 0x0
 448         .align 16
 449         .long target@tlsldm
 450
 451 # CHECK-REL: 0x{{[0-9A-F]*0}} R_390_TLS_GD32 target 0x0
 452         .align 16
 453         .long target@tlsgd
 454