1 //===-- MipsISelLowering.h - Mips DAG Lowering Interface --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the interfaces that Mips uses to lower LLVM code into a
13 //===----------------------------------------------------------------------===//
15 #ifndef MipsISELLOWERING_H
16 #define MipsISELLOWERING_H
18 #include "llvm/CodeGen/SelectionDAG.h"
19 #include "llvm/Target/TargetLowering.h"
21 #include "MipsSubtarget.h"
26 // Start the numbering from where ISD NodeType finishes.
27 FIRST_NUMBER
= ISD::BUILTIN_OP_END
,
29 // Jump and link (call)
32 // Get the Higher 16 bits from a 32-bit immediate
33 // No relation with Mips Hi register
36 // Get the Lower 16 bits from a 32-bit immediate
37 // No relation with Mips Lo register
40 // Handle gp_rel (small data/bss sections) relocation.
46 // Select CC Pseudo Instruction
49 // Floating Point Select CC Pseudo Instruction
52 // Floating Point Branch Conditional
55 // Floating Point Compare
58 // Floating Point Rounding
66 //===--------------------------------------------------------------------===//
67 // TargetLowering Implementation
68 //===--------------------------------------------------------------------===//
69 class MipsTargetLowering
: public TargetLowering
73 explicit MipsTargetLowering(MipsTargetMachine
&TM
);
75 /// LowerOperation - Provide custom lowering hooks for some operations.
76 virtual SDValue
LowerOperation(SDValue Op
, SelectionDAG
&DAG
);
78 /// getTargetNodeName - This method returns the name of a target specific
80 virtual const char *getTargetNodeName(unsigned Opcode
) const;
82 /// getSetCCResultType - get the ISD::SETCC result ValueType
83 MVT
getSetCCResultType(MVT VT
) const;
85 /// getFunctionAlignment - Return the Log2 alignment of this function.
86 virtual unsigned getFunctionAlignment(const Function
*F
) const;
89 const MipsSubtarget
*Subtarget
;
91 // Lower Operand helpers
92 SDNode
*LowerCallResult(SDValue Chain
, SDValue InFlag
, CallSDNode
*TheCall
,
93 unsigned CallingConv
, SelectionDAG
&DAG
);
95 // Lower Operand specifics
96 SDValue
LowerANDOR(SDValue Op
, SelectionDAG
&DAG
);
97 SDValue
LowerBRCOND(SDValue Op
, SelectionDAG
&DAG
);
98 SDValue
LowerCALL(SDValue Op
, SelectionDAG
&DAG
);
99 SDValue
LowerConstantPool(SDValue Op
, SelectionDAG
&DAG
);
100 SDValue
LowerDYNAMIC_STACKALLOC(SDValue Op
, SelectionDAG
&DAG
);
101 SDValue
LowerFORMAL_ARGUMENTS(SDValue Op
, SelectionDAG
&DAG
);
102 SDValue
LowerFP_TO_SINT(SDValue Op
, SelectionDAG
&DAG
);
103 SDValue
LowerGlobalAddress(SDValue Op
, SelectionDAG
&DAG
);
104 SDValue
LowerGlobalTLSAddress(SDValue Op
, SelectionDAG
&DAG
);
105 SDValue
LowerJumpTable(SDValue Op
, SelectionDAG
&DAG
);
106 SDValue
LowerRET(SDValue Op
, SelectionDAG
&DAG
);
107 SDValue
LowerSELECT(SDValue Op
, SelectionDAG
&DAG
);
108 SDValue
LowerSETCC(SDValue Op
, SelectionDAG
&DAG
);
110 virtual MachineBasicBlock
*EmitInstrWithCustomInserter(MachineInstr
*MI
,
111 MachineBasicBlock
*MBB
) const;
113 // Inline asm support
114 ConstraintType
getConstraintType(const std::string
&Constraint
) const;
116 std::pair
<unsigned, const TargetRegisterClass
*>
117 getRegForInlineAsmConstraint(const std::string
&Constraint
,
120 std::vector
<unsigned>
121 getRegClassForInlineAsmConstraint(const std::string
&Constraint
,
124 virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode
*GA
) const;
128 #endif // MipsISELLOWERING_H