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Linux 2.6.34-rc3
[pohmelfs.git] / drivers / media / video / gspca / ov519.c
blobf36e11a0458d4ca7a248a68d4bc48b46daa5ce90
1 /**
2 * OV519 driver
3 *
4 * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr)
5 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
6 *
7 * This module is adapted from the ov51x-jpeg package, which itself
8 * was adapted from the ov511 driver.
9 *
10 * Original copyright for the ov511 driver is:
11 *
12 * Copyright (c) 1999-2006 Mark W. McClelland
13 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
14 * Many improvements by Bret Wallach <bwallac1@san.rr.com>
15 * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
16 * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
17 * Changes by Claudio Matsuoka <claudio@conectiva.com>
18 *
19 * ov51x-jpeg original copyright is:
20 *
21 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
22 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
23 *
24 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation; either version 2 of the License, or
27 * any later version.
28 *
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
33 *
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
37 *
38 */
39 #define MODULE_NAME "ov519"
40
41 #include <linux/input.h>
42 #include "gspca.h"
43
44 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
45 MODULE_DESCRIPTION("OV519 USB Camera Driver");
46 MODULE_LICENSE("GPL");
47
48 /* global parameters */
49 static int frame_rate;
50
51 /* Number of times to retry a failed I2C transaction. Increase this if you
52 * are getting "Failed to read sensor ID..." */
53 static int i2c_detect_tries = 10;
54
55 /* ov519 device descriptor */
56 struct sd {
57 struct gspca_dev gspca_dev; /* !! must be the first item */
58
59 __u8 packet_nr;
60
61 char bridge;
62 #define BRIDGE_OV511 0
63 #define BRIDGE_OV511PLUS 1
64 #define BRIDGE_OV518 2
65 #define BRIDGE_OV518PLUS 3
66 #define BRIDGE_OV519 4
67 #define BRIDGE_OVFX2 5
68 #define BRIDGE_W9968CF 6
69 #define BRIDGE_MASK 7
70
71 char invert_led;
72 #define BRIDGE_INVERT_LED 8
73
74 char snapshot_pressed;
75 char snapshot_needs_reset;
76
77 /* Determined by sensor type */
78 __u8 sif;
79
80 __u8 brightness;
81 __u8 contrast;
82 __u8 colors;
83 __u8 hflip;
84 __u8 vflip;
85 __u8 autobrightness;
86 __u8 freq;
87 __u8 quality;
88 #define QUALITY_MIN 50
89 #define QUALITY_MAX 70
90 #define QUALITY_DEF 50
91
92 __u8 stopped; /* Streaming is temporarily paused */
93
94 __u8 frame_rate; /* current Framerate */
95 __u8 clockdiv; /* clockdiv override */
96
97 char sensor; /* Type of image sensor chip (SEN_*) */
98 #define SEN_UNKNOWN 0
99 #define SEN_OV2610 1
100 #define SEN_OV3610 2
101 #define SEN_OV6620 3
102 #define SEN_OV6630 4
103 #define SEN_OV66308AF 5
104 #define SEN_OV7610 6
105 #define SEN_OV7620 7
106 #define SEN_OV7620AE 8
107 #define SEN_OV7640 9
108 #define SEN_OV7648 10
109 #define SEN_OV7670 11
110 #define SEN_OV76BE 12
111 #define SEN_OV8610 13
112
113 u8 sensor_addr;
114 int sensor_width;
115 int sensor_height;
116 int sensor_reg_cache[256];
117
118 u8 *jpeg_hdr;
119 };
120
121 /* Note this is a bit of a hack, but the w9968cf driver needs the code for all
122 the ov sensors which is already present here. When we have the time we
123 really should move the sensor drivers to v4l2 sub drivers. */
124 #include "w996Xcf.c"
125
126 /* V4L2 controls supported by the driver */
127 static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
128 static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
129 static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
130 static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
131 static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val);
132 static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
133 static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val);
134 static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val);
135 static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val);
136 static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val);
137 static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val);
138 static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val);
139 static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val);
140 static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val);
141 static void setbrightness(struct gspca_dev *gspca_dev);
142 static void setcontrast(struct gspca_dev *gspca_dev);
143 static void setcolors(struct gspca_dev *gspca_dev);
144 static void setautobrightness(struct sd *sd);
145 static void setfreq(struct sd *sd);
146
147 static const struct ctrl sd_ctrls[] = {
148 #define BRIGHTNESS_IDX 0
149 {
150 {
151 .id = V4L2_CID_BRIGHTNESS,
152 .type = V4L2_CTRL_TYPE_INTEGER,
153 .name = "Brightness",
154 .minimum = 0,
155 .maximum = 255,
156 .step = 1,
157 #define BRIGHTNESS_DEF 127
158 .default_value = BRIGHTNESS_DEF,
159 },
160 .set = sd_setbrightness,
161 .get = sd_getbrightness,
162 },
163 #define CONTRAST_IDX 1
164 {
165 {
166 .id = V4L2_CID_CONTRAST,
167 .type = V4L2_CTRL_TYPE_INTEGER,
168 .name = "Contrast",
169 .minimum = 0,
170 .maximum = 255,
171 .step = 1,
172 #define CONTRAST_DEF 127
173 .default_value = CONTRAST_DEF,
174 },
175 .set = sd_setcontrast,
176 .get = sd_getcontrast,
177 },
178 #define COLOR_IDX 2
179 {
180 {
181 .id = V4L2_CID_SATURATION,
182 .type = V4L2_CTRL_TYPE_INTEGER,
183 .name = "Color",
184 .minimum = 0,
185 .maximum = 255,
186 .step = 1,
187 #define COLOR_DEF 127
188 .default_value = COLOR_DEF,
189 },
190 .set = sd_setcolors,
191 .get = sd_getcolors,
192 },
193 /* The flip controls work with ov7670 only */
194 #define HFLIP_IDX 3
195 {
196 {
197 .id = V4L2_CID_HFLIP,
198 .type = V4L2_CTRL_TYPE_BOOLEAN,
199 .name = "Mirror",
200 .minimum = 0,
201 .maximum = 1,
202 .step = 1,
203 #define HFLIP_DEF 0
204 .default_value = HFLIP_DEF,
205 },
206 .set = sd_sethflip,
207 .get = sd_gethflip,
208 },
209 #define VFLIP_IDX 4
210 {
211 {
212 .id = V4L2_CID_VFLIP,
213 .type = V4L2_CTRL_TYPE_BOOLEAN,
214 .name = "Vflip",
215 .minimum = 0,
216 .maximum = 1,
217 .step = 1,
218 #define VFLIP_DEF 0
219 .default_value = VFLIP_DEF,
220 },
221 .set = sd_setvflip,
222 .get = sd_getvflip,
223 },
224 #define AUTOBRIGHT_IDX 5
225 {
226 {
227 .id = V4L2_CID_AUTOBRIGHTNESS,
228 .type = V4L2_CTRL_TYPE_BOOLEAN,
229 .name = "Auto Brightness",
230 .minimum = 0,
231 .maximum = 1,
232 .step = 1,
233 #define AUTOBRIGHT_DEF 1
234 .default_value = AUTOBRIGHT_DEF,
235 },
236 .set = sd_setautobrightness,
237 .get = sd_getautobrightness,
238 },
239 #define FREQ_IDX 6
240 {
241 {
242 .id = V4L2_CID_POWER_LINE_FREQUENCY,
243 .type = V4L2_CTRL_TYPE_MENU,
244 .name = "Light frequency filter",
245 .minimum = 0,
246 .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */
247 .step = 1,
248 #define FREQ_DEF 0
249 .default_value = FREQ_DEF,
250 },
251 .set = sd_setfreq,
252 .get = sd_getfreq,
253 },
254 #define OV7670_FREQ_IDX 7
255 {
256 {
257 .id = V4L2_CID_POWER_LINE_FREQUENCY,
258 .type = V4L2_CTRL_TYPE_MENU,
259 .name = "Light frequency filter",
260 .minimum = 0,
261 .maximum = 3, /* 0: 0, 1: 50Hz, 2:60Hz 3: Auto Hz */
262 .step = 1,
263 #define OV7670_FREQ_DEF 3
264 .default_value = OV7670_FREQ_DEF,
265 },
266 .set = sd_setfreq,
267 .get = sd_getfreq,
268 },
269 };
270
271 static const struct v4l2_pix_format ov519_vga_mode[] = {
272 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
273 .bytesperline = 320,
274 .sizeimage = 320 * 240 * 3 / 8 + 590,
275 .colorspace = V4L2_COLORSPACE_JPEG,
276 .priv = 1},
277 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
278 .bytesperline = 640,
279 .sizeimage = 640 * 480 * 3 / 8 + 590,
280 .colorspace = V4L2_COLORSPACE_JPEG,
281 .priv = 0},
282 };
283 static const struct v4l2_pix_format ov519_sif_mode[] = {
284 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
285 .bytesperline = 160,
286 .sizeimage = 160 * 120 * 3 / 8 + 590,
287 .colorspace = V4L2_COLORSPACE_JPEG,
288 .priv = 3},
289 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
290 .bytesperline = 176,
291 .sizeimage = 176 * 144 * 3 / 8 + 590,
292 .colorspace = V4L2_COLORSPACE_JPEG,
293 .priv = 1},
294 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
295 .bytesperline = 320,
296 .sizeimage = 320 * 240 * 3 / 8 + 590,
297 .colorspace = V4L2_COLORSPACE_JPEG,
298 .priv = 2},
299 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
300 .bytesperline = 352,
301 .sizeimage = 352 * 288 * 3 / 8 + 590,
302 .colorspace = V4L2_COLORSPACE_JPEG,
303 .priv = 0},
304 };
305
306 /* Note some of the sizeimage values for the ov511 / ov518 may seem
307 larger then necessary, however they need to be this big as the ov511 /
308 ov518 always fills the entire isoc frame, using 0 padding bytes when
309 it doesn't have any data. So with low framerates the amount of data
310 transfered can become quite large (libv4l will remove all the 0 padding
311 in userspace). */
312 static const struct v4l2_pix_format ov518_vga_mode[] = {
313 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
314 .bytesperline = 320,
315 .sizeimage = 320 * 240 * 3,
316 .colorspace = V4L2_COLORSPACE_JPEG,
317 .priv = 1},
318 {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
319 .bytesperline = 640,
320 .sizeimage = 640 * 480 * 2,
321 .colorspace = V4L2_COLORSPACE_JPEG,
322 .priv = 0},
323 };
324 static const struct v4l2_pix_format ov518_sif_mode[] = {
325 {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
326 .bytesperline = 160,
327 .sizeimage = 70000,
328 .colorspace = V4L2_COLORSPACE_JPEG,
329 .priv = 3},
330 {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
331 .bytesperline = 176,
332 .sizeimage = 70000,
333 .colorspace = V4L2_COLORSPACE_JPEG,
334 .priv = 1},
335 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
336 .bytesperline = 320,
337 .sizeimage = 320 * 240 * 3,
338 .colorspace = V4L2_COLORSPACE_JPEG,
339 .priv = 2},
340 {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
341 .bytesperline = 352,
342 .sizeimage = 352 * 288 * 3,
343 .colorspace = V4L2_COLORSPACE_JPEG,
344 .priv = 0},
345 };
346
347 static const struct v4l2_pix_format ov511_vga_mode[] = {
348 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
349 .bytesperline = 320,
350 .sizeimage = 320 * 240 * 3,
351 .colorspace = V4L2_COLORSPACE_JPEG,
352 .priv = 1},
353 {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
354 .bytesperline = 640,
355 .sizeimage = 640 * 480 * 2,
356 .colorspace = V4L2_COLORSPACE_JPEG,
357 .priv = 0},
358 };
359 static const struct v4l2_pix_format ov511_sif_mode[] = {
360 {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
361 .bytesperline = 160,
362 .sizeimage = 70000,
363 .colorspace = V4L2_COLORSPACE_JPEG,
364 .priv = 3},
365 {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
366 .bytesperline = 176,
367 .sizeimage = 70000,
368 .colorspace = V4L2_COLORSPACE_JPEG,
369 .priv = 1},
370 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
371 .bytesperline = 320,
372 .sizeimage = 320 * 240 * 3,
373 .colorspace = V4L2_COLORSPACE_JPEG,
374 .priv = 2},
375 {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
376 .bytesperline = 352,
377 .sizeimage = 352 * 288 * 3,
378 .colorspace = V4L2_COLORSPACE_JPEG,
379 .priv = 0},
380 };
381
382 static const struct v4l2_pix_format ovfx2_vga_mode[] = {
383 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
384 .bytesperline = 320,
385 .sizeimage = 320 * 240,
386 .colorspace = V4L2_COLORSPACE_SRGB,
387 .priv = 1},
388 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
389 .bytesperline = 640,
390 .sizeimage = 640 * 480,
391 .colorspace = V4L2_COLORSPACE_SRGB,
392 .priv = 0},
393 };
394 static const struct v4l2_pix_format ovfx2_cif_mode[] = {
395 {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
396 .bytesperline = 160,
397 .sizeimage = 160 * 120,
398 .colorspace = V4L2_COLORSPACE_SRGB,
399 .priv = 3},
400 {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
401 .bytesperline = 176,
402 .sizeimage = 176 * 144,
403 .colorspace = V4L2_COLORSPACE_SRGB,
404 .priv = 1},
405 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
406 .bytesperline = 320,
407 .sizeimage = 320 * 240,
408 .colorspace = V4L2_COLORSPACE_SRGB,
409 .priv = 2},
410 {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
411 .bytesperline = 352,
412 .sizeimage = 352 * 288,
413 .colorspace = V4L2_COLORSPACE_SRGB,
414 .priv = 0},
415 };
416 static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
417 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
418 .bytesperline = 1600,
419 .sizeimage = 1600 * 1200,
420 .colorspace = V4L2_COLORSPACE_SRGB},
421 };
422 static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
423 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
424 .bytesperline = 640,
425 .sizeimage = 640 * 480,
426 .colorspace = V4L2_COLORSPACE_SRGB,
427 .priv = 1},
428 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
429 .bytesperline = 800,
430 .sizeimage = 800 * 600,
431 .colorspace = V4L2_COLORSPACE_SRGB,
432 .priv = 1},
433 {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
434 .bytesperline = 1024,
435 .sizeimage = 1024 * 768,
436 .colorspace = V4L2_COLORSPACE_SRGB,
437 .priv = 1},
438 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
439 .bytesperline = 1600,
440 .sizeimage = 1600 * 1200,
441 .colorspace = V4L2_COLORSPACE_SRGB,
442 .priv = 0},
443 {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
444 .bytesperline = 2048,
445 .sizeimage = 2048 * 1536,
446 .colorspace = V4L2_COLORSPACE_SRGB,
447 .priv = 0},
448 };
449
450
451 /* Registers common to OV511 / OV518 */
452 #define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */
453 #define R51x_SYS_RESET 0x50
454 /* Reset type flags */
455 #define OV511_RESET_OMNICE 0x08
456 #define R51x_SYS_INIT 0x53
457 #define R51x_SYS_SNAP 0x52
458 #define R51x_SYS_CUST_ID 0x5F
459 #define R51x_COMP_LUT_BEGIN 0x80
460
461 /* OV511 Camera interface register numbers */
462 #define R511_CAM_DELAY 0x10
463 #define R511_CAM_EDGE 0x11
464 #define R511_CAM_PXCNT 0x12
465 #define R511_CAM_LNCNT 0x13
466 #define R511_CAM_PXDIV 0x14
467 #define R511_CAM_LNDIV 0x15
468 #define R511_CAM_UV_EN 0x16
469 #define R511_CAM_LINE_MODE 0x17
470 #define R511_CAM_OPTS 0x18
471
472 #define R511_SNAP_FRAME 0x19
473 #define R511_SNAP_PXCNT 0x1A
474 #define R511_SNAP_LNCNT 0x1B
475 #define R511_SNAP_PXDIV 0x1C
476 #define R511_SNAP_LNDIV 0x1D
477 #define R511_SNAP_UV_EN 0x1E
478 #define R511_SNAP_UV_EN 0x1E
479 #define R511_SNAP_OPTS 0x1F
480
481 #define R511_DRAM_FLOW_CTL 0x20
482 #define R511_FIFO_OPTS 0x31
483 #define R511_I2C_CTL 0x40
484 #define R511_SYS_LED_CTL 0x55 /* OV511+ only */
485 #define R511_COMP_EN 0x78
486 #define R511_COMP_LUT_EN 0x79
487
488 /* OV518 Camera interface register numbers */
489 #define R518_GPIO_OUT 0x56 /* OV518(+) only */
490 #define R518_GPIO_CTL 0x57 /* OV518(+) only */
491
492 /* OV519 Camera interface register numbers */
493 #define OV519_R10_H_SIZE 0x10
494 #define OV519_R11_V_SIZE 0x11
495 #define OV519_R12_X_OFFSETL 0x12
496 #define OV519_R13_X_OFFSETH 0x13
497 #define OV519_R14_Y_OFFSETL 0x14
498 #define OV519_R15_Y_OFFSETH 0x15
499 #define OV519_R16_DIVIDER 0x16
500 #define OV519_R20_DFR 0x20
501 #define OV519_R25_FORMAT 0x25
502
503 /* OV519 System Controller register numbers */
504 #define OV519_SYS_RESET1 0x51
505 #define OV519_SYS_EN_CLK1 0x54
506
507 #define OV519_GPIO_DATA_OUT0 0x71
508 #define OV519_GPIO_IO_CTRL0 0x72
509
510 #define OV511_ENDPOINT_ADDRESS 1 /* Isoc endpoint number */
511
512 /*
513 * The FX2 chip does not give us a zero length read at end of frame.
514 * It does, however, give a short read at the end of a frame, if
515 * necessary, rather than run two frames together.
516 *
517 * By choosing the right bulk transfer size, we are guaranteed to always
518 * get a short read for the last read of each frame. Frame sizes are
519 * always a composite number (width * height, or a multiple) so if we
520 * choose a prime number, we are guaranteed that the last read of a
521 * frame will be short.
522 *
523 * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
524 * otherwise EOVERFLOW "babbling" errors occur. I have not been able
525 * to figure out why. [PMiller]
526 *
527 * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
528 *
529 * It isn't enough to know the number of bytes per frame, in case we
530 * have data dropouts or buffer overruns (even though the FX2 double
531 * buffers, there are some pretty strict real time constraints for
532 * isochronous transfer for larger frame sizes).
533 */
534 #define OVFX2_BULK_SIZE (13 * 4096)
535
536 /* I2C registers */
537 #define R51x_I2C_W_SID 0x41
538 #define R51x_I2C_SADDR_3 0x42
539 #define R51x_I2C_SADDR_2 0x43
540 #define R51x_I2C_R_SID 0x44
541 #define R51x_I2C_DATA 0x45
542 #define R518_I2C_CTL 0x47 /* OV518(+) only */
543 #define OVFX2_I2C_ADDR 0x00
544
545 /* I2C ADDRESSES */
546 #define OV7xx0_SID 0x42
547 #define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */
548 #define OV8xx0_SID 0xa0
549 #define OV6xx0_SID 0xc0
550
551 /* OV7610 registers */
552 #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
553 #define OV7610_REG_BLUE 0x01 /* blue channel balance */
554 #define OV7610_REG_RED 0x02 /* red channel balance */
555 #define OV7610_REG_SAT 0x03 /* saturation */
556 #define OV8610_REG_HUE 0x04 /* 04 reserved */
557 #define OV7610_REG_CNT 0x05 /* Y contrast */
558 #define OV7610_REG_BRT 0x06 /* Y brightness */
559 #define OV7610_REG_COM_C 0x14 /* misc common regs */
560 #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
561 #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
562 #define OV7610_REG_COM_I 0x29 /* misc settings */
563
564 /* OV7670 registers */
565 #define OV7670_REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
566 #define OV7670_REG_BLUE 0x01 /* blue gain */
567 #define OV7670_REG_RED 0x02 /* red gain */
568 #define OV7670_REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
569 #define OV7670_REG_COM1 0x04 /* Control 1 */
570 #define OV7670_REG_AECHH 0x07 /* AEC MS 5 bits */
571 #define OV7670_REG_COM3 0x0c /* Control 3 */
572 #define OV7670_REG_COM4 0x0d /* Control 4 */
573 #define OV7670_REG_COM5 0x0e /* All "reserved" */
574 #define OV7670_REG_COM6 0x0f /* Control 6 */
575 #define OV7670_REG_AECH 0x10 /* More bits of AEC value */
576 #define OV7670_REG_CLKRC 0x11 /* Clock control */
577 #define OV7670_REG_COM7 0x12 /* Control 7 */
578 #define OV7670_COM7_FMT_VGA 0x00
579 #define OV7670_COM7_YUV 0x00 /* YUV */
580 #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
581 #define OV7670_COM7_FMT_MASK 0x38
582 #define OV7670_COM7_RESET 0x80 /* Register reset */
583 #define OV7670_REG_COM8 0x13 /* Control 8 */
584 #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
585 #define OV7670_COM8_AWB 0x02 /* White balance enable */
586 #define OV7670_COM8_AGC 0x04 /* Auto gain enable */
587 #define OV7670_COM8_BFILT 0x20 /* Band filter enable */
588 #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
589 #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
590 #define OV7670_REG_COM9 0x14 /* Control 9 - gain ceiling */
591 #define OV7670_REG_COM10 0x15 /* Control 10 */
592 #define OV7670_REG_HSTART 0x17 /* Horiz start high bits */
593 #define OV7670_REG_HSTOP 0x18 /* Horiz stop high bits */
594 #define OV7670_REG_VSTART 0x19 /* Vert start high bits */
595 #define OV7670_REG_VSTOP 0x1a /* Vert stop high bits */
596 #define OV7670_REG_MVFP 0x1e /* Mirror / vflip */
597 #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
598 #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
599 #define OV7670_REG_AEW 0x24 /* AGC upper limit */
600 #define OV7670_REG_AEB 0x25 /* AGC lower limit */
601 #define OV7670_REG_VPT 0x26 /* AGC/AEC fast mode op region */
602 #define OV7670_REG_HREF 0x32 /* HREF pieces */
603 #define OV7670_REG_TSLB 0x3a /* lots of stuff */
604 #define OV7670_REG_COM11 0x3b /* Control 11 */
605 #define OV7670_COM11_EXP 0x02
606 #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
607 #define OV7670_REG_COM12 0x3c /* Control 12 */
608 #define OV7670_REG_COM13 0x3d /* Control 13 */
609 #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
610 #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
611 #define OV7670_REG_COM14 0x3e /* Control 14 */
612 #define OV7670_REG_EDGE 0x3f /* Edge enhancement factor */
613 #define OV7670_REG_COM15 0x40 /* Control 15 */
614 #define OV7670_COM15_R00FF 0xc0 /* 00 to FF */
615 #define OV7670_REG_COM16 0x41 /* Control 16 */
616 #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
617 #define OV7670_REG_BRIGHT 0x55 /* Brightness */
618 #define OV7670_REG_CONTRAS 0x56 /* Contrast control */
619 #define OV7670_REG_GFIX 0x69 /* Fix gain control */
620 #define OV7670_REG_RGB444 0x8c /* RGB 444 control */
621 #define OV7670_REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
622 #define OV7670_REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
623 #define OV7670_REG_BD50MAX 0xa5 /* 50hz banding step limit */
624 #define OV7670_REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
625 #define OV7670_REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
626 #define OV7670_REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
627 #define OV7670_REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
628 #define OV7670_REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
629 #define OV7670_REG_BD60MAX 0xab /* 60hz banding step limit */
630
631 struct ov_regvals {
632 __u8 reg;
633 __u8 val;
634 };
635 struct ov_i2c_regvals {
636 __u8 reg;
637 __u8 val;
638 };
639
640 /* Settings for OV2610 camera chip */
641 static const struct ov_i2c_regvals norm_2610[] =
642 {
643 { 0x12, 0x80 }, /* reset */
644 };
645
646 static const struct ov_i2c_regvals norm_3620b[] =
647 {
648 /*
649 * From the datasheet: "Note that after writing to register COMH
650 * (0x12) to change the sensor mode, registers related to the
651 * sensor’s cropping window will be reset back to their default
652 * values."
653 *
654 * "wait 4096 external clock ... to make sure the sensor is
655 * stable and ready to access registers" i.e. 160us at 24MHz
656 */
657
658 { 0x12, 0x80 }, /* COMH reset */
659 { 0x12, 0x00 }, /* QXGA, master */
660
661 /*
662 * 11 CLKRC "Clock Rate Control"
663 * [7] internal frequency doublers: on
664 * [6] video port mode: master
665 * [5:0] clock divider: 1
666 */
667 { 0x11, 0x80 },
668
669 /*
670 * 13 COMI "Common Control I"
671 * = 192 (0xC0) 11000000
672 * COMI[7] "AEC speed selection"
673 * = 1 (0x01) 1....... "Faster AEC correction"
674 * COMI[6] "AEC speed step selection"
675 * = 1 (0x01) .1...... "Big steps, fast"
676 * COMI[5] "Banding filter on off"
677 * = 0 (0x00) ..0..... "Off"
678 * COMI[4] "Banding filter option"
679 * = 0 (0x00) ...0.... "Main clock is 48 MHz and
680 * the PLL is ON"
681 * COMI[3] "Reserved"
682 * = 0 (0x00) ....0...
683 * COMI[2] "AGC auto manual control selection"
684 * = 0 (0x00) .....0.. "Manual"
685 * COMI[1] "AWB auto manual control selection"
686 * = 0 (0x00) ......0. "Manual"
687 * COMI[0] "Exposure control"
688 * = 0 (0x00) .......0 "Manual"
689 */
690 { 0x13, 0xC0 },
691
692 /*
693 * 09 COMC "Common Control C"
694 * = 8 (0x08) 00001000
695 * COMC[7:5] "Reserved"
696 * = 0 (0x00) 000.....
697 * COMC[4] "Sleep Mode Enable"
698 * = 0 (0x00) ...0.... "Normal mode"
699 * COMC[3:2] "Sensor sampling reset timing selection"
700 * = 2 (0x02) ....10.. "Longer reset time"
701 * COMC[1:0] "Output drive current select"
702 * = 0 (0x00) ......00 "Weakest"
703 */
704 { 0x09, 0x08 },
705
706 /*
707 * 0C COMD "Common Control D"
708 * = 8 (0x08) 00001000
709 * COMD[7] "Reserved"
710 * = 0 (0x00) 0.......
711 * COMD[6] "Swap MSB and LSB at the output port"
712 * = 0 (0x00) .0...... "False"
713 * COMD[5:3] "Reserved"
714 * = 1 (0x01) ..001...
715 * COMD[2] "Output Average On Off"
716 * = 0 (0x00) .....0.. "Output Normal"
717 * COMD[1] "Sensor precharge voltage selection"
718 * = 0 (0x00) ......0. "Selects internal
719 * reference precharge
720 * voltage"
721 * COMD[0] "Snapshot option"
722 * = 0 (0x00) .......0 "Enable live video output
723 * after snapshot sequence"
724 */
725 { 0x0c, 0x08 },
726
727 /*
728 * 0D COME "Common Control E"
729 * = 161 (0xA1) 10100001
730 * COME[7] "Output average option"
731 * = 1 (0x01) 1....... "Output average of 4 pixels"
732 * COME[6] "Anti-blooming control"
733 * = 0 (0x00) .0...... "Off"
734 * COME[5:3] "Reserved"
735 * = 4 (0x04) ..100...
736 * COME[2] "Clock output power down pin status"
737 * = 0 (0x00) .....0.. "Tri-state data output pin
738 * on power down"
739 * COME[1] "Data output pin status selection at power down"
740 * = 0 (0x00) ......0. "Tri-state VSYNC, PCLK,
741 * HREF, and CHSYNC pins on
742 * power down"
743 * COME[0] "Auto zero circuit select"
744 * = 1 (0x01) .......1 "On"
745 */
746 { 0x0d, 0xA1 },
747
748 /*
749 * 0E COMF "Common Control F"
750 * = 112 (0x70) 01110000
751 * COMF[7] "System clock selection"
752 * = 0 (0x00) 0....... "Use 24 MHz system clock"
753 * COMF[6:4] "Reserved"
754 * = 7 (0x07) .111....
755 * COMF[3] "Manual auto negative offset canceling selection"
756 * = 0 (0x00) ....0... "Auto detect negative
757 * offset and cancel it"
758 * COMF[2:0] "Reserved"
759 * = 0 (0x00) .....000
760 */
761 { 0x0e, 0x70 },
762
763 /*
764 * 0F COMG "Common Control G"
765 * = 66 (0x42) 01000010
766 * COMG[7] "Optical black output selection"
767 * = 0 (0x00) 0....... "Disable"
768 * COMG[6] "Black level calibrate selection"
769 * = 1 (0x01) .1...... "Use optical black pixels
770 * to calibrate"
771 * COMG[5:4] "Reserved"
772 * = 0 (0x00) ..00....
773 * COMG[3] "Channel offset adjustment"
774 * = 0 (0x00) ....0... "Disable offset adjustment"
775 * COMG[2] "ADC black level calibration option"
776 * = 0 (0x00) .....0.. "Use B/G line and G/R
777 * line to calibrate each
778 * channel's black level"
779 * COMG[1] "Reserved"
780 * = 1 (0x01) ......1.
781 * COMG[0] "ADC black level calibration enable"
782 * = 0 (0x00) .......0 "Disable"
783 */
784 { 0x0f, 0x42 },
785
786 /*
787 * 14 COMJ "Common Control J"
788 * = 198 (0xC6) 11000110
789 * COMJ[7:6] "AGC gain ceiling"
790 * = 3 (0x03) 11...... "8x"
791 * COMJ[5:4] "Reserved"
792 * = 0 (0x00) ..00....
793 * COMJ[3] "Auto banding filter"
794 * = 0 (0x00) ....0... "Banding filter is always
795 * on off depending on
796 * COMI[5] setting"
797 * COMJ[2] "VSYNC drop option"
798 * = 1 (0x01) .....1.. "SYNC is dropped if frame
799 * data is dropped"
800 * COMJ[1] "Frame data drop"
801 * = 1 (0x01) ......1. "Drop frame data if
802 * exposure is not within
803 * tolerance. In AEC mode,
804 * data is normally dropped
805 * when data is out of
806 * range."
807 * COMJ[0] "Reserved"
808 * = 0 (0x00) .......0
809 */
810 { 0x14, 0xC6 },
811
812 /*
813 * 15 COMK "Common Control K"
814 * = 2 (0x02) 00000010
815 * COMK[7] "CHSYNC pin output swap"
816 * = 0 (0x00) 0....... "CHSYNC"
817 * COMK[6] "HREF pin output swap"
818 * = 0 (0x00) .0...... "HREF"
819 * COMK[5] "PCLK output selection"
820 * = 0 (0x00) ..0..... "PCLK always output"
821 * COMK[4] "PCLK edge selection"
822 * = 0 (0x00) ...0.... "Data valid on falling edge"
823 * COMK[3] "HREF output polarity"
824 * = 0 (0x00) ....0... "positive"
825 * COMK[2] "Reserved"
826 * = 0 (0x00) .....0..
827 * COMK[1] "VSYNC polarity"
828 * = 1 (0x01) ......1. "negative"
829 * COMK[0] "HSYNC polarity"
830 * = 0 (0x00) .......0 "positive"
831 */
832 { 0x15, 0x02 },
833
834 /*
835 * 33 CHLF "Current Control"
836 * = 9 (0x09) 00001001
837 * CHLF[7:6] "Sensor current control"
838 * = 0 (0x00) 00......
839 * CHLF[5] "Sensor current range control"
840 * = 0 (0x00) ..0..... "normal range"
841 * CHLF[4] "Sensor current"
842 * = 0 (0x00) ...0.... "normal current"
843 * CHLF[3] "Sensor buffer current control"
844 * = 1 (0x01) ....1... "half current"
845 * CHLF[2] "Column buffer current control"
846 * = 0 (0x00) .....0.. "normal current"
847 * CHLF[1] "Analog DSP current control"
848 * = 0 (0x00) ......0. "normal current"
849 * CHLF[1] "ADC current control"
850 * = 0 (0x00) ......0. "normal current"
851 */
852 { 0x33, 0x09 },
853
854 /*
855 * 34 VBLM "Blooming Control"
856 * = 80 (0x50) 01010000
857 * VBLM[7] "Hard soft reset switch"
858 * = 0 (0x00) 0....... "Hard reset"
859 * VBLM[6:4] "Blooming voltage selection"
860 * = 5 (0x05) .101....
861 * VBLM[3:0] "Sensor current control"
862 * = 0 (0x00) ....0000
863 */
864 { 0x34, 0x50 },
865
866 /*
867 * 36 VCHG "Sensor Precharge Voltage Control"
868 * = 0 (0x00) 00000000
869 * VCHG[7] "Reserved"
870 * = 0 (0x00) 0.......
871 * VCHG[6:4] "Sensor precharge voltage control"
872 * = 0 (0x00) .000....
873 * VCHG[3:0] "Sensor array common reference"
874 * = 0 (0x00) ....0000
875 */
876 { 0x36, 0x00 },
877
878 /*
879 * 37 ADC "ADC Reference Control"
880 * = 4 (0x04) 00000100
881 * ADC[7:4] "Reserved"
882 * = 0 (0x00) 0000....
883 * ADC[3] "ADC input signal range"
884 * = 0 (0x00) ....0... "Input signal 1.0x"
885 * ADC[2:0] "ADC range control"
886 * = 4 (0x04) .....100
887 */
888 { 0x37, 0x04 },
889
890 /*
891 * 38 ACOM "Analog Common Ground"
892 * = 82 (0x52) 01010010
893 * ACOM[7] "Analog gain control"
894 * = 0 (0x00) 0....... "Gain 1x"
895 * ACOM[6] "Analog black level calibration"
896 * = 1 (0x01) .1...... "On"
897 * ACOM[5:0] "Reserved"
898 * = 18 (0x12) ..010010
899 */
900 { 0x38, 0x52 },
901
902 /*
903 * 3A FREFA "Internal Reference Adjustment"
904 * = 0 (0x00) 00000000
905 * FREFA[7:0] "Range"
906 * = 0 (0x00) 00000000
907 */
908 { 0x3a, 0x00 },
909
910 /*
911 * 3C FVOPT "Internal Reference Adjustment"
912 * = 31 (0x1F) 00011111
913 * FVOPT[7:0] "Range"
914 * = 31 (0x1F) 00011111
915 */
916 { 0x3c, 0x1F },
917
918 /*
919 * 44 Undocumented = 0 (0x00) 00000000
920 * 44[7:0] "It's a secret"
921 * = 0 (0x00) 00000000
922 */
923 { 0x44, 0x00 },
924
925 /*
926 * 40 Undocumented = 0 (0x00) 00000000
927 * 40[7:0] "It's a secret"
928 * = 0 (0x00) 00000000
929 */
930 { 0x40, 0x00 },
931
932 /*
933 * 41 Undocumented = 0 (0x00) 00000000
934 * 41[7:0] "It's a secret"
935 * = 0 (0x00) 00000000
936 */
937 { 0x41, 0x00 },
938
939 /*
940 * 42 Undocumented = 0 (0x00) 00000000
941 * 42[7:0] "It's a secret"
942 * = 0 (0x00) 00000000
943 */
944 { 0x42, 0x00 },
945
946 /*
947 * 43 Undocumented = 0 (0x00) 00000000
948 * 43[7:0] "It's a secret"
949 * = 0 (0x00) 00000000
950 */
951 { 0x43, 0x00 },
952
953 /*
954 * 45 Undocumented = 128 (0x80) 10000000
955 * 45[7:0] "It's a secret"
956 * = 128 (0x80) 10000000
957 */
958 { 0x45, 0x80 },
959
960 /*
961 * 48 Undocumented = 192 (0xC0) 11000000
962 * 48[7:0] "It's a secret"
963 * = 192 (0xC0) 11000000
964 */
965 { 0x48, 0xC0 },
966
967 /*
968 * 49 Undocumented = 25 (0x19) 00011001
969 * 49[7:0] "It's a secret"
970 * = 25 (0x19) 00011001
971 */
972 { 0x49, 0x19 },
973
974 /*
975 * 4B Undocumented = 128 (0x80) 10000000
976 * 4B[7:0] "It's a secret"
977 * = 128 (0x80) 10000000
978 */
979 { 0x4B, 0x80 },
980
981 /*
982 * 4D Undocumented = 196 (0xC4) 11000100
983 * 4D[7:0] "It's a secret"
984 * = 196 (0xC4) 11000100
985 */
986 { 0x4D, 0xC4 },
987
988 /*
989 * 35 VREF "Reference Voltage Control"
990 * = 76 (0x4C) 01001100
991 * VREF[7:5] "Column high reference control"
992 * = 2 (0x02) 010..... "higher voltage"
993 * VREF[4:2] "Column low reference control"
994 * = 3 (0x03) ...011.. "Highest voltage"
995 * VREF[1:0] "Reserved"
996 * = 0 (0x00) ......00
997 */
998 { 0x35, 0x4C },
999
1000 /*
1001 * 3D Undocumented = 0 (0x00) 00000000
1002 * 3D[7:0] "It's a secret"
1003 * = 0 (0x00) 00000000
1004 */
1005 { 0x3D, 0x00 },
1006
1007 /*
1008 * 3E Undocumented = 0 (0x00) 00000000
1009 * 3E[7:0] "It's a secret"
1010 * = 0 (0x00) 00000000
1011 */
1012 { 0x3E, 0x00 },
1013
1014 /*
1015 * 3B FREFB "Internal Reference Adjustment"
1016 * = 24 (0x18) 00011000
1017 * FREFB[7:0] "Range"
1018 * = 24 (0x18) 00011000
1019 */
1020 { 0x3b, 0x18 },
1021
1022 /*
1023 * 33 CHLF "Current Control"
1024 * = 25 (0x19) 00011001
1025 * CHLF[7:6] "Sensor current control"
1026 * = 0 (0x00) 00......
1027 * CHLF[5] "Sensor current range control"
1028 * = 0 (0x00) ..0..... "normal range"
1029 * CHLF[4] "Sensor current"
1030 * = 1 (0x01) ...1.... "double current"
1031 * CHLF[3] "Sensor buffer current control"
1032 * = 1 (0x01) ....1... "half current"
1033 * CHLF[2] "Column buffer current control"
1034 * = 0 (0x00) .....0.. "normal current"
1035 * CHLF[1] "Analog DSP current control"
1036 * = 0 (0x00) ......0. "normal current"
1037 * CHLF[1] "ADC current control"
1038 * = 0 (0x00) ......0. "normal current"
1039 */
1040 { 0x33, 0x19 },
1041
1042 /*
1043 * 34 VBLM "Blooming Control"
1044 * = 90 (0x5A) 01011010
1045 * VBLM[7] "Hard soft reset switch"
1046 * = 0 (0x00) 0....... "Hard reset"
1047 * VBLM[6:4] "Blooming voltage selection"
1048 * = 5 (0x05) .101....
1049 * VBLM[3:0] "Sensor current control"
1050 * = 10 (0x0A) ....1010
1051 */
1052 { 0x34, 0x5A },
1053
1054 /*
1055 * 3B FREFB "Internal Reference Adjustment"
1056 * = 0 (0x00) 00000000
1057 * FREFB[7:0] "Range"
1058 * = 0 (0x00) 00000000
1059 */
1060 { 0x3b, 0x00 },
1061
1062 /*
1063 * 33 CHLF "Current Control"
1064 * = 9 (0x09) 00001001
1065 * CHLF[7:6] "Sensor current control"
1066 * = 0 (0x00) 00......
1067 * CHLF[5] "Sensor current range control"
1068 * = 0 (0x00) ..0..... "normal range"
1069 * CHLF[4] "Sensor current"
1070 * = 0 (0x00) ...0.... "normal current"
1071 * CHLF[3] "Sensor buffer current control"
1072 * = 1 (0x01) ....1... "half current"
1073 * CHLF[2] "Column buffer current control"
1074 * = 0 (0x00) .....0.. "normal current"
1075 * CHLF[1] "Analog DSP current control"
1076 * = 0 (0x00) ......0. "normal current"
1077 * CHLF[1] "ADC current control"
1078 * = 0 (0x00) ......0. "normal current"
1079 */
1080 { 0x33, 0x09 },
1081
1082 /*
1083 * 34 VBLM "Blooming Control"
1084 * = 80 (0x50) 01010000
1085 * VBLM[7] "Hard soft reset switch"
1086 * = 0 (0x00) 0....... "Hard reset"
1087 * VBLM[6:4] "Blooming voltage selection"
1088 * = 5 (0x05) .101....
1089 * VBLM[3:0] "Sensor current control"
1090 * = 0 (0x00) ....0000
1091 */
1092 { 0x34, 0x50 },
1093
1094 /*
1095 * 12 COMH "Common Control H"
1096 * = 64 (0x40) 01000000
1097 * COMH[7] "SRST"
1098 * = 0 (0x00) 0....... "No-op"
1099 * COMH[6:4] "Resolution selection"
1100 * = 4 (0x04) .100.... "XGA"
1101 * COMH[3] "Master slave selection"
1102 * = 0 (0x00) ....0... "Master mode"
1103 * COMH[2] "Internal B/R channel option"
1104 * = 0 (0x00) .....0.. "B/R use same channel"
1105 * COMH[1] "Color bar test pattern"
1106 * = 0 (0x00) ......0. "Off"
1107 * COMH[0] "Reserved"
1108 * = 0 (0x00) .......0
1109 */
1110 { 0x12, 0x40 },
1111
1112 /*
1113 * 17 HREFST "Horizontal window start"
1114 * = 31 (0x1F) 00011111
1115 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1116 * = 31 (0x1F) 00011111
1117 */
1118 { 0x17, 0x1F },
1119
1120 /*
1121 * 18 HREFEND "Horizontal window end"
1122 * = 95 (0x5F) 01011111
1123 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1124 * = 95 (0x5F) 01011111
1125 */
1126 { 0x18, 0x5F },
1127
1128 /*
1129 * 19 VSTRT "Vertical window start"
1130 * = 0 (0x00) 00000000
1131 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1132 * = 0 (0x00) 00000000
1133 */
1134 { 0x19, 0x00 },
1135
1136 /*
1137 * 1A VEND "Vertical window end"
1138 * = 96 (0x60) 01100000
1139 * VEND[7:0] "Vertical Window End, 8 MSBs"
1140 * = 96 (0x60) 01100000
1141 */
1142 { 0x1a, 0x60 },
1143
1144 /*
1145 * 32 COMM "Common Control M"
1146 * = 18 (0x12) 00010010
1147 * COMM[7:6] "Pixel clock divide option"
1148 * = 0 (0x00) 00...... "/1"
1149 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1150 * = 2 (0x02) ..010...
1151 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1152 * = 2 (0x02) .....010
1153 */
1154 { 0x32, 0x12 },
1155
1156 /*
1157 * 03 COMA "Common Control A"
1158 * = 74 (0x4A) 01001010
1159 * COMA[7:4] "AWB Update Threshold"
1160 * = 4 (0x04) 0100....
1161 * COMA[3:2] "Vertical window end line control 2 LSBs"
1162 * = 2 (0x02) ....10..
1163 * COMA[1:0] "Vertical window start line control 2 LSBs"
1164 * = 2 (0x02) ......10
1165 */
1166 { 0x03, 0x4A },
1167
1168 /*
1169 * 11 CLKRC "Clock Rate Control"
1170 * = 128 (0x80) 10000000
1171 * CLKRC[7] "Internal frequency doublers on off seclection"
1172 * = 1 (0x01) 1....... "On"
1173 * CLKRC[6] "Digital video master slave selection"
1174 * = 0 (0x00) .0...... "Master mode, sensor
1175 * provides PCLK"
1176 * CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
1177 * = 0 (0x00) ..000000
1178 */
1179 { 0x11, 0x80 },
1180
1181 /*
1182 * 12 COMH "Common Control H"
1183 * = 0 (0x00) 00000000
1184 * COMH[7] "SRST"
1185 * = 0 (0x00) 0....... "No-op"
1186 * COMH[6:4] "Resolution selection"
1187 * = 0 (0x00) .000.... "QXGA"
1188 * COMH[3] "Master slave selection"
1189 * = 0 (0x00) ....0... "Master mode"
1190 * COMH[2] "Internal B/R channel option"
1191 * = 0 (0x00) .....0.. "B/R use same channel"
1192 * COMH[1] "Color bar test pattern"
1193 * = 0 (0x00) ......0. "Off"
1194 * COMH[0] "Reserved"
1195 * = 0 (0x00) .......0
1196 */
1197 { 0x12, 0x00 },
1198
1199 /*
1200 * 12 COMH "Common Control H"
1201 * = 64 (0x40) 01000000
1202 * COMH[7] "SRST"
1203 * = 0 (0x00) 0....... "No-op"
1204 * COMH[6:4] "Resolution selection"
1205 * = 4 (0x04) .100.... "XGA"
1206 * COMH[3] "Master slave selection"
1207 * = 0 (0x00) ....0... "Master mode"
1208 * COMH[2] "Internal B/R channel option"
1209 * = 0 (0x00) .....0.. "B/R use same channel"
1210 * COMH[1] "Color bar test pattern"
1211 * = 0 (0x00) ......0. "Off"
1212 * COMH[0] "Reserved"
1213 * = 0 (0x00) .......0
1214 */
1215 { 0x12, 0x40 },
1216
1217 /*
1218 * 17 HREFST "Horizontal window start"
1219 * = 31 (0x1F) 00011111
1220 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1221 * = 31 (0x1F) 00011111
1222 */
1223 { 0x17, 0x1F },
1224
1225 /*
1226 * 18 HREFEND "Horizontal window end"
1227 * = 95 (0x5F) 01011111
1228 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1229 * = 95 (0x5F) 01011111
1230 */
1231 { 0x18, 0x5F },
1232
1233 /*
1234 * 19 VSTRT "Vertical window start"
1235 * = 0 (0x00) 00000000
1236 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1237 * = 0 (0x00) 00000000
1238 */
1239 { 0x19, 0x00 },
1240
1241 /*
1242 * 1A VEND "Vertical window end"
1243 * = 96 (0x60) 01100000
1244 * VEND[7:0] "Vertical Window End, 8 MSBs"
1245 * = 96 (0x60) 01100000
1246 */
1247 { 0x1a, 0x60 },
1248
1249 /*
1250 * 32 COMM "Common Control M"
1251 * = 18 (0x12) 00010010
1252 * COMM[7:6] "Pixel clock divide option"
1253 * = 0 (0x00) 00...... "/1"
1254 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1255 * = 2 (0x02) ..010...
1256 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1257 * = 2 (0x02) .....010
1258 */
1259 { 0x32, 0x12 },
1260
1261 /*
1262 * 03 COMA "Common Control A"
1263 * = 74 (0x4A) 01001010
1264 * COMA[7:4] "AWB Update Threshold"
1265 * = 4 (0x04) 0100....
1266 * COMA[3:2] "Vertical window end line control 2 LSBs"
1267 * = 2 (0x02) ....10..
1268 * COMA[1:0] "Vertical window start line control 2 LSBs"
1269 * = 2 (0x02) ......10
1270 */
1271 { 0x03, 0x4A },
1272
1273 /*
1274 * 02 RED "Red Gain Control"
1275 * = 175 (0xAF) 10101111
1276 * RED[7] "Action"
1277 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1278 * RED[6:0] "Value"
1279 * = 47 (0x2F) .0101111
1280 */
1281 { 0x02, 0xAF },
1282
1283 /*
1284 * 2D ADDVSL "VSYNC Pulse Width"
1285 * = 210 (0xD2) 11010010
1286 * ADDVSL[7:0] "VSYNC pulse width, LSB"
1287 * = 210 (0xD2) 11010010
1288 */
1289 { 0x2d, 0xD2 },
1290
1291 /*
1292 * 00 GAIN = 24 (0x18) 00011000
1293 * GAIN[7:6] "Reserved"
1294 * = 0 (0x00) 00......
1295 * GAIN[5] "Double"
1296 * = 0 (0x00) ..0..... "False"
1297 * GAIN[4] "Double"
1298 * = 1 (0x01) ...1.... "True"
1299 * GAIN[3:0] "Range"
1300 * = 8 (0x08) ....1000
1301 */
1302 { 0x00, 0x18 },
1303
1304 /*
1305 * 01 BLUE "Blue Gain Control"
1306 * = 240 (0xF0) 11110000
1307 * BLUE[7] "Action"
1308 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1309 * BLUE[6:0] "Value"
1310 * = 112 (0x70) .1110000
1311 */
1312 { 0x01, 0xF0 },
1313
1314 /*
1315 * 10 AEC "Automatic Exposure Control"
1316 * = 10 (0x0A) 00001010
1317 * AEC[7:0] "Automatic Exposure Control, 8 MSBs"
1318 * = 10 (0x0A) 00001010
1319 */
1320 { 0x10, 0x0A },
1321
1322 { 0xE1, 0x67 },
1323 { 0xE3, 0x03 },
1324 { 0xE4, 0x26 },
1325 { 0xE5, 0x3E },
1326 { 0xF8, 0x01 },
1327 { 0xFF, 0x01 },
1328 };
1329
1330 static const struct ov_i2c_regvals norm_6x20[] = {
1331 { 0x12, 0x80 }, /* reset */
1332 { 0x11, 0x01 },
1333 { 0x03, 0x60 },
1334 { 0x05, 0x7f }, /* For when autoadjust is off */
1335 { 0x07, 0xa8 },
1336 /* The ratio of 0x0c and 0x0d controls the white point */
1337 { 0x0c, 0x24 },
1338 { 0x0d, 0x24 },
1339 { 0x0f, 0x15 }, /* COMS */
1340 { 0x10, 0x75 }, /* AEC Exposure time */
1341 { 0x12, 0x24 }, /* Enable AGC */
1342 { 0x14, 0x04 },
1343 /* 0x16: 0x06 helps frame stability with moving objects */
1344 { 0x16, 0x06 },
1345 /* { 0x20, 0x30 }, * Aperture correction enable */
1346 { 0x26, 0xb2 }, /* BLC enable */
1347 /* 0x28: 0x05 Selects RGB format if RGB on */
1348 { 0x28, 0x05 },
1349 { 0x2a, 0x04 }, /* Disable framerate adjust */
1350 /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
1351 { 0x2d, 0x85 },
1352 { 0x33, 0xa0 }, /* Color Processing Parameter */
1353 { 0x34, 0xd2 }, /* Max A/D range */
1354 { 0x38, 0x8b },
1355 { 0x39, 0x40 },
1356
1357 { 0x3c, 0x39 }, /* Enable AEC mode changing */
1358 { 0x3c, 0x3c }, /* Change AEC mode */
1359 { 0x3c, 0x24 }, /* Disable AEC mode changing */
1360
1361 { 0x3d, 0x80 },
1362 /* These next two registers (0x4a, 0x4b) are undocumented.
1363 * They control the color balance */
1364 { 0x4a, 0x80 },
1365 { 0x4b, 0x80 },
1366 { 0x4d, 0xd2 }, /* This reduces noise a bit */
1367 { 0x4e, 0xc1 },
1368 { 0x4f, 0x04 },
1369 /* Do 50-53 have any effect? */
1370 /* Toggle 0x12[2] off and on here? */
1371 };
1372
1373 static const struct ov_i2c_regvals norm_6x30[] = {
1374 { 0x12, 0x80 }, /* Reset */
1375 { 0x00, 0x1f }, /* Gain */
1376 { 0x01, 0x99 }, /* Blue gain */
1377 { 0x02, 0x7c }, /* Red gain */
1378 { 0x03, 0xc0 }, /* Saturation */
1379 { 0x05, 0x0a }, /* Contrast */
1380 { 0x06, 0x95 }, /* Brightness */
1381 { 0x07, 0x2d }, /* Sharpness */
1382 { 0x0c, 0x20 },
1383 { 0x0d, 0x20 },
1384 { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
1385 { 0x0f, 0x05 },
1386 { 0x10, 0x9a },
1387 { 0x11, 0x00 }, /* Pixel clock = fastest */
1388 { 0x12, 0x24 }, /* Enable AGC and AWB */
1389 { 0x13, 0x21 },
1390 { 0x14, 0x80 },
1391 { 0x15, 0x01 },
1392 { 0x16, 0x03 },
1393 { 0x17, 0x38 },
1394 { 0x18, 0xea },
1395 { 0x19, 0x04 },
1396 { 0x1a, 0x93 },
1397 { 0x1b, 0x00 },
1398 { 0x1e, 0xc4 },
1399 { 0x1f, 0x04 },
1400 { 0x20, 0x20 },
1401 { 0x21, 0x10 },
1402 { 0x22, 0x88 },
1403 { 0x23, 0xc0 }, /* Crystal circuit power level */
1404 { 0x25, 0x9a }, /* Increase AEC black ratio */
1405 { 0x26, 0xb2 }, /* BLC enable */
1406 { 0x27, 0xa2 },
1407 { 0x28, 0x00 },
1408 { 0x29, 0x00 },
1409 { 0x2a, 0x84 }, /* 60 Hz power */
1410 { 0x2b, 0xa8 }, /* 60 Hz power */
1411 { 0x2c, 0xa0 },
1412 { 0x2d, 0x95 }, /* Enable auto-brightness */
1413 { 0x2e, 0x88 },
1414 { 0x33, 0x26 },
1415 { 0x34, 0x03 },
1416 { 0x36, 0x8f },
1417 { 0x37, 0x80 },
1418 { 0x38, 0x83 },
1419 { 0x39, 0x80 },
1420 { 0x3a, 0x0f },
1421 { 0x3b, 0x3c },
1422 { 0x3c, 0x1a },
1423 { 0x3d, 0x80 },
1424 { 0x3e, 0x80 },
1425 { 0x3f, 0x0e },
1426 { 0x40, 0x00 }, /* White bal */
1427 { 0x41, 0x00 }, /* White bal */
1428 { 0x42, 0x80 },
1429 { 0x43, 0x3f }, /* White bal */
1430 { 0x44, 0x80 },
1431 { 0x45, 0x20 },
1432 { 0x46, 0x20 },
1433 { 0x47, 0x80 },
1434 { 0x48, 0x7f },
1435 { 0x49, 0x00 },
1436 { 0x4a, 0x00 },
1437 { 0x4b, 0x80 },
1438 { 0x4c, 0xd0 },
1439 { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
1440 { 0x4e, 0x40 },
1441 { 0x4f, 0x07 }, /* UV avg., col. killer: max */
1442 { 0x50, 0xff },
1443 { 0x54, 0x23 }, /* Max AGC gain: 18dB */
1444 { 0x55, 0xff },
1445 { 0x56, 0x12 },
1446 { 0x57, 0x81 },
1447 { 0x58, 0x75 },
1448 { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
1449 { 0x5a, 0x2c },
1450 { 0x5b, 0x0f }, /* AWB chrominance levels */
1451 { 0x5c, 0x10 },
1452 { 0x3d, 0x80 },
1453 { 0x27, 0xa6 },
1454 { 0x12, 0x20 }, /* Toggle AWB */
1455 { 0x12, 0x24 },
1456 };
1457
1458 /* Lawrence Glaister <lg@jfm.bc.ca> reports:
1459 *
1460 * Register 0x0f in the 7610 has the following effects:
1461 *
1462 * 0x85 (AEC method 1): Best overall, good contrast range
1463 * 0x45 (AEC method 2): Very overexposed
1464 * 0xa5 (spec sheet default): Ok, but the black level is
1465 * shifted resulting in loss of contrast
1466 * 0x05 (old driver setting): very overexposed, too much
1467 * contrast
1468 */
1469 static const struct ov_i2c_regvals norm_7610[] = {
1470 { 0x10, 0xff },
1471 { 0x16, 0x06 },
1472 { 0x28, 0x24 },
1473 { 0x2b, 0xac },
1474 { 0x12, 0x00 },
1475 { 0x38, 0x81 },
1476 { 0x28, 0x24 }, /* 0c */
1477 { 0x0f, 0x85 }, /* lg's setting */
1478 { 0x15, 0x01 },
1479 { 0x20, 0x1c },
1480 { 0x23, 0x2a },
1481 { 0x24, 0x10 },
1482 { 0x25, 0x8a },
1483 { 0x26, 0xa2 },
1484 { 0x27, 0xc2 },
1485 { 0x2a, 0x04 },
1486 { 0x2c, 0xfe },
1487 { 0x2d, 0x93 },
1488 { 0x30, 0x71 },
1489 { 0x31, 0x60 },
1490 { 0x32, 0x26 },
1491 { 0x33, 0x20 },
1492 { 0x34, 0x48 },
1493 { 0x12, 0x24 },
1494 { 0x11, 0x01 },
1495 { 0x0c, 0x24 },
1496 { 0x0d, 0x24 },
1497 };
1498
1499 static const struct ov_i2c_regvals norm_7620[] = {
1500 { 0x12, 0x80 }, /* reset */
1501 { 0x00, 0x00 }, /* gain */
1502 { 0x01, 0x80 }, /* blue gain */
1503 { 0x02, 0x80 }, /* red gain */
1504 { 0x03, 0xc0 }, /* OV7670_REG_VREF */
1505 { 0x06, 0x60 },
1506 { 0x07, 0x00 },
1507 { 0x0c, 0x24 },
1508 { 0x0c, 0x24 },
1509 { 0x0d, 0x24 },
1510 { 0x11, 0x01 },
1511 { 0x12, 0x24 },
1512 { 0x13, 0x01 },
1513 { 0x14, 0x84 },
1514 { 0x15, 0x01 },
1515 { 0x16, 0x03 },
1516 { 0x17, 0x2f },
1517 { 0x18, 0xcf },
1518 { 0x19, 0x06 },
1519 { 0x1a, 0xf5 },
1520 { 0x1b, 0x00 },
1521 { 0x20, 0x18 },
1522 { 0x21, 0x80 },
1523 { 0x22, 0x80 },
1524 { 0x23, 0x00 },
1525 { 0x26, 0xa2 },
1526 { 0x27, 0xea },
1527 { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
1528 { 0x29, 0x00 },
1529 { 0x2a, 0x10 },
1530 { 0x2b, 0x00 },
1531 { 0x2c, 0x88 },
1532 { 0x2d, 0x91 },
1533 { 0x2e, 0x80 },
1534 { 0x2f, 0x44 },
1535 { 0x60, 0x27 },
1536 { 0x61, 0x02 },
1537 { 0x62, 0x5f },
1538 { 0x63, 0xd5 },
1539 { 0x64, 0x57 },
1540 { 0x65, 0x83 },
1541 { 0x66, 0x55 },
1542 { 0x67, 0x92 },
1543 { 0x68, 0xcf },
1544 { 0x69, 0x76 },
1545 { 0x6a, 0x22 },
1546 { 0x6b, 0x00 },
1547 { 0x6c, 0x02 },
1548 { 0x6d, 0x44 },
1549 { 0x6e, 0x80 },
1550 { 0x6f, 0x1d },
1551 { 0x70, 0x8b },
1552 { 0x71, 0x00 },
1553 { 0x72, 0x14 },
1554 { 0x73, 0x54 },
1555 { 0x74, 0x00 },
1556 { 0x75, 0x8e },
1557 { 0x76, 0x00 },
1558 { 0x77, 0xff },
1559 { 0x78, 0x80 },
1560 { 0x79, 0x80 },
1561 { 0x7a, 0x80 },
1562 { 0x7b, 0xe2 },
1563 { 0x7c, 0x00 },
1564 };
1565
1566 /* 7640 and 7648. The defaults should be OK for most registers. */
1567 static const struct ov_i2c_regvals norm_7640[] = {
1568 { 0x12, 0x80 },
1569 { 0x12, 0x14 },
1570 };
1571
1572 /* 7670. Defaults taken from OmniVision provided data,
1573 * as provided by Jonathan Corbet of OLPC */
1574 static const struct ov_i2c_regvals norm_7670[] = {
1575 { OV7670_REG_COM7, OV7670_COM7_RESET },
1576 { OV7670_REG_TSLB, 0x04 }, /* OV */
1577 { OV7670_REG_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
1578 { OV7670_REG_CLKRC, 0x01 },
1579 /*
1580 * Set the hardware window. These values from OV don't entirely
1581 * make sense - hstop is less than hstart. But they work...
1582 */
1583 { OV7670_REG_HSTART, 0x13 },
1584 { OV7670_REG_HSTOP, 0x01 },
1585 { OV7670_REG_HREF, 0xb6 },
1586 { OV7670_REG_VSTART, 0x02 },
1587 { OV7670_REG_VSTOP, 0x7a },
1588 { OV7670_REG_VREF, 0x0a },
1589
1590 { OV7670_REG_COM3, 0x00 },
1591 { OV7670_REG_COM14, 0x00 },
1592 /* Mystery scaling numbers */
1593 { 0x70, 0x3a },
1594 { 0x71, 0x35 },
1595 { 0x72, 0x11 },
1596 { 0x73, 0xf0 },
1597 { 0xa2, 0x02 },
1598 /* { OV7670_REG_COM10, 0x0 }, */
1599
1600 /* Gamma curve values */
1601 { 0x7a, 0x20 },
1602 { 0x7b, 0x10 },
1603 { 0x7c, 0x1e },
1604 { 0x7d, 0x35 },
1605 { 0x7e, 0x5a },
1606 { 0x7f, 0x69 },
1607 { 0x80, 0x76 },
1608 { 0x81, 0x80 },
1609 { 0x82, 0x88 },
1610 { 0x83, 0x8f },
1611 { 0x84, 0x96 },
1612 { 0x85, 0xa3 },
1613 { 0x86, 0xaf },
1614 { 0x87, 0xc4 },
1615 { 0x88, 0xd7 },
1616 { 0x89, 0xe8 },
1617
1618 /* AGC and AEC parameters. Note we start by disabling those features,
1619 then turn them only after tweaking the values. */
1620 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1621 | OV7670_COM8_AECSTEP
1622 | OV7670_COM8_BFILT },
1623 { OV7670_REG_GAIN, 0x00 },
1624 { OV7670_REG_AECH, 0x00 },
1625 { OV7670_REG_COM4, 0x40 }, /* magic reserved bit */
1626 { OV7670_REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
1627 { OV7670_REG_BD50MAX, 0x05 },
1628 { OV7670_REG_BD60MAX, 0x07 },
1629 { OV7670_REG_AEW, 0x95 },
1630 { OV7670_REG_AEB, 0x33 },
1631 { OV7670_REG_VPT, 0xe3 },
1632 { OV7670_REG_HAECC1, 0x78 },
1633 { OV7670_REG_HAECC2, 0x68 },
1634 { 0xa1, 0x03 }, /* magic */
1635 { OV7670_REG_HAECC3, 0xd8 },
1636 { OV7670_REG_HAECC4, 0xd8 },
1637 { OV7670_REG_HAECC5, 0xf0 },
1638 { OV7670_REG_HAECC6, 0x90 },
1639 { OV7670_REG_HAECC7, 0x94 },
1640 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1641 | OV7670_COM8_AECSTEP
1642 | OV7670_COM8_BFILT
1643 | OV7670_COM8_AGC
1644 | OV7670_COM8_AEC },
1645
1646 /* Almost all of these are magic "reserved" values. */
1647 { OV7670_REG_COM5, 0x61 },
1648 { OV7670_REG_COM6, 0x4b },
1649 { 0x16, 0x02 },
1650 { OV7670_REG_MVFP, 0x07 },
1651 { 0x21, 0x02 },
1652 { 0x22, 0x91 },
1653 { 0x29, 0x07 },
1654 { 0x33, 0x0b },
1655 { 0x35, 0x0b },
1656 { 0x37, 0x1d },
1657 { 0x38, 0x71 },
1658 { 0x39, 0x2a },
1659 { OV7670_REG_COM12, 0x78 },
1660 { 0x4d, 0x40 },
1661 { 0x4e, 0x20 },
1662 { OV7670_REG_GFIX, 0x00 },
1663 { 0x6b, 0x4a },
1664 { 0x74, 0x10 },
1665 { 0x8d, 0x4f },
1666 { 0x8e, 0x00 },
1667 { 0x8f, 0x00 },
1668 { 0x90, 0x00 },
1669 { 0x91, 0x00 },
1670 { 0x96, 0x00 },
1671 { 0x9a, 0x00 },
1672 { 0xb0, 0x84 },
1673 { 0xb1, 0x0c },
1674 { 0xb2, 0x0e },
1675 { 0xb3, 0x82 },
1676 { 0xb8, 0x0a },
1677
1678 /* More reserved magic, some of which tweaks white balance */
1679 { 0x43, 0x0a },
1680 { 0x44, 0xf0 },
1681 { 0x45, 0x34 },
1682 { 0x46, 0x58 },
1683 { 0x47, 0x28 },
1684 { 0x48, 0x3a },
1685 { 0x59, 0x88 },
1686 { 0x5a, 0x88 },
1687 { 0x5b, 0x44 },
1688 { 0x5c, 0x67 },
1689 { 0x5d, 0x49 },
1690 { 0x5e, 0x0e },
1691 { 0x6c, 0x0a },
1692 { 0x6d, 0x55 },
1693 { 0x6e, 0x11 },
1694 { 0x6f, 0x9f },
1695 /* "9e for advance AWB" */
1696 { 0x6a, 0x40 },
1697 { OV7670_REG_BLUE, 0x40 },
1698 { OV7670_REG_RED, 0x60 },
1699 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1700 | OV7670_COM8_AECSTEP
1701 | OV7670_COM8_BFILT
1702 | OV7670_COM8_AGC
1703 | OV7670_COM8_AEC
1704 | OV7670_COM8_AWB },
1705
1706 /* Matrix coefficients */
1707 { 0x4f, 0x80 },
1708 { 0x50, 0x80 },
1709 { 0x51, 0x00 },
1710 { 0x52, 0x22 },
1711 { 0x53, 0x5e },
1712 { 0x54, 0x80 },
1713 { 0x58, 0x9e },
1714
1715 { OV7670_REG_COM16, OV7670_COM16_AWBGAIN },
1716 { OV7670_REG_EDGE, 0x00 },
1717 { 0x75, 0x05 },
1718 { 0x76, 0xe1 },
1719 { 0x4c, 0x00 },
1720 { 0x77, 0x01 },
1721 { OV7670_REG_COM13, OV7670_COM13_GAMMA
1722 | OV7670_COM13_UVSAT
1723 | 2}, /* was 3 */
1724 { 0x4b, 0x09 },
1725 { 0xc9, 0x60 },
1726 { OV7670_REG_COM16, 0x38 },
1727 { 0x56, 0x40 },
1728
1729 { 0x34, 0x11 },
1730 { OV7670_REG_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
1731 { 0xa4, 0x88 },
1732 { 0x96, 0x00 },
1733 { 0x97, 0x30 },
1734 { 0x98, 0x20 },
1735 { 0x99, 0x30 },
1736 { 0x9a, 0x84 },
1737 { 0x9b, 0x29 },
1738 { 0x9c, 0x03 },
1739 { 0x9d, 0x4c },
1740 { 0x9e, 0x3f },
1741 { 0x78, 0x04 },
1742
1743 /* Extra-weird stuff. Some sort of multiplexor register */
1744 { 0x79, 0x01 },
1745 { 0xc8, 0xf0 },
1746 { 0x79, 0x0f },
1747 { 0xc8, 0x00 },
1748 { 0x79, 0x10 },
1749 { 0xc8, 0x7e },
1750 { 0x79, 0x0a },
1751 { 0xc8, 0x80 },
1752 { 0x79, 0x0b },
1753 { 0xc8, 0x01 },
1754 { 0x79, 0x0c },
1755 { 0xc8, 0x0f },
1756 { 0x79, 0x0d },
1757 { 0xc8, 0x20 },
1758 { 0x79, 0x09 },
1759 { 0xc8, 0x80 },
1760 { 0x79, 0x02 },
1761 { 0xc8, 0xc0 },
1762 { 0x79, 0x03 },
1763 { 0xc8, 0x40 },
1764 { 0x79, 0x05 },
1765 { 0xc8, 0x30 },
1766 { 0x79, 0x26 },
1767 };
1768
1769 static const struct ov_i2c_regvals norm_8610[] = {
1770 { 0x12, 0x80 },
1771 { 0x00, 0x00 },
1772 { 0x01, 0x80 },
1773 { 0x02, 0x80 },
1774 { 0x03, 0xc0 },
1775 { 0x04, 0x30 },
1776 { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
1777 { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
1778 { 0x0a, 0x86 },
1779 { 0x0b, 0xb0 },
1780 { 0x0c, 0x20 },
1781 { 0x0d, 0x20 },
1782 { 0x11, 0x01 },
1783 { 0x12, 0x25 },
1784 { 0x13, 0x01 },
1785 { 0x14, 0x04 },
1786 { 0x15, 0x01 }, /* Lin and Win think different about UV order */
1787 { 0x16, 0x03 },
1788 { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
1789 { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
1790 { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
1791 { 0x1a, 0xf5 },
1792 { 0x1b, 0x00 },
1793 { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
1794 { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
1795 { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
1796 { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
1797 { 0x26, 0xa2 },
1798 { 0x27, 0xea },
1799 { 0x28, 0x00 },
1800 { 0x29, 0x00 },
1801 { 0x2a, 0x80 },
1802 { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
1803 { 0x2c, 0xac },
1804 { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
1805 { 0x2e, 0x80 },
1806 { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
1807 { 0x4c, 0x00 },
1808 { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
1809 { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
1810 { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
1811 { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
1812 { 0x63, 0xff },
1813 { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
1814 * maybe thats wrong */
1815 { 0x65, 0x00 },
1816 { 0x66, 0x55 },
1817 { 0x67, 0xb0 },
1818 { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
1819 { 0x69, 0x02 },
1820 { 0x6a, 0x22 },
1821 { 0x6b, 0x00 },
1822 { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
1823 * deleting bit7 colors the first images red */
1824 { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
1825 { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
1826 { 0x6f, 0x01 },
1827 { 0x70, 0x8b },
1828 { 0x71, 0x00 },
1829 { 0x72, 0x14 },
1830 { 0x73, 0x54 },
1831 { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
1832 { 0x75, 0x0e },
1833 { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
1834 { 0x77, 0xff },
1835 { 0x78, 0x80 },
1836 { 0x79, 0x80 },
1837 { 0x7a, 0x80 },
1838 { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
1839 { 0x7c, 0x00 },
1840 { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
1841 { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
1842 { 0x7f, 0xfb },
1843 { 0x80, 0x28 },
1844 { 0x81, 0x00 },
1845 { 0x82, 0x23 },
1846 { 0x83, 0x0b },
1847 { 0x84, 0x00 },
1848 { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
1849 { 0x86, 0xc9 },
1850 { 0x87, 0x00 },
1851 { 0x88, 0x00 },
1852 { 0x89, 0x01 },
1853 { 0x12, 0x20 },
1854 { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
1855 };
1856
1857 static unsigned char ov7670_abs_to_sm(unsigned char v)
1858 {
1859 if (v > 127)
1860 return v & 0x7f;
1861 return (128 - v) | 0x80;
1862 }
1863
1864 /* Write a OV519 register */
1865 static int reg_w(struct sd *sd, __u16 index, __u16 value)
1866 {
1867 int ret, req = 0;
1868
1869 switch (sd->bridge) {
1870 case BRIDGE_OV511:
1871 case BRIDGE_OV511PLUS:
1872 req = 2;
1873 break;
1874 case BRIDGE_OVFX2:
1875 req = 0x0a;
1876 /* fall through */
1877 case BRIDGE_W9968CF:
1878 ret = usb_control_msg(sd->gspca_dev.dev,
1879 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1880 req,
1881 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1882 value, index, NULL, 0, 500);
1883 goto leave;
1884 default:
1885 req = 1;
1886 }
1887
1888 sd->gspca_dev.usb_buf[0] = value;
1889 ret = usb_control_msg(sd->gspca_dev.dev,
1890 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1891 req,
1892 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1893 0, index,
1894 sd->gspca_dev.usb_buf, 1, 500);
1895 leave:
1896 if (ret < 0) {
1897 PDEBUG(D_ERR, "Write reg 0x%04x -> [0x%02x] failed",
1898 value, index);
1899 return ret;
1900 }
1901
1902 PDEBUG(D_USBO, "Write reg 0x%04x -> [0x%02x]", value, index);
1903 return 0;
1904 }
1905
1906 /* Read from a OV519 register, note not valid for the w9968cf!! */
1907 /* returns: negative is error, pos or zero is data */
1908 static int reg_r(struct sd *sd, __u16 index)
1909 {
1910 int ret;
1911 int req;
1912
1913 switch (sd->bridge) {
1914 case BRIDGE_OV511:
1915 case BRIDGE_OV511PLUS:
1916 req = 3;
1917 break;
1918 case BRIDGE_OVFX2:
1919 req = 0x0b;
1920 break;
1921 default:
1922 req = 1;
1923 }
1924
1925 ret = usb_control_msg(sd->gspca_dev.dev,
1926 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1927 req,
1928 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1929 0, index, sd->gspca_dev.usb_buf, 1, 500);
1930
1931 if (ret >= 0) {
1932 ret = sd->gspca_dev.usb_buf[0];
1933 PDEBUG(D_USBI, "Read reg [0x%02X] -> 0x%04X", index, ret);
1934 } else
1935 PDEBUG(D_ERR, "Read reg [0x%02x] failed", index);
1936
1937 return ret;
1938 }
1939
1940 /* Read 8 values from a OV519 register */
1941 static int reg_r8(struct sd *sd,
1942 __u16 index)
1943 {
1944 int ret;
1945
1946 ret = usb_control_msg(sd->gspca_dev.dev,
1947 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1948 1, /* REQ_IO */
1949 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1950 0, index, sd->gspca_dev.usb_buf, 8, 500);
1951
1952 if (ret >= 0)
1953 ret = sd->gspca_dev.usb_buf[0];
1954 else
1955 PDEBUG(D_ERR, "Read reg 8 [0x%02x] failed", index);
1956
1957 return ret;
1958 }
1959
1960 /*
1961 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
1962 * the same position as 1's in "mask" are cleared and set to "value". Bits
1963 * that are in the same position as 0's in "mask" are preserved, regardless
1964 * of their respective state in "value".
1965 */
1966 static int reg_w_mask(struct sd *sd,
1967 __u16 index,
1968 __u8 value,
1969 __u8 mask)
1970 {
1971 int ret;
1972 __u8 oldval;
1973
1974 if (mask != 0xff) {
1975 value &= mask; /* Enforce mask on value */
1976 ret = reg_r(sd, index);
1977 if (ret < 0)
1978 return ret;
1979
1980 oldval = ret & ~mask; /* Clear the masked bits */
1981 value |= oldval; /* Set the desired bits */
1982 }
1983 return reg_w(sd, index, value);
1984 }
1985
1986 /*
1987 * Writes multiple (n) byte value to a single register. Only valid with certain
1988 * registers (0x30 and 0xc4 - 0xce).
1989 */
1990 static int ov518_reg_w32(struct sd *sd, __u16 index, u32 value, int n)
1991 {
1992 int ret;
1993
1994 *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
1995
1996 ret = usb_control_msg(sd->gspca_dev.dev,
1997 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1998 1 /* REG_IO */,
1999 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2000 0, index,
2001 sd->gspca_dev.usb_buf, n, 500);
2002 if (ret < 0) {
2003 PDEBUG(D_ERR, "Write reg32 [%02x] %08x failed", index, value);
2004 return ret;
2005 }
2006
2007 return 0;
2008 }
2009
2010 static int ov511_i2c_w(struct sd *sd, __u8 reg, __u8 value)
2011 {
2012 int rc, retries;
2013
2014 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2015
2016 /* Three byte write cycle */
2017 for (retries = 6; ; ) {
2018 /* Select camera register */
2019 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
2020 if (rc < 0)
2021 return rc;
2022
2023 /* Write "value" to I2C data port of OV511 */
2024 rc = reg_w(sd, R51x_I2C_DATA, value);
2025 if (rc < 0)
2026 return rc;
2027
2028 /* Initiate 3-byte write cycle */
2029 rc = reg_w(sd, R511_I2C_CTL, 0x01);
2030 if (rc < 0)
2031 return rc;
2032
2033 do {
2034 rc = reg_r(sd, R511_I2C_CTL);
2035 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2036
2037 if (rc < 0)
2038 return rc;
2039
2040 if ((rc & 2) == 0) /* Ack? */
2041 break;
2042 if (--retries < 0) {
2043 PDEBUG(D_USBO, "i2c write retries exhausted");
2044 return -1;
2045 }
2046 }
2047
2048 return 0;
2049 }
2050
2051 static int ov511_i2c_r(struct sd *sd, __u8 reg)
2052 {
2053 int rc, value, retries;
2054
2055 /* Two byte write cycle */
2056 for (retries = 6; ; ) {
2057 /* Select camera register */
2058 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
2059 if (rc < 0)
2060 return rc;
2061
2062 /* Initiate 2-byte write cycle */
2063 rc = reg_w(sd, R511_I2C_CTL, 0x03);
2064 if (rc < 0)
2065 return rc;
2066
2067 do {
2068 rc = reg_r(sd, R511_I2C_CTL);
2069 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2070
2071 if (rc < 0)
2072 return rc;
2073
2074 if ((rc & 2) == 0) /* Ack? */
2075 break;
2076
2077 /* I2C abort */
2078 reg_w(sd, R511_I2C_CTL, 0x10);
2079
2080 if (--retries < 0) {
2081 PDEBUG(D_USBI, "i2c write retries exhausted");
2082 return -1;
2083 }
2084 }
2085
2086 /* Two byte read cycle */
2087 for (retries = 6; ; ) {
2088 /* Initiate 2-byte read cycle */
2089 rc = reg_w(sd, R511_I2C_CTL, 0x05);
2090 if (rc < 0)
2091 return rc;
2092
2093 do {
2094 rc = reg_r(sd, R511_I2C_CTL);
2095 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2096
2097 if (rc < 0)
2098 return rc;
2099
2100 if ((rc & 2) == 0) /* Ack? */
2101 break;
2102
2103 /* I2C abort */
2104 rc = reg_w(sd, R511_I2C_CTL, 0x10);
2105 if (rc < 0)
2106 return rc;
2107
2108 if (--retries < 0) {
2109 PDEBUG(D_USBI, "i2c read retries exhausted");
2110 return -1;
2111 }
2112 }
2113
2114 value = reg_r(sd, R51x_I2C_DATA);
2115
2116 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
2117
2118 /* This is needed to make i2c_w() work */
2119 rc = reg_w(sd, R511_I2C_CTL, 0x05);
2120 if (rc < 0)
2121 return rc;
2122
2123 return value;
2124 }
2125
2126 /*
2127 * The OV518 I2C I/O procedure is different, hence, this function.
2128 * This is normally only called from i2c_w(). Note that this function
2129 * always succeeds regardless of whether the sensor is present and working.
2130 */
2131 static int ov518_i2c_w(struct sd *sd,
2132 __u8 reg,
2133 __u8 value)
2134 {
2135 int rc;
2136
2137 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2138
2139 /* Select camera register */
2140 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
2141 if (rc < 0)
2142 return rc;
2143
2144 /* Write "value" to I2C data port of OV511 */
2145 rc = reg_w(sd, R51x_I2C_DATA, value);
2146 if (rc < 0)
2147 return rc;
2148
2149 /* Initiate 3-byte write cycle */
2150 rc = reg_w(sd, R518_I2C_CTL, 0x01);
2151 if (rc < 0)
2152 return rc;
2153
2154 /* wait for write complete */
2155 msleep(4);
2156 return reg_r8(sd, R518_I2C_CTL);
2157 }
2158
2159 /*
2160 * returns: negative is error, pos or zero is data
2161 *
2162 * The OV518 I2C I/O procedure is different, hence, this function.
2163 * This is normally only called from i2c_r(). Note that this function
2164 * always succeeds regardless of whether the sensor is present and working.
2165 */
2166 static int ov518_i2c_r(struct sd *sd, __u8 reg)
2167 {
2168 int rc, value;
2169
2170 /* Select camera register */
2171 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
2172 if (rc < 0)
2173 return rc;
2174
2175 /* Initiate 2-byte write cycle */
2176 rc = reg_w(sd, R518_I2C_CTL, 0x03);
2177 if (rc < 0)
2178 return rc;
2179
2180 /* Initiate 2-byte read cycle */
2181 rc = reg_w(sd, R518_I2C_CTL, 0x05);
2182 if (rc < 0)
2183 return rc;
2184 value = reg_r(sd, R51x_I2C_DATA);
2185 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
2186 return value;
2187 }
2188
2189 static int ovfx2_i2c_w(struct sd *sd, __u8 reg, __u8 value)
2190 {
2191 int ret;
2192
2193 ret = usb_control_msg(sd->gspca_dev.dev,
2194 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2195 0x02,
2196 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2197 (__u16)value, (__u16)reg, NULL, 0, 500);
2198
2199 if (ret < 0) {
2200 PDEBUG(D_ERR, "i2c 0x%02x -> [0x%02x] failed", value, reg);
2201 return ret;
2202 }
2203
2204 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2205 return 0;
2206 }
2207
2208 static int ovfx2_i2c_r(struct sd *sd, __u8 reg)
2209 {
2210 int ret;
2211
2212 ret = usb_control_msg(sd->gspca_dev.dev,
2213 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2214 0x03,
2215 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2216 0, (__u16)reg, sd->gspca_dev.usb_buf, 1, 500);
2217
2218 if (ret >= 0) {
2219 ret = sd->gspca_dev.usb_buf[0];
2220 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, ret);
2221 } else
2222 PDEBUG(D_ERR, "i2c read [0x%02x] failed", reg);
2223
2224 return ret;
2225 }
2226
2227 static int i2c_w(struct sd *sd, __u8 reg, __u8 value)
2228 {
2229 int ret = -1;
2230
2231 if (sd->sensor_reg_cache[reg] == value)
2232 return 0;
2233
2234 switch (sd->bridge) {
2235 case BRIDGE_OV511:
2236 case BRIDGE_OV511PLUS:
2237 ret = ov511_i2c_w(sd, reg, value);
2238 break;
2239 case BRIDGE_OV518:
2240 case BRIDGE_OV518PLUS:
2241 case BRIDGE_OV519:
2242 ret = ov518_i2c_w(sd, reg, value);
2243 break;
2244 case BRIDGE_OVFX2:
2245 ret = ovfx2_i2c_w(sd, reg, value);
2246 break;
2247 case BRIDGE_W9968CF:
2248 ret = w9968cf_i2c_w(sd, reg, value);
2249 break;
2250 }
2251
2252 if (ret >= 0) {
2253 /* Up on sensor reset empty the register cache */
2254 if (reg == 0x12 && (value & 0x80))
2255 memset(sd->sensor_reg_cache, -1,
2256 sizeof(sd->sensor_reg_cache));
2257 else
2258 sd->sensor_reg_cache[reg] = value;
2259 }
2260
2261 return ret;
2262 }
2263
2264 static int i2c_r(struct sd *sd, __u8 reg)
2265 {
2266 int ret = -1;
2267
2268 if (sd->sensor_reg_cache[reg] != -1)
2269 return sd->sensor_reg_cache[reg];
2270
2271 switch (sd->bridge) {
2272 case BRIDGE_OV511:
2273 case BRIDGE_OV511PLUS:
2274 ret = ov511_i2c_r(sd, reg);
2275 break;
2276 case BRIDGE_OV518:
2277 case BRIDGE_OV518PLUS:
2278 case BRIDGE_OV519:
2279 ret = ov518_i2c_r(sd, reg);
2280 break;
2281 case BRIDGE_OVFX2:
2282 ret = ovfx2_i2c_r(sd, reg);
2283 break;
2284 case BRIDGE_W9968CF:
2285 ret = w9968cf_i2c_r(sd, reg);
2286 break;
2287 }
2288
2289 if (ret >= 0)
2290 sd->sensor_reg_cache[reg] = ret;
2291
2292 return ret;
2293 }
2294
2295 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
2296 * the same position as 1's in "mask" are cleared and set to "value". Bits
2297 * that are in the same position as 0's in "mask" are preserved, regardless
2298 * of their respective state in "value".
2299 */
2300 static int i2c_w_mask(struct sd *sd,
2301 __u8 reg,
2302 __u8 value,
2303 __u8 mask)
2304 {
2305 int rc;
2306 __u8 oldval;
2307
2308 value &= mask; /* Enforce mask on value */
2309 rc = i2c_r(sd, reg);
2310 if (rc < 0)
2311 return rc;
2312 oldval = rc & ~mask; /* Clear the masked bits */
2313 value |= oldval; /* Set the desired bits */
2314 return i2c_w(sd, reg, value);
2315 }
2316
2317 /* Temporarily stops OV511 from functioning. Must do this before changing
2318 * registers while the camera is streaming */
2319 static inline int ov51x_stop(struct sd *sd)
2320 {
2321 PDEBUG(D_STREAM, "stopping");
2322 sd->stopped = 1;
2323 switch (sd->bridge) {
2324 case BRIDGE_OV511:
2325 case BRIDGE_OV511PLUS:
2326 return reg_w(sd, R51x_SYS_RESET, 0x3d);
2327 case BRIDGE_OV518:
2328 case BRIDGE_OV518PLUS:
2329 return reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
2330 case BRIDGE_OV519:
2331 return reg_w(sd, OV519_SYS_RESET1, 0x0f);
2332 case BRIDGE_OVFX2:
2333 return reg_w_mask(sd, 0x0f, 0x00, 0x02);
2334 case BRIDGE_W9968CF:
2335 return reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
2336 }
2337
2338 return 0;
2339 }
2340
2341 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
2342 * actually stopped (for performance). */
2343 static inline int ov51x_restart(struct sd *sd)
2344 {
2345 int rc;
2346
2347 PDEBUG(D_STREAM, "restarting");
2348 if (!sd->stopped)
2349 return 0;
2350 sd->stopped = 0;
2351
2352 /* Reinitialize the stream */
2353 switch (sd->bridge) {
2354 case BRIDGE_OV511:
2355 case BRIDGE_OV511PLUS:
2356 return reg_w(sd, R51x_SYS_RESET, 0x00);
2357 case BRIDGE_OV518:
2358 case BRIDGE_OV518PLUS:
2359 rc = reg_w(sd, 0x2f, 0x80);
2360 if (rc < 0)
2361 return rc;
2362 return reg_w(sd, R51x_SYS_RESET, 0x00);
2363 case BRIDGE_OV519:
2364 return reg_w(sd, OV519_SYS_RESET1, 0x00);
2365 case BRIDGE_OVFX2:
2366 return reg_w_mask(sd, 0x0f, 0x02, 0x02);
2367 case BRIDGE_W9968CF:
2368 return reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
2369 }
2370
2371 return 0;
2372 }
2373
2374 static int ov51x_set_slave_ids(struct sd *sd, __u8 slave);
2375
2376 /* This does an initial reset of an OmniVision sensor and ensures that I2C
2377 * is synchronized. Returns <0 on failure.
2378 */
2379 static int init_ov_sensor(struct sd *sd, __u8 slave)
2380 {
2381 int i;
2382
2383 if (ov51x_set_slave_ids(sd, slave) < 0)
2384 return -EIO;
2385
2386 /* Reset the sensor */
2387 if (i2c_w(sd, 0x12, 0x80) < 0)
2388 return -EIO;
2389
2390 /* Wait for it to initialize */
2391 msleep(150);
2392
2393 for (i = 0; i < i2c_detect_tries; i++) {
2394 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
2395 i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
2396 PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
2397 return 0;
2398 }
2399
2400 /* Reset the sensor */
2401 if (i2c_w(sd, 0x12, 0x80) < 0)
2402 return -EIO;
2403 /* Wait for it to initialize */
2404 msleep(150);
2405 /* Dummy read to sync I2C */
2406 if (i2c_r(sd, 0x00) < 0)
2407 return -EIO;
2408 }
2409 return -EIO;
2410 }
2411
2412 /* Set the read and write slave IDs. The "slave" argument is the write slave,
2413 * and the read slave will be set to (slave + 1).
2414 * This should not be called from outside the i2c I/O functions.
2415 * Sets I2C read and write slave IDs. Returns <0 for error
2416 */
2417 static int ov51x_set_slave_ids(struct sd *sd,
2418 __u8 slave)
2419 {
2420 int rc;
2421
2422 switch (sd->bridge) {
2423 case BRIDGE_OVFX2:
2424 return reg_w(sd, OVFX2_I2C_ADDR, slave);
2425 case BRIDGE_W9968CF:
2426 sd->sensor_addr = slave;
2427 return 0;
2428 }
2429
2430 rc = reg_w(sd, R51x_I2C_W_SID, slave);
2431 if (rc < 0)
2432 return rc;
2433 return reg_w(sd, R51x_I2C_R_SID, slave + 1);
2434 }
2435
2436 static int write_regvals(struct sd *sd,
2437 const struct ov_regvals *regvals,
2438 int n)
2439 {
2440 int rc;
2441
2442 while (--n >= 0) {
2443 rc = reg_w(sd, regvals->reg, regvals->val);
2444 if (rc < 0)
2445 return rc;
2446 regvals++;
2447 }
2448 return 0;
2449 }
2450
2451 static int write_i2c_regvals(struct sd *sd,
2452 const struct ov_i2c_regvals *regvals,
2453 int n)
2454 {
2455 int rc;
2456
2457 while (--n >= 0) {
2458 rc = i2c_w(sd, regvals->reg, regvals->val);
2459 if (rc < 0)
2460 return rc;
2461 regvals++;
2462 }
2463 return 0;
2464 }
2465
2466 /****************************************************************************
2467 *
2468 * OV511 and sensor configuration
2469 *
2470 ***************************************************************************/
2471
2472 /* This initializes the OV2x10 / OV3610 / OV3620 */
2473 static int ov_hires_configure(struct sd *sd)
2474 {
2475 int high, low;
2476
2477 if (sd->bridge != BRIDGE_OVFX2) {
2478 PDEBUG(D_ERR, "error hires sensors only supported with ovfx2");
2479 return -1;
2480 }
2481
2482 PDEBUG(D_PROBE, "starting ov hires configuration");
2483
2484 /* Detect sensor (sub)type */
2485 high = i2c_r(sd, 0x0a);
2486 low = i2c_r(sd, 0x0b);
2487 /* info("%x, %x", high, low); */
2488 if (high == 0x96 && low == 0x40) {
2489 PDEBUG(D_PROBE, "Sensor is an OV2610");
2490 sd->sensor = SEN_OV2610;
2491 } else if (high == 0x36 && (low & 0x0f) == 0x00) {
2492 PDEBUG(D_PROBE, "Sensor is an OV3610");
2493 sd->sensor = SEN_OV3610;
2494 } else {
2495 PDEBUG(D_ERR, "Error unknown sensor type: 0x%02x%02x",
2496 high, low);
2497 return -1;
2498 }
2499
2500 /* Set sensor-specific vars */
2501 return 0;
2502 }
2503
2504
2505 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
2506 * the same register settings as the OV8610, since they are very similar.
2507 */
2508 static int ov8xx0_configure(struct sd *sd)
2509 {
2510 int rc;
2511
2512 PDEBUG(D_PROBE, "starting ov8xx0 configuration");
2513
2514 /* Detect sensor (sub)type */
2515 rc = i2c_r(sd, OV7610_REG_COM_I);
2516 if (rc < 0) {
2517 PDEBUG(D_ERR, "Error detecting sensor type");
2518 return -1;
2519 }
2520 if ((rc & 3) == 1) {
2521 sd->sensor = SEN_OV8610;
2522 } else {
2523 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
2524 return -1;
2525 }
2526
2527 /* Set sensor-specific vars */
2528 return 0;
2529 }
2530
2531 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
2532 * the same register settings as the OV7610, since they are very similar.
2533 */
2534 static int ov7xx0_configure(struct sd *sd)
2535 {
2536 int rc, high, low;
2537
2538
2539 PDEBUG(D_PROBE, "starting OV7xx0 configuration");
2540
2541 /* Detect sensor (sub)type */
2542 rc = i2c_r(sd, OV7610_REG_COM_I);
2543
2544 /* add OV7670 here
2545 * it appears to be wrongly detected as a 7610 by default */
2546 if (rc < 0) {
2547 PDEBUG(D_ERR, "Error detecting sensor type");
2548 return -1;
2549 }
2550 if ((rc & 3) == 3) {
2551 /* quick hack to make OV7670s work */
2552 high = i2c_r(sd, 0x0a);
2553 low = i2c_r(sd, 0x0b);
2554 /* info("%x, %x", high, low); */
2555 if (high == 0x76 && low == 0x73) {
2556 PDEBUG(D_PROBE, "Sensor is an OV7670");
2557 sd->sensor = SEN_OV7670;
2558 } else {
2559 PDEBUG(D_PROBE, "Sensor is an OV7610");
2560 sd->sensor = SEN_OV7610;
2561 }
2562 } else if ((rc & 3) == 1) {
2563 /* I don't know what's different about the 76BE yet. */
2564 if (i2c_r(sd, 0x15) & 1) {
2565 PDEBUG(D_PROBE, "Sensor is an OV7620AE");
2566 sd->sensor = SEN_OV7620AE;
2567 } else {
2568 PDEBUG(D_PROBE, "Sensor is an OV76BE");
2569 sd->sensor = SEN_OV76BE;
2570 }
2571 } else if ((rc & 3) == 0) {
2572 /* try to read product id registers */
2573 high = i2c_r(sd, 0x0a);
2574 if (high < 0) {
2575 PDEBUG(D_ERR, "Error detecting camera chip PID");
2576 return high;
2577 }
2578 low = i2c_r(sd, 0x0b);
2579 if (low < 0) {
2580 PDEBUG(D_ERR, "Error detecting camera chip VER");
2581 return low;
2582 }
2583 if (high == 0x76) {
2584 switch (low) {
2585 case 0x30:
2586 PDEBUG(D_PROBE, "Sensor is an OV7630/OV7635");
2587 PDEBUG(D_ERR,
2588 "7630 is not supported by this driver");
2589 return -1;
2590 case 0x40:
2591 PDEBUG(D_PROBE, "Sensor is an OV7645");
2592 sd->sensor = SEN_OV7640; /* FIXME */
2593 break;
2594 case 0x45:
2595 PDEBUG(D_PROBE, "Sensor is an OV7645B");
2596 sd->sensor = SEN_OV7640; /* FIXME */
2597 break;
2598 case 0x48:
2599 PDEBUG(D_PROBE, "Sensor is an OV7648");
2600 sd->sensor = SEN_OV7648;
2601 break;
2602 default:
2603 PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
2604 return -1;
2605 }
2606 } else {
2607 PDEBUG(D_PROBE, "Sensor is an OV7620");
2608 sd->sensor = SEN_OV7620;
2609 }
2610 } else {
2611 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
2612 return -1;
2613 }
2614
2615 /* Set sensor-specific vars */
2616 return 0;
2617 }
2618
2619 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
2620 static int ov6xx0_configure(struct sd *sd)
2621 {
2622 int rc;
2623 PDEBUG(D_PROBE, "starting OV6xx0 configuration");
2624
2625 /* Detect sensor (sub)type */
2626 rc = i2c_r(sd, OV7610_REG_COM_I);
2627 if (rc < 0) {
2628 PDEBUG(D_ERR, "Error detecting sensor type");
2629 return -1;
2630 }
2631
2632 /* Ugh. The first two bits are the version bits, but
2633 * the entire register value must be used. I guess OVT
2634 * underestimated how many variants they would make. */
2635 switch (rc) {
2636 case 0x00:
2637 sd->sensor = SEN_OV6630;
2638 PDEBUG(D_ERR,
2639 "WARNING: Sensor is an OV66308. Your camera may have");
2640 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
2641 break;
2642 case 0x01:
2643 sd->sensor = SEN_OV6620;
2644 PDEBUG(D_PROBE, "Sensor is an OV6620");
2645 break;
2646 case 0x02:
2647 sd->sensor = SEN_OV6630;
2648 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
2649 break;
2650 case 0x03:
2651 sd->sensor = SEN_OV66308AF;
2652 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
2653 break;
2654 case 0x90:
2655 sd->sensor = SEN_OV6630;
2656 PDEBUG(D_ERR,
2657 "WARNING: Sensor is an OV66307. Your camera may have");
2658 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
2659 break;
2660 default:
2661 PDEBUG(D_ERR, "FATAL: Unknown sensor version: 0x%02x", rc);
2662 return -1;
2663 }
2664
2665 /* Set sensor-specific vars */
2666 sd->sif = 1;
2667
2668 return 0;
2669 }
2670
2671 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
2672 static void ov51x_led_control(struct sd *sd, int on)
2673 {
2674 if (sd->invert_led)
2675 on = !on;
2676
2677 switch (sd->bridge) {
2678 /* OV511 has no LED control */
2679 case BRIDGE_OV511PLUS:
2680 reg_w(sd, R511_SYS_LED_CTL, on ? 1 : 0);
2681 break;
2682 case BRIDGE_OV518:
2683 case BRIDGE_OV518PLUS:
2684 reg_w_mask(sd, R518_GPIO_OUT, on ? 0x02 : 0x00, 0x02);
2685 break;
2686 case BRIDGE_OV519:
2687 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1); /* 0 / 1 */
2688 break;
2689 }
2690 }
2691
2692 static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
2693 {
2694 struct sd *sd = (struct sd *) gspca_dev;
2695
2696 if (!sd->snapshot_needs_reset)
2697 return;
2698
2699 /* Note it is important that we clear sd->snapshot_needs_reset,
2700 before actually clearing the snapshot state in the bridge
2701 otherwise we might race with the pkt_scan interrupt handler */
2702 sd->snapshot_needs_reset = 0;
2703
2704 switch (sd->bridge) {
2705 case BRIDGE_OV511:
2706 case BRIDGE_OV511PLUS:
2707 reg_w(sd, R51x_SYS_SNAP, 0x02);
2708 reg_w(sd, R51x_SYS_SNAP, 0x00);
2709 break;
2710 case BRIDGE_OV518:
2711 case BRIDGE_OV518PLUS:
2712 reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
2713 reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
2714 break;
2715 case BRIDGE_OV519:
2716 reg_w(sd, R51x_SYS_RESET, 0x40);
2717 reg_w(sd, R51x_SYS_RESET, 0x00);
2718 break;
2719 }
2720 }
2721
2722 static int ov51x_upload_quan_tables(struct sd *sd)
2723 {
2724 const unsigned char yQuanTable511[] = {
2725 0, 1, 1, 2, 2, 3, 3, 4,
2726 1, 1, 1, 2, 2, 3, 4, 4,
2727 1, 1, 2, 2, 3, 4, 4, 4,
2728 2, 2, 2, 3, 4, 4, 4, 4,
2729 2, 2, 3, 4, 4, 5, 5, 5,
2730 3, 3, 4, 4, 5, 5, 5, 5,
2731 3, 4, 4, 4, 5, 5, 5, 5,
2732 4, 4, 4, 4, 5, 5, 5, 5
2733 };
2734
2735 const unsigned char uvQuanTable511[] = {
2736 0, 2, 2, 3, 4, 4, 4, 4,
2737 2, 2, 2, 4, 4, 4, 4, 4,
2738 2, 2, 3, 4, 4, 4, 4, 4,
2739 3, 4, 4, 4, 4, 4, 4, 4,
2740 4, 4, 4, 4, 4, 4, 4, 4,
2741 4, 4, 4, 4, 4, 4, 4, 4,
2742 4, 4, 4, 4, 4, 4, 4, 4,
2743 4, 4, 4, 4, 4, 4, 4, 4
2744 };
2745
2746 /* OV518 quantization tables are 8x4 (instead of 8x8) */
2747 const unsigned char yQuanTable518[] = {
2748 5, 4, 5, 6, 6, 7, 7, 7,
2749 5, 5, 5, 5, 6, 7, 7, 7,
2750 6, 6, 6, 6, 7, 7, 7, 8,
2751 7, 7, 6, 7, 7, 7, 8, 8
2752 };
2753
2754 const unsigned char uvQuanTable518[] = {
2755 6, 6, 6, 7, 7, 7, 7, 7,
2756 6, 6, 6, 7, 7, 7, 7, 7,
2757 6, 6, 6, 7, 7, 7, 7, 8,
2758 7, 7, 7, 7, 7, 7, 8, 8
2759 };
2760
2761 const unsigned char *pYTable, *pUVTable;
2762 unsigned char val0, val1;
2763 int i, size, rc, reg = R51x_COMP_LUT_BEGIN;
2764
2765 PDEBUG(D_PROBE, "Uploading quantization tables");
2766
2767 if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
2768 pYTable = yQuanTable511;
2769 pUVTable = uvQuanTable511;
2770 size = 32;
2771 } else {
2772 pYTable = yQuanTable518;
2773 pUVTable = uvQuanTable518;
2774 size = 16;
2775 }
2776
2777 for (i = 0; i < size; i++) {
2778 val0 = *pYTable++;
2779 val1 = *pYTable++;
2780 val0 &= 0x0f;
2781 val1 &= 0x0f;
2782 val0 |= val1 << 4;
2783 rc = reg_w(sd, reg, val0);
2784 if (rc < 0)
2785 return rc;
2786
2787 val0 = *pUVTable++;
2788 val1 = *pUVTable++;
2789 val0 &= 0x0f;
2790 val1 &= 0x0f;
2791 val0 |= val1 << 4;
2792 rc = reg_w(sd, reg + size, val0);
2793 if (rc < 0)
2794 return rc;
2795
2796 reg++;
2797 }
2798
2799 return 0;
2800 }
2801
2802 /* This initializes the OV511/OV511+ and the sensor */
2803 static int ov511_configure(struct gspca_dev *gspca_dev)
2804 {
2805 struct sd *sd = (struct sd *) gspca_dev;
2806 int rc;
2807
2808 /* For 511 and 511+ */
2809 const struct ov_regvals init_511[] = {
2810 { R51x_SYS_RESET, 0x7f },
2811 { R51x_SYS_INIT, 0x01 },
2812 { R51x_SYS_RESET, 0x7f },
2813 { R51x_SYS_INIT, 0x01 },
2814 { R51x_SYS_RESET, 0x3f },
2815 { R51x_SYS_INIT, 0x01 },
2816 { R51x_SYS_RESET, 0x3d },
2817 };
2818
2819 const struct ov_regvals norm_511[] = {
2820 { R511_DRAM_FLOW_CTL, 0x01 },
2821 { R51x_SYS_SNAP, 0x00 },
2822 { R51x_SYS_SNAP, 0x02 },
2823 { R51x_SYS_SNAP, 0x00 },
2824 { R511_FIFO_OPTS, 0x1f },
2825 { R511_COMP_EN, 0x00 },
2826 { R511_COMP_LUT_EN, 0x03 },
2827 };
2828
2829 const struct ov_regvals norm_511_p[] = {
2830 { R511_DRAM_FLOW_CTL, 0xff },
2831 { R51x_SYS_SNAP, 0x00 },
2832 { R51x_SYS_SNAP, 0x02 },
2833 { R51x_SYS_SNAP, 0x00 },
2834 { R511_FIFO_OPTS, 0xff },
2835 { R511_COMP_EN, 0x00 },
2836 { R511_COMP_LUT_EN, 0x03 },
2837 };
2838
2839 const struct ov_regvals compress_511[] = {
2840 { 0x70, 0x1f },
2841 { 0x71, 0x05 },
2842 { 0x72, 0x06 },
2843 { 0x73, 0x06 },
2844 { 0x74, 0x14 },
2845 { 0x75, 0x03 },
2846 { 0x76, 0x04 },
2847 { 0x77, 0x04 },
2848 };
2849
2850 PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
2851
2852 rc = write_regvals(sd, init_511, ARRAY_SIZE(init_511));
2853 if (rc < 0)
2854 return rc;
2855
2856 switch (sd->bridge) {
2857 case BRIDGE_OV511:
2858 rc = write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
2859 if (rc < 0)
2860 return rc;
2861 break;
2862 case BRIDGE_OV511PLUS:
2863 rc = write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
2864 if (rc < 0)
2865 return rc;
2866 break;
2867 }
2868
2869 /* Init compression */
2870 rc = write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
2871 if (rc < 0)
2872 return rc;
2873
2874 rc = ov51x_upload_quan_tables(sd);
2875 if (rc < 0) {
2876 PDEBUG(D_ERR, "Error uploading quantization tables");
2877 return rc;
2878 }
2879
2880 return 0;
2881 }
2882
2883 /* This initializes the OV518/OV518+ and the sensor */
2884 static int ov518_configure(struct gspca_dev *gspca_dev)
2885 {
2886 struct sd *sd = (struct sd *) gspca_dev;
2887 int rc;
2888
2889 /* For 518 and 518+ */
2890 const struct ov_regvals init_518[] = {
2891 { R51x_SYS_RESET, 0x40 },
2892 { R51x_SYS_INIT, 0xe1 },
2893 { R51x_SYS_RESET, 0x3e },
2894 { R51x_SYS_INIT, 0xe1 },
2895 { R51x_SYS_RESET, 0x00 },
2896 { R51x_SYS_INIT, 0xe1 },
2897 { 0x46, 0x00 },
2898 { 0x5d, 0x03 },
2899 };
2900
2901 const struct ov_regvals norm_518[] = {
2902 { R51x_SYS_SNAP, 0x02 }, /* Reset */
2903 { R51x_SYS_SNAP, 0x01 }, /* Enable */
2904 { 0x31, 0x0f },
2905 { 0x5d, 0x03 },
2906 { 0x24, 0x9f },
2907 { 0x25, 0x90 },
2908 { 0x20, 0x00 },
2909 { 0x51, 0x04 },
2910 { 0x71, 0x19 },
2911 { 0x2f, 0x80 },
2912 };
2913
2914 const struct ov_regvals norm_518_p[] = {
2915 { R51x_SYS_SNAP, 0x02 }, /* Reset */
2916 { R51x_SYS_SNAP, 0x01 }, /* Enable */
2917 { 0x31, 0x0f },
2918 { 0x5d, 0x03 },
2919 { 0x24, 0x9f },
2920 { 0x25, 0x90 },
2921 { 0x20, 0x60 },
2922 { 0x51, 0x02 },
2923 { 0x71, 0x19 },
2924 { 0x40, 0xff },
2925 { 0x41, 0x42 },
2926 { 0x46, 0x00 },
2927 { 0x33, 0x04 },
2928 { 0x21, 0x19 },
2929 { 0x3f, 0x10 },
2930 { 0x2f, 0x80 },
2931 };
2932
2933 /* First 5 bits of custom ID reg are a revision ID on OV518 */
2934 PDEBUG(D_PROBE, "Device revision %d",
2935 0x1F & reg_r(sd, R51x_SYS_CUST_ID));
2936
2937 rc = write_regvals(sd, init_518, ARRAY_SIZE(init_518));
2938 if (rc < 0)
2939 return rc;
2940
2941 /* Set LED GPIO pin to output mode */
2942 rc = reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
2943 if (rc < 0)
2944 return rc;
2945
2946 switch (sd->bridge) {
2947 case BRIDGE_OV518:
2948 rc = write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
2949 if (rc < 0)
2950 return rc;
2951 break;
2952 case BRIDGE_OV518PLUS:
2953 rc = write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
2954 if (rc < 0)
2955 return rc;
2956 break;
2957 }
2958
2959 rc = ov51x_upload_quan_tables(sd);
2960 if (rc < 0) {
2961 PDEBUG(D_ERR, "Error uploading quantization tables");
2962 return rc;
2963 }
2964
2965 rc = reg_w(sd, 0x2f, 0x80);
2966 if (rc < 0)
2967 return rc;
2968
2969 return 0;
2970 }
2971
2972 static int ov519_configure(struct sd *sd)
2973 {
2974 static const struct ov_regvals init_519[] = {
2975 { 0x5a, 0x6d }, /* EnableSystem */
2976 { 0x53, 0x9b },
2977 { 0x54, 0xff }, /* set bit2 to enable jpeg */
2978 { 0x5d, 0x03 },
2979 { 0x49, 0x01 },
2980 { 0x48, 0x00 },
2981 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
2982 * detection will fail. This deserves further investigation. */
2983 { OV519_GPIO_IO_CTRL0, 0xee },
2984 { 0x51, 0x0f }, /* SetUsbInit */
2985 { 0x51, 0x00 },
2986 { 0x22, 0x00 },
2987 /* windows reads 0x55 at this point*/
2988 };
2989
2990 return write_regvals(sd, init_519, ARRAY_SIZE(init_519));
2991 }
2992
2993 static int ovfx2_configure(struct sd *sd)
2994 {
2995 static const struct ov_regvals init_fx2[] = {
2996 { 0x00, 0x60 },
2997 { 0x02, 0x01 },
2998 { 0x0f, 0x1d },
2999 { 0xe9, 0x82 },
3000 { 0xea, 0xc7 },
3001 { 0xeb, 0x10 },
3002 { 0xec, 0xf6 },
3003 };
3004
3005 sd->stopped = 1;
3006
3007 return write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
3008 }
3009
3010 /* this function is called at probe time */
3011 static int sd_config(struct gspca_dev *gspca_dev,
3012 const struct usb_device_id *id)
3013 {
3014 struct sd *sd = (struct sd *) gspca_dev;
3015 struct cam *cam = &gspca_dev->cam;
3016 int ret = 0;
3017
3018 sd->bridge = id->driver_info & BRIDGE_MASK;
3019 sd->invert_led = id->driver_info & BRIDGE_INVERT_LED;
3020
3021 switch (sd->bridge) {
3022 case BRIDGE_OV511:
3023 case BRIDGE_OV511PLUS:
3024 ret = ov511_configure(gspca_dev);
3025 break;
3026 case BRIDGE_OV518:
3027 case BRIDGE_OV518PLUS:
3028 ret = ov518_configure(gspca_dev);
3029 break;
3030 case BRIDGE_OV519:
3031 ret = ov519_configure(sd);
3032 break;
3033 case BRIDGE_OVFX2:
3034 ret = ovfx2_configure(sd);
3035 cam->bulk_size = OVFX2_BULK_SIZE;
3036 cam->bulk_nurbs = MAX_NURBS;
3037 cam->bulk = 1;
3038 break;
3039 case BRIDGE_W9968CF:
3040 ret = w9968cf_configure(sd);
3041 cam->reverse_alts = 1;
3042 break;
3043 }
3044
3045 if (ret)
3046 goto error;
3047
3048 ov51x_led_control(sd, 0); /* turn LED off */
3049
3050 /* The OV519 must be more aggressive about sensor detection since
3051 * I2C write will never fail if the sensor is not present. We have
3052 * to try to initialize the sensor to detect its presence */
3053
3054 /* Test for 76xx */
3055 if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
3056 if (ov7xx0_configure(sd) < 0) {
3057 PDEBUG(D_ERR, "Failed to configure OV7xx0");
3058 goto error;
3059 }
3060 /* Test for 6xx0 */
3061 } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
3062 if (ov6xx0_configure(sd) < 0) {
3063 PDEBUG(D_ERR, "Failed to configure OV6xx0");
3064 goto error;
3065 }
3066 /* Test for 8xx0 */
3067 } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
3068 if (ov8xx0_configure(sd) < 0) {
3069 PDEBUG(D_ERR, "Failed to configure OV8xx0");
3070 goto error;
3071 }
3072 /* Test for 3xxx / 2xxx */
3073 } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
3074 if (ov_hires_configure(sd) < 0) {
3075 PDEBUG(D_ERR, "Failed to configure high res OV");
3076 goto error;
3077 }
3078 } else {
3079 PDEBUG(D_ERR, "Can't determine sensor slave IDs");
3080 goto error;
3081 }
3082
3083 switch (sd->bridge) {
3084 case BRIDGE_OV511:
3085 case BRIDGE_OV511PLUS:
3086 if (!sd->sif) {
3087 cam->cam_mode = ov511_vga_mode;
3088 cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
3089 } else {
3090 cam->cam_mode = ov511_sif_mode;
3091 cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
3092 }
3093 break;
3094 case BRIDGE_OV518:
3095 case BRIDGE_OV518PLUS:
3096 if (!sd->sif) {
3097 cam->cam_mode = ov518_vga_mode;
3098 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
3099 } else {
3100 cam->cam_mode = ov518_sif_mode;
3101 cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
3102 }
3103 break;
3104 case BRIDGE_OV519:
3105 if (!sd->sif) {
3106 cam->cam_mode = ov519_vga_mode;
3107 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3108 } else {
3109 cam->cam_mode = ov519_sif_mode;
3110 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3111 }
3112 break;
3113 case BRIDGE_OVFX2:
3114 if (sd->sensor == SEN_OV2610) {
3115 cam->cam_mode = ovfx2_ov2610_mode;
3116 cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
3117 } else if (sd->sensor == SEN_OV3610) {
3118 cam->cam_mode = ovfx2_ov3610_mode;
3119 cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
3120 } else if (!sd->sif) {
3121 cam->cam_mode = ov519_vga_mode;
3122 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3123 } else {
3124 cam->cam_mode = ov519_sif_mode;
3125 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3126 }
3127 break;
3128 case BRIDGE_W9968CF:
3129 cam->cam_mode = w9968cf_vga_mode;
3130 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3131 if (sd->sif)
3132 cam->nmodes--;
3133
3134 /* w9968cf needs initialisation once the sensor is known */
3135 if (w9968cf_init(sd) < 0)
3136 goto error;
3137 break;
3138 }
3139 sd->brightness = BRIGHTNESS_DEF;
3140 if (sd->sensor == SEN_OV6630 || sd->sensor == SEN_OV66308AF)
3141 sd->contrast = 200; /* The default is too low for the ov6630 */
3142 else
3143 sd->contrast = CONTRAST_DEF;
3144 sd->colors = COLOR_DEF;
3145 sd->hflip = HFLIP_DEF;
3146 sd->vflip = VFLIP_DEF;
3147 sd->autobrightness = AUTOBRIGHT_DEF;
3148 if (sd->sensor == SEN_OV7670) {
3149 sd->freq = OV7670_FREQ_DEF;
3150 gspca_dev->ctrl_dis = 1 << FREQ_IDX;
3151 } else {
3152 sd->freq = FREQ_DEF;
3153 gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX) |
3154 (1 << OV7670_FREQ_IDX);
3155 }
3156 sd->quality = QUALITY_DEF;
3157 if (sd->sensor == SEN_OV7640 ||
3158 sd->sensor == SEN_OV7648)
3159 gspca_dev->ctrl_dis |= (1 << AUTOBRIGHT_IDX) |
3160 (1 << CONTRAST_IDX);
3161 if (sd->sensor == SEN_OV7670)
3162 gspca_dev->ctrl_dis |= 1 << AUTOBRIGHT_IDX;
3163 /* OV8610 Frequency filter control should work but needs testing */
3164 if (sd->sensor == SEN_OV8610)
3165 gspca_dev->ctrl_dis |= 1 << FREQ_IDX;
3166 /* No controls for the OV2610/OV3610 */
3167 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
3168 gspca_dev->ctrl_dis |= 0xFF;
3169
3170 return 0;
3171 error:
3172 PDEBUG(D_ERR, "OV519 Config failed");
3173 return -EBUSY;
3174 }
3175
3176 /* this function is called at probe and resume time */
3177 static int sd_init(struct gspca_dev *gspca_dev)
3178 {
3179 struct sd *sd = (struct sd *) gspca_dev;
3180
3181 /* initialize the sensor */
3182 switch (sd->sensor) {
3183 case SEN_OV2610:
3184 if (write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610)))
3185 return -EIO;
3186 /* Enable autogain, autoexpo, awb, bandfilter */
3187 if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0)
3188 return -EIO;
3189 break;
3190 case SEN_OV3610:
3191 if (write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b)))
3192 return -EIO;
3193 /* Enable autogain, autoexpo, awb, bandfilter */
3194 if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0)
3195 return -EIO;
3196 break;
3197 case SEN_OV6620:
3198 if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20)))
3199 return -EIO;
3200 break;
3201 case SEN_OV6630:
3202 case SEN_OV66308AF:
3203 if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30)))
3204 return -EIO;
3205 break;
3206 default:
3207 /* case SEN_OV7610: */
3208 /* case SEN_OV76BE: */
3209 if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610)))
3210 return -EIO;
3211 if (i2c_w_mask(sd, 0x0e, 0x00, 0x40))
3212 return -EIO;
3213 break;
3214 case SEN_OV7620:
3215 case SEN_OV7620AE:
3216 if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620)))
3217 return -EIO;
3218 break;
3219 case SEN_OV7640:
3220 case SEN_OV7648:
3221 if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640)))
3222 return -EIO;
3223 break;
3224 case SEN_OV7670:
3225 if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670)))
3226 return -EIO;
3227 break;
3228 case SEN_OV8610:
3229 if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610)))
3230 return -EIO;
3231 break;
3232 }
3233 return 0;
3234 }
3235
3236 /* Set up the OV511/OV511+ with the given image parameters.
3237 *
3238 * Do not put any sensor-specific code in here (including I2C I/O functions)
3239 */
3240 static int ov511_mode_init_regs(struct sd *sd)
3241 {
3242 int hsegs, vsegs, packet_size, fps, needed;
3243 int interlaced = 0;
3244 struct usb_host_interface *alt;
3245 struct usb_interface *intf;
3246
3247 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3248 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3249 if (!alt) {
3250 PDEBUG(D_ERR, "Couldn't get altsetting");
3251 return -EIO;
3252 }
3253
3254 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3255 reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
3256
3257 reg_w(sd, R511_CAM_UV_EN, 0x01);
3258 reg_w(sd, R511_SNAP_UV_EN, 0x01);
3259 reg_w(sd, R511_SNAP_OPTS, 0x03);
3260
3261 /* Here I'm assuming that snapshot size == image size.
3262 * I hope that's always true. --claudio
3263 */
3264 hsegs = (sd->gspca_dev.width >> 3) - 1;
3265 vsegs = (sd->gspca_dev.height >> 3) - 1;
3266
3267 reg_w(sd, R511_CAM_PXCNT, hsegs);
3268 reg_w(sd, R511_CAM_LNCNT, vsegs);
3269 reg_w(sd, R511_CAM_PXDIV, 0x00);
3270 reg_w(sd, R511_CAM_LNDIV, 0x00);
3271
3272 /* YUV420, low pass filter on */
3273 reg_w(sd, R511_CAM_OPTS, 0x03);
3274
3275 /* Snapshot additions */
3276 reg_w(sd, R511_SNAP_PXCNT, hsegs);
3277 reg_w(sd, R511_SNAP_LNCNT, vsegs);
3278 reg_w(sd, R511_SNAP_PXDIV, 0x00);
3279 reg_w(sd, R511_SNAP_LNDIV, 0x00);
3280
3281 /******** Set the framerate ********/
3282 if (frame_rate > 0)
3283 sd->frame_rate = frame_rate;
3284
3285 switch (sd->sensor) {
3286 case SEN_OV6620:
3287 /* No framerate control, doesn't like higher rates yet */
3288 sd->clockdiv = 3;
3289 break;
3290
3291 /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3292 for more sensors we need to do this for them too */
3293 case SEN_OV7620:
3294 case SEN_OV7620AE:
3295 case SEN_OV7640:
3296 case SEN_OV7648:
3297 case SEN_OV76BE:
3298 if (sd->gspca_dev.width == 320)
3299 interlaced = 1;
3300 /* Fall through */
3301 case SEN_OV6630:
3302 case SEN_OV7610:
3303 case SEN_OV7670:
3304 switch (sd->frame_rate) {
3305 case 30:
3306 case 25:
3307 /* Not enough bandwidth to do 640x480 @ 30 fps */
3308 if (sd->gspca_dev.width != 640) {
3309 sd->clockdiv = 0;
3310 break;
3311 }
3312 /* Fall through for 640x480 case */
3313 default:
3314 /* case 20: */
3315 /* case 15: */
3316 sd->clockdiv = 1;
3317 break;
3318 case 10:
3319 sd->clockdiv = 2;
3320 break;
3321 case 5:
3322 sd->clockdiv = 5;
3323 break;
3324 }
3325 if (interlaced) {
3326 sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
3327 /* Higher then 10 does not work */
3328 if (sd->clockdiv > 10)
3329 sd->clockdiv = 10;
3330 }
3331 break;
3332
3333 case SEN_OV8610:
3334 /* No framerate control ?? */
3335 sd->clockdiv = 0;
3336 break;
3337 }
3338
3339 /* Check if we have enough bandwidth to disable compression */
3340 fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3341 needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
3342 /* 1400 is a conservative estimate of the max nr of isoc packets/sec */
3343 if (needed > 1400 * packet_size) {
3344 /* Enable Y and UV quantization and compression */
3345 reg_w(sd, R511_COMP_EN, 0x07);
3346 reg_w(sd, R511_COMP_LUT_EN, 0x03);
3347 } else {
3348 reg_w(sd, R511_COMP_EN, 0x06);
3349 reg_w(sd, R511_COMP_LUT_EN, 0x00);
3350 }
3351
3352 reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
3353 reg_w(sd, R51x_SYS_RESET, 0);
3354
3355 return 0;
3356 }
3357
3358 /* Sets up the OV518/OV518+ with the given image parameters
3359 *
3360 * OV518 needs a completely different approach, until we can figure out what
3361 * the individual registers do. Also, only 15 FPS is supported now.
3362 *
3363 * Do not put any sensor-specific code in here (including I2C I/O functions)
3364 */
3365 static int ov518_mode_init_regs(struct sd *sd)
3366 {
3367 int hsegs, vsegs, packet_size;
3368 struct usb_host_interface *alt;
3369 struct usb_interface *intf;
3370
3371 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3372 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3373 if (!alt) {
3374 PDEBUG(D_ERR, "Couldn't get altsetting");
3375 return -EIO;
3376 }
3377
3378 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3379 ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
3380
3381 /******** Set the mode ********/
3382
3383 reg_w(sd, 0x2b, 0);
3384 reg_w(sd, 0x2c, 0);
3385 reg_w(sd, 0x2d, 0);
3386 reg_w(sd, 0x2e, 0);
3387 reg_w(sd, 0x3b, 0);
3388 reg_w(sd, 0x3c, 0);
3389 reg_w(sd, 0x3d, 0);
3390 reg_w(sd, 0x3e, 0);
3391
3392 if (sd->bridge == BRIDGE_OV518) {
3393 /* Set 8-bit (YVYU) input format */
3394 reg_w_mask(sd, 0x20, 0x08, 0x08);
3395
3396 /* Set 12-bit (4:2:0) output format */
3397 reg_w_mask(sd, 0x28, 0x80, 0xf0);
3398 reg_w_mask(sd, 0x38, 0x80, 0xf0);
3399 } else {
3400 reg_w(sd, 0x28, 0x80);
3401 reg_w(sd, 0x38, 0x80);
3402 }
3403
3404 hsegs = sd->gspca_dev.width / 16;
3405 vsegs = sd->gspca_dev.height / 4;
3406
3407 reg_w(sd, 0x29, hsegs);
3408 reg_w(sd, 0x2a, vsegs);
3409
3410 reg_w(sd, 0x39, hsegs);
3411 reg_w(sd, 0x3a, vsegs);
3412
3413 /* Windows driver does this here; who knows why */
3414 reg_w(sd, 0x2f, 0x80);
3415
3416 /******** Set the framerate ********/
3417 sd->clockdiv = 1;
3418
3419 /* Mode independent, but framerate dependent, regs */
3420 /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
3421 reg_w(sd, 0x51, 0x04);
3422 reg_w(sd, 0x22, 0x18);
3423 reg_w(sd, 0x23, 0xff);
3424
3425 if (sd->bridge == BRIDGE_OV518PLUS) {
3426 switch (sd->sensor) {
3427 case SEN_OV7620AE:
3428 if (sd->gspca_dev.width == 320) {
3429 reg_w(sd, 0x20, 0x00);
3430 reg_w(sd, 0x21, 0x19);
3431 } else {
3432 reg_w(sd, 0x20, 0x60);
3433 reg_w(sd, 0x21, 0x1f);
3434 }
3435 break;
3436 case SEN_OV7620:
3437 reg_w(sd, 0x20, 0x00);
3438 reg_w(sd, 0x21, 0x19);
3439 break;
3440 default:
3441 reg_w(sd, 0x21, 0x19);
3442 }
3443 } else
3444 reg_w(sd, 0x71, 0x17); /* Compression-related? */
3445
3446 /* FIXME: Sensor-specific */
3447 /* Bit 5 is what matters here. Of course, it is "reserved" */
3448 i2c_w(sd, 0x54, 0x23);
3449
3450 reg_w(sd, 0x2f, 0x80);
3451
3452 if (sd->bridge == BRIDGE_OV518PLUS) {
3453 reg_w(sd, 0x24, 0x94);
3454 reg_w(sd, 0x25, 0x90);
3455 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3456 ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
3457 ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
3458 ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
3459 ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
3460 ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
3461 ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
3462 ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
3463 ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
3464 } else {
3465 reg_w(sd, 0x24, 0x9f);
3466 reg_w(sd, 0x25, 0x90);
3467 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3468 ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
3469 ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
3470 ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
3471 ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
3472 ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
3473 ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
3474 ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
3475 ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
3476 }
3477
3478 reg_w(sd, 0x2f, 0x80);
3479
3480 return 0;
3481 }
3482
3483
3484 /* Sets up the OV519 with the given image parameters
3485 *
3486 * OV519 needs a completely different approach, until we can figure out what
3487 * the individual registers do.
3488 *
3489 * Do not put any sensor-specific code in here (including I2C I/O functions)
3490 */
3491 static int ov519_mode_init_regs(struct sd *sd)
3492 {
3493 static const struct ov_regvals mode_init_519_ov7670[] = {
3494 { 0x5d, 0x03 }, /* Turn off suspend mode */
3495 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3496 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
3497 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3498 { 0xa3, 0x18 },
3499 { 0xa4, 0x04 },
3500 { 0xa5, 0x28 },
3501 { 0x37, 0x00 }, /* SetUsbInit */
3502 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3503 /* Enable both fields, YUV Input, disable defect comp (why?) */
3504 { 0x20, 0x0c },
3505 { 0x21, 0x38 },
3506 { 0x22, 0x1d },
3507 { 0x17, 0x50 }, /* undocumented */
3508 { 0x37, 0x00 }, /* undocumented */
3509 { 0x40, 0xff }, /* I2C timeout counter */
3510 { 0x46, 0x00 }, /* I2C clock prescaler */
3511 { 0x59, 0x04 }, /* new from windrv 090403 */
3512 { 0xff, 0x00 }, /* undocumented */
3513 /* windows reads 0x55 at this point, why? */
3514 };
3515
3516 static const struct ov_regvals mode_init_519[] = {
3517 { 0x5d, 0x03 }, /* Turn off suspend mode */
3518 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3519 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
3520 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3521 { 0xa3, 0x18 },
3522 { 0xa4, 0x04 },
3523 { 0xa5, 0x28 },
3524 { 0x37, 0x00 }, /* SetUsbInit */
3525 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3526 /* Enable both fields, YUV Input, disable defect comp (why?) */
3527 { 0x22, 0x1d },
3528 { 0x17, 0x50 }, /* undocumented */
3529 { 0x37, 0x00 }, /* undocumented */
3530 { 0x40, 0xff }, /* I2C timeout counter */
3531 { 0x46, 0x00 }, /* I2C clock prescaler */
3532 { 0x59, 0x04 }, /* new from windrv 090403 */
3533 { 0xff, 0x00 }, /* undocumented */
3534 /* windows reads 0x55 at this point, why? */
3535 };
3536
3537 /******** Set the mode ********/
3538 if (sd->sensor != SEN_OV7670) {
3539 if (write_regvals(sd, mode_init_519,
3540 ARRAY_SIZE(mode_init_519)))
3541 return -EIO;
3542 if (sd->sensor == SEN_OV7640 ||
3543 sd->sensor == SEN_OV7648) {
3544 /* Select 8-bit input mode */
3545 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3546 }
3547 } else {
3548 if (write_regvals(sd, mode_init_519_ov7670,
3549 ARRAY_SIZE(mode_init_519_ov7670)))
3550 return -EIO;
3551 }
3552
3553 reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4);
3554 reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3);
3555 if (sd->sensor == SEN_OV7670 &&
3556 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3557 reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3558 else if (sd->sensor == SEN_OV7648 &&
3559 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3560 reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
3561 else
3562 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3563 reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
3564 reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
3565 reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
3566 reg_w(sd, OV519_R16_DIVIDER, 0x00);
3567 reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
3568 reg_w(sd, 0x26, 0x00); /* Undocumented */
3569
3570 /******** Set the framerate ********/
3571 if (frame_rate > 0)
3572 sd->frame_rate = frame_rate;
3573
3574 /* FIXME: These are only valid at the max resolution. */
3575 sd->clockdiv = 0;
3576 switch (sd->sensor) {
3577 case SEN_OV7640:
3578 case SEN_OV7648:
3579 switch (sd->frame_rate) {
3580 default:
3581 /* case 30: */
3582 reg_w(sd, 0xa4, 0x0c);
3583 reg_w(sd, 0x23, 0xff);
3584 break;
3585 case 25:
3586 reg_w(sd, 0xa4, 0x0c);
3587 reg_w(sd, 0x23, 0x1f);
3588 break;
3589 case 20:
3590 reg_w(sd, 0xa4, 0x0c);
3591 reg_w(sd, 0x23, 0x1b);
3592 break;
3593 case 15:
3594 reg_w(sd, 0xa4, 0x04);
3595 reg_w(sd, 0x23, 0xff);
3596 sd->clockdiv = 1;
3597 break;
3598 case 10:
3599 reg_w(sd, 0xa4, 0x04);
3600 reg_w(sd, 0x23, 0x1f);
3601 sd->clockdiv = 1;
3602 break;
3603 case 5:
3604 reg_w(sd, 0xa4, 0x04);
3605 reg_w(sd, 0x23, 0x1b);
3606 sd->clockdiv = 1;
3607 break;
3608 }
3609 break;
3610 case SEN_OV8610:
3611 switch (sd->frame_rate) {
3612 default: /* 15 fps */
3613 /* case 15: */
3614 reg_w(sd, 0xa4, 0x06);
3615 reg_w(sd, 0x23, 0xff);
3616 break;
3617 case 10:
3618 reg_w(sd, 0xa4, 0x06);
3619 reg_w(sd, 0x23, 0x1f);
3620 break;
3621 case 5:
3622 reg_w(sd, 0xa4, 0x06);
3623 reg_w(sd, 0x23, 0x1b);
3624 break;
3625 }
3626 break;
3627 case SEN_OV7670: /* guesses, based on 7640 */
3628 PDEBUG(D_STREAM, "Setting framerate to %d fps",
3629 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
3630 reg_w(sd, 0xa4, 0x10);
3631 switch (sd->frame_rate) {
3632 case 30:
3633 reg_w(sd, 0x23, 0xff);
3634 break;
3635 case 20:
3636 reg_w(sd, 0x23, 0x1b);
3637 break;
3638 default:
3639 /* case 15: */
3640 reg_w(sd, 0x23, 0xff);
3641 sd->clockdiv = 1;
3642 break;
3643 }
3644 break;
3645 }
3646 return 0;
3647 }
3648
3649 static int mode_init_ov_sensor_regs(struct sd *sd)
3650 {
3651 struct gspca_dev *gspca_dev;
3652 int qvga, xstart, xend, ystart, yend;
3653 __u8 v;
3654
3655 gspca_dev = &sd->gspca_dev;
3656 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
3657
3658 /******** Mode (VGA/QVGA) and sensor specific regs ********/
3659 switch (sd->sensor) {
3660 case SEN_OV2610:
3661 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3662 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3663 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3664 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3665 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3666 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3667 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3668 return 0;
3669 case SEN_OV3610:
3670 if (qvga) {
3671 xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4);
3672 ystart = (776 - gspca_dev->height) / 2;
3673 } else {
3674 xstart = (2076 - gspca_dev->width) / 2 + (0x10 << 4);
3675 ystart = (1544 - gspca_dev->height) / 2;
3676 }
3677 xend = xstart + gspca_dev->width;
3678 yend = ystart + gspca_dev->height;
3679 /* Writing to the COMH register resets the other windowing regs
3680 to their default values, so we must do this first. */
3681 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
3682 i2c_w_mask(sd, 0x32,
3683 (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
3684 0x3f);
3685 i2c_w_mask(sd, 0x03,
3686 (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
3687 0x0f);
3688 i2c_w(sd, 0x17, xstart >> 4);
3689 i2c_w(sd, 0x18, xend >> 4);
3690 i2c_w(sd, 0x19, ystart >> 3);
3691 i2c_w(sd, 0x1a, yend >> 3);
3692 return 0;
3693 case SEN_OV8610:
3694 /* For OV8610 qvga means qsvga */
3695 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
3696 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3697 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3698 i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
3699 i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
3700 break;
3701 case SEN_OV7610:
3702 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3703 i2c_w(sd, 0x35, qvga?0x1e:0x9e);
3704 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3705 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3706 break;
3707 case SEN_OV7620:
3708 case SEN_OV7620AE:
3709 case SEN_OV76BE:
3710 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3711 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3712 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3713 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3714 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3715 i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
3716 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3717 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3718 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3719 if (sd->sensor == SEN_OV76BE)
3720 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3721 break;
3722 case SEN_OV7640:
3723 case SEN_OV7648:
3724 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3725 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3726 /* Setting this undocumented bit in qvga mode removes a very
3727 annoying vertical shaking of the image */
3728 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3729 /* Unknown */
3730 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3731 /* Allow higher automatic gain (to allow higher framerates) */
3732 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3733 i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
3734 break;
3735 case SEN_OV7670:
3736 /* set COM7_FMT_VGA or COM7_FMT_QVGA
3737 * do we need to set anything else?
3738 * HSTART etc are set in set_ov_sensor_window itself */
3739 i2c_w_mask(sd, OV7670_REG_COM7,
3740 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
3741 OV7670_COM7_FMT_MASK);
3742 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3743 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB,
3744 OV7670_COM8_AWB);
3745 if (qvga) { /* QVGA from ov7670.c by
3746 * Jonathan Corbet */
3747 xstart = 164;
3748 xend = 28;
3749 ystart = 14;
3750 yend = 494;
3751 } else { /* VGA */
3752 xstart = 158;
3753 xend = 14;
3754 ystart = 10;
3755 yend = 490;
3756 }
3757 /* OV7670 hardware window registers are split across
3758 * multiple locations */
3759 i2c_w(sd, OV7670_REG_HSTART, xstart >> 3);
3760 i2c_w(sd, OV7670_REG_HSTOP, xend >> 3);
3761 v = i2c_r(sd, OV7670_REG_HREF);
3762 v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
3763 msleep(10); /* need to sleep between read and write to
3764 * same reg! */
3765 i2c_w(sd, OV7670_REG_HREF, v);
3766
3767 i2c_w(sd, OV7670_REG_VSTART, ystart >> 2);
3768 i2c_w(sd, OV7670_REG_VSTOP, yend >> 2);
3769 v = i2c_r(sd, OV7670_REG_VREF);
3770 v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
3771 msleep(10); /* need to sleep between read and write to
3772 * same reg! */
3773 i2c_w(sd, OV7670_REG_VREF, v);
3774 break;
3775 case SEN_OV6620:
3776 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3777 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3778 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3779 break;
3780 case SEN_OV6630:
3781 case SEN_OV66308AF:
3782 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3783 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3784 break;
3785 default:
3786 return -EINVAL;
3787 }
3788
3789 /******** Clock programming ********/
3790 i2c_w(sd, 0x11, sd->clockdiv);
3791
3792 return 0;
3793 }
3794
3795 static void sethvflip(struct sd *sd)
3796 {
3797 if (sd->sensor != SEN_OV7670)
3798 return;
3799 if (sd->gspca_dev.streaming)
3800 ov51x_stop(sd);
3801 i2c_w_mask(sd, OV7670_REG_MVFP,
3802 OV7670_MVFP_MIRROR * sd->hflip
3803 | OV7670_MVFP_VFLIP * sd->vflip,
3804 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
3805 if (sd->gspca_dev.streaming)
3806 ov51x_restart(sd);
3807 }
3808
3809 static int set_ov_sensor_window(struct sd *sd)
3810 {
3811 struct gspca_dev *gspca_dev;
3812 int qvga, crop;
3813 int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
3814 int ret;
3815
3816 /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
3817 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610 ||
3818 sd->sensor == SEN_OV7670)
3819 return mode_init_ov_sensor_regs(sd);
3820
3821 gspca_dev = &sd->gspca_dev;
3822 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
3823 crop = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 2;
3824
3825 /* The different sensor ICs handle setting up of window differently.
3826 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
3827 switch (sd->sensor) {
3828 case SEN_OV8610:
3829 hwsbase = 0x1e;
3830 hwebase = 0x1e;
3831 vwsbase = 0x02;
3832 vwebase = 0x02;
3833 break;
3834 case SEN_OV7610:
3835 case SEN_OV76BE:
3836 hwsbase = 0x38;
3837 hwebase = 0x3a;
3838 vwsbase = vwebase = 0x05;
3839 break;
3840 case SEN_OV6620:
3841 case SEN_OV6630:
3842 case SEN_OV66308AF:
3843 hwsbase = 0x38;
3844 hwebase = 0x3a;
3845 vwsbase = 0x05;
3846 vwebase = 0x06;
3847 if (sd->sensor == SEN_OV66308AF && qvga)
3848 /* HDG: this fixes U and V getting swapped */
3849 hwsbase++;
3850 if (crop) {
3851 hwsbase += 8;
3852 hwebase += 8;
3853 vwsbase += 11;
3854 vwebase += 11;
3855 }
3856 break;
3857 case SEN_OV7620:
3858 case SEN_OV7620AE:
3859 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
3860 hwebase = 0x2f;
3861 vwsbase = vwebase = 0x05;
3862 break;
3863 case SEN_OV7640:
3864 case SEN_OV7648:
3865 hwsbase = 0x1a;
3866 hwebase = 0x1a;
3867 vwsbase = vwebase = 0x03;
3868 break;
3869 default:
3870 return -EINVAL;
3871 }
3872
3873 switch (sd->sensor) {
3874 case SEN_OV6620:
3875 case SEN_OV6630:
3876 case SEN_OV66308AF:
3877 if (qvga) { /* QCIF */
3878 hwscale = 0;
3879 vwscale = 0;
3880 } else { /* CIF */
3881 hwscale = 1;
3882 vwscale = 1; /* The datasheet says 0;
3883 * it's wrong */
3884 }
3885 break;
3886 case SEN_OV8610:
3887 if (qvga) { /* QSVGA */
3888 hwscale = 1;
3889 vwscale = 1;
3890 } else { /* SVGA */
3891 hwscale = 2;
3892 vwscale = 2;
3893 }
3894 break;
3895 default: /* SEN_OV7xx0 */
3896 if (qvga) { /* QVGA */
3897 hwscale = 1;
3898 vwscale = 0;
3899 } else { /* VGA */
3900 hwscale = 2;
3901 vwscale = 1;
3902 }
3903 }
3904
3905 ret = mode_init_ov_sensor_regs(sd);
3906 if (ret < 0)
3907 return ret;
3908
3909 i2c_w(sd, 0x17, hwsbase);
3910 i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
3911 i2c_w(sd, 0x19, vwsbase);
3912 i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
3913
3914 return 0;
3915 }
3916
3917 /* -- start the camera -- */
3918 static int sd_start(struct gspca_dev *gspca_dev)
3919 {
3920 struct sd *sd = (struct sd *) gspca_dev;
3921 int ret = 0;
3922
3923 /* Default for most bridges, allow bridge_mode_init_regs to override */
3924 sd->sensor_width = sd->gspca_dev.width;
3925 sd->sensor_height = sd->gspca_dev.height;
3926
3927 switch (sd->bridge) {
3928 case BRIDGE_OV511:
3929 case BRIDGE_OV511PLUS:
3930 ret = ov511_mode_init_regs(sd);
3931 break;
3932 case BRIDGE_OV518:
3933 case BRIDGE_OV518PLUS:
3934 ret = ov518_mode_init_regs(sd);
3935 break;
3936 case BRIDGE_OV519:
3937 ret = ov519_mode_init_regs(sd);
3938 break;
3939 /* case BRIDGE_OVFX2: nothing to do */
3940 case BRIDGE_W9968CF:
3941 ret = w9968cf_mode_init_regs(sd);
3942 break;
3943 }
3944 if (ret < 0)
3945 goto out;
3946
3947 ret = set_ov_sensor_window(sd);
3948 if (ret < 0)
3949 goto out;
3950
3951 setcontrast(gspca_dev);
3952 setbrightness(gspca_dev);
3953 setcolors(gspca_dev);
3954 sethvflip(sd);
3955 setautobrightness(sd);
3956 setfreq(sd);
3957
3958 /* Force clear snapshot state in case the snapshot button was
3959 pressed while we weren't streaming */
3960 sd->snapshot_needs_reset = 1;
3961 sd_reset_snapshot(gspca_dev);
3962 sd->snapshot_pressed = 0;
3963
3964 ret = ov51x_restart(sd);
3965 if (ret < 0)
3966 goto out;
3967 ov51x_led_control(sd, 1);
3968 return 0;
3969 out:
3970 PDEBUG(D_ERR, "camera start error:%d", ret);
3971 return ret;
3972 }
3973
3974 static void sd_stopN(struct gspca_dev *gspca_dev)
3975 {
3976 struct sd *sd = (struct sd *) gspca_dev;
3977
3978 ov51x_stop(sd);
3979 ov51x_led_control(sd, 0);
3980 }
3981
3982 static void sd_stop0(struct gspca_dev *gspca_dev)
3983 {
3984 struct sd *sd = (struct sd *) gspca_dev;
3985
3986 if (sd->bridge == BRIDGE_W9968CF)
3987 w9968cf_stop0(sd);
3988 }
3989
3990 static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
3991 {
3992 struct sd *sd = (struct sd *) gspca_dev;
3993
3994 if (sd->snapshot_pressed != state) {
3995 #ifdef CONFIG_INPUT
3996 input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
3997 input_sync(gspca_dev->input_dev);
3998 #endif
3999 if (state)
4000 sd->snapshot_needs_reset = 1;
4001
4002 sd->snapshot_pressed = state;
4003 } else {
4004 /* On the ov511 / ov519 we need to reset the button state
4005 multiple times, as resetting does not work as long as the
4006 button stays pressed */
4007 switch (sd->bridge) {
4008 case BRIDGE_OV511:
4009 case BRIDGE_OV511PLUS:
4010 case BRIDGE_OV519:
4011 if (state)
4012 sd->snapshot_needs_reset = 1;
4013 break;
4014 }
4015 }
4016 }
4017
4018 static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
4019 u8 *in, /* isoc packet */
4020 int len) /* iso packet length */
4021 {
4022 struct sd *sd = (struct sd *) gspca_dev;
4023
4024 /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
4025 * byte non-zero. The EOF packet has image width/height in the
4026 * 10th and 11th bytes. The 9th byte is given as follows:
4027 *
4028 * bit 7: EOF
4029 * 6: compression enabled
4030 * 5: 422/420/400 modes
4031 * 4: 422/420/400 modes
4032 * 3: 1
4033 * 2: snapshot button on
4034 * 1: snapshot frame
4035 * 0: even/odd field
4036 */
4037 if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
4038 (in[8] & 0x08)) {
4039 ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
4040 if (in[8] & 0x80) {
4041 /* Frame end */
4042 if ((in[9] + 1) * 8 != gspca_dev->width ||
4043 (in[10] + 1) * 8 != gspca_dev->height) {
4044 PDEBUG(D_ERR, "Invalid frame size, got: %dx%d,"
4045 " requested: %dx%d\n",
4046 (in[9] + 1) * 8, (in[10] + 1) * 8,
4047 gspca_dev->width, gspca_dev->height);
4048 gspca_dev->last_packet_type = DISCARD_PACKET;
4049 return;
4050 }
4051 /* Add 11 byte footer to frame, might be usefull */
4052 gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
4053 return;
4054 } else {
4055 /* Frame start */
4056 gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
4057 sd->packet_nr = 0;
4058 }
4059 }
4060
4061 /* Ignore the packet number */
4062 len--;
4063
4064 /* intermediate packet */
4065 gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
4066 }
4067
4068 static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
4069 u8 *data, /* isoc packet */
4070 int len) /* iso packet length */
4071 {
4072 struct sd *sd = (struct sd *) gspca_dev;
4073
4074 /* A false positive here is likely, until OVT gives me
4075 * the definitive SOF/EOF format */
4076 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
4077 ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
4078 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4079 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4080 sd->packet_nr = 0;
4081 }
4082
4083 if (gspca_dev->last_packet_type == DISCARD_PACKET)
4084 return;
4085
4086 /* Does this device use packet numbers ? */
4087 if (len & 7) {
4088 len--;
4089 if (sd->packet_nr == data[len])
4090 sd->packet_nr++;
4091 /* The last few packets of the frame (which are all 0's
4092 except that they may contain part of the footer), are
4093 numbered 0 */
4094 else if (sd->packet_nr == 0 || data[len]) {
4095 PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
4096 (int)data[len], (int)sd->packet_nr);
4097 gspca_dev->last_packet_type = DISCARD_PACKET;
4098 return;
4099 }
4100 }
4101
4102 /* intermediate packet */
4103 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4104 }
4105
4106 static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4107 u8 *data, /* isoc packet */
4108 int len) /* iso packet length */
4109 {
4110 /* Header of ov519 is 16 bytes:
4111 * Byte Value Description
4112 * 0 0xff magic
4113 * 1 0xff magic
4114 * 2 0xff magic
4115 * 3 0xXX 0x50 = SOF, 0x51 = EOF
4116 * 9 0xXX 0x01 initial frame without data,
4117 * 0x00 standard frame with image
4118 * 14 Lo in EOF: length of image data / 8
4119 * 15 Hi
4120 */
4121
4122 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
4123 switch (data[3]) {
4124 case 0x50: /* start of frame */
4125 /* Don't check the button state here, as the state
4126 usually (always ?) changes at EOF and checking it
4127 here leads to unnecessary snapshot state resets. */
4128 #define HDRSZ 16
4129 data += HDRSZ;
4130 len -= HDRSZ;
4131 #undef HDRSZ
4132 if (data[0] == 0xff || data[1] == 0xd8)
4133 gspca_frame_add(gspca_dev, FIRST_PACKET,
4134 data, len);
4135 else
4136 gspca_dev->last_packet_type = DISCARD_PACKET;
4137 return;
4138 case 0x51: /* end of frame */
4139 ov51x_handle_button(gspca_dev, data[11] & 1);
4140 if (data[9] != 0)
4141 gspca_dev->last_packet_type = DISCARD_PACKET;
4142 gspca_frame_add(gspca_dev, LAST_PACKET,
4143 NULL, 0);
4144 return;
4145 }
4146 }
4147
4148 /* intermediate packet */
4149 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4150 }
4151
4152 static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4153 u8 *data, /* isoc packet */
4154 int len) /* iso packet length */
4155 {
4156 /* A short read signals EOF */
4157 if (len < OVFX2_BULK_SIZE) {
4158 gspca_frame_add(gspca_dev, LAST_PACKET, data, len);
4159 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4160 return;
4161 }
4162 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4163 }
4164
4165 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4166 u8 *data, /* isoc packet */
4167 int len) /* iso packet length */
4168 {
4169 struct sd *sd = (struct sd *) gspca_dev;
4170
4171 switch (sd->bridge) {
4172 case BRIDGE_OV511:
4173 case BRIDGE_OV511PLUS:
4174 ov511_pkt_scan(gspca_dev, data, len);
4175 break;
4176 case BRIDGE_OV518:
4177 case BRIDGE_OV518PLUS:
4178 ov518_pkt_scan(gspca_dev, data, len);
4179 break;
4180 case BRIDGE_OV519:
4181 ov519_pkt_scan(gspca_dev, data, len);
4182 break;
4183 case BRIDGE_OVFX2:
4184 ovfx2_pkt_scan(gspca_dev, data, len);
4185 break;
4186 case BRIDGE_W9968CF:
4187 w9968cf_pkt_scan(gspca_dev, data, len);
4188 break;
4189 }
4190 }
4191
4192 /* -- management routines -- */
4193
4194 static void setbrightness(struct gspca_dev *gspca_dev)
4195 {
4196 struct sd *sd = (struct sd *) gspca_dev;
4197 int val;
4198
4199 val = sd->brightness;
4200 switch (sd->sensor) {
4201 case SEN_OV8610:
4202 case SEN_OV7610:
4203 case SEN_OV76BE:
4204 case SEN_OV6620:
4205 case SEN_OV6630:
4206 case SEN_OV66308AF:
4207 case SEN_OV7640:
4208 case SEN_OV7648:
4209 i2c_w(sd, OV7610_REG_BRT, val);
4210 break;
4211 case SEN_OV7620:
4212 case SEN_OV7620AE:
4213 /* 7620 doesn't like manual changes when in auto mode */
4214 if (!sd->autobrightness)
4215 i2c_w(sd, OV7610_REG_BRT, val);
4216 break;
4217 case SEN_OV7670:
4218 /*win trace
4219 * i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_AEC); */
4220 i2c_w(sd, OV7670_REG_BRIGHT, ov7670_abs_to_sm(val));
4221 break;
4222 }
4223 }
4224
4225 static void setcontrast(struct gspca_dev *gspca_dev)
4226 {
4227 struct sd *sd = (struct sd *) gspca_dev;
4228 int val;
4229
4230 val = sd->contrast;
4231 switch (sd->sensor) {
4232 case SEN_OV7610:
4233 case SEN_OV6620:
4234 i2c_w(sd, OV7610_REG_CNT, val);
4235 break;
4236 case SEN_OV6630:
4237 case SEN_OV66308AF:
4238 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
4239 break;
4240 case SEN_OV8610: {
4241 static const __u8 ctab[] = {
4242 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
4243 };
4244
4245 /* Use Y gamma control instead. Bit 0 enables it. */
4246 i2c_w(sd, 0x64, ctab[val >> 5]);
4247 break;
4248 }
4249 case SEN_OV7620:
4250 case SEN_OV7620AE: {
4251 static const __u8 ctab[] = {
4252 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
4253 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
4254 };
4255
4256 /* Use Y gamma control instead. Bit 0 enables it. */
4257 i2c_w(sd, 0x64, ctab[val >> 4]);
4258 break;
4259 }
4260 case SEN_OV7670:
4261 /* check that this isn't just the same as ov7610 */
4262 i2c_w(sd, OV7670_REG_CONTRAS, val >> 1);
4263 break;
4264 }
4265 }
4266
4267 static void setcolors(struct gspca_dev *gspca_dev)
4268 {
4269 struct sd *sd = (struct sd *) gspca_dev;
4270 int val;
4271
4272 val = sd->colors;
4273 switch (sd->sensor) {
4274 case SEN_OV8610:
4275 case SEN_OV7610:
4276 case SEN_OV76BE:
4277 case SEN_OV6620:
4278 case SEN_OV6630:
4279 case SEN_OV66308AF:
4280 i2c_w(sd, OV7610_REG_SAT, val);
4281 break;
4282 case SEN_OV7620:
4283 case SEN_OV7620AE:
4284 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
4285 /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
4286 if (rc < 0)
4287 goto out; */
4288 i2c_w(sd, OV7610_REG_SAT, val);
4289 break;
4290 case SEN_OV7640:
4291 case SEN_OV7648:
4292 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
4293 break;
4294 case SEN_OV7670:
4295 /* supported later once I work out how to do it
4296 * transparently fail now! */
4297 /* set REG_COM13 values for UV sat auto mode */
4298 break;
4299 }
4300 }
4301
4302 static void setautobrightness(struct sd *sd)
4303 {
4304 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7648 ||
4305 sd->sensor == SEN_OV7670 ||
4306 sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
4307 return;
4308
4309 i2c_w_mask(sd, 0x2d, sd->autobrightness ? 0x10 : 0x00, 0x10);
4310 }
4311
4312 static void setfreq(struct sd *sd)
4313 {
4314 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
4315 return;
4316
4317 if (sd->sensor == SEN_OV7670) {
4318 switch (sd->freq) {
4319 case 0: /* Banding filter disabled */
4320 i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_BFILT);
4321 break;
4322 case 1: /* 50 hz */
4323 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4324 OV7670_COM8_BFILT);
4325 i2c_w_mask(sd, OV7670_REG_COM11, 0x08, 0x18);
4326 break;
4327 case 2: /* 60 hz */
4328 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4329 OV7670_COM8_BFILT);
4330 i2c_w_mask(sd, OV7670_REG_COM11, 0x00, 0x18);
4331 break;
4332 case 3: /* Auto hz */
4333 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4334 OV7670_COM8_BFILT);
4335 i2c_w_mask(sd, OV7670_REG_COM11, OV7670_COM11_HZAUTO,
4336 0x18);
4337 break;
4338 }
4339 } else {
4340 switch (sd->freq) {
4341 case 0: /* Banding filter disabled */
4342 i2c_w_mask(sd, 0x2d, 0x00, 0x04);
4343 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4344 break;
4345 case 1: /* 50 hz (filter on and framerate adj) */
4346 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4347 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4348 /* 20 fps -> 16.667 fps */
4349 if (sd->sensor == SEN_OV6620 ||
4350 sd->sensor == SEN_OV6630 ||
4351 sd->sensor == SEN_OV66308AF)
4352 i2c_w(sd, 0x2b, 0x5e);
4353 else
4354 i2c_w(sd, 0x2b, 0xac);
4355 break;
4356 case 2: /* 60 hz (filter on, ...) */
4357 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4358 if (sd->sensor == SEN_OV6620 ||
4359 sd->sensor == SEN_OV6630 ||
4360 sd->sensor == SEN_OV66308AF) {
4361 /* 20 fps -> 15 fps */
4362 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4363 i2c_w(sd, 0x2b, 0xa8);
4364 } else {
4365 /* no framerate adj. */
4366 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4367 }
4368 break;
4369 }
4370 }
4371 }
4372
4373 static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
4374 {
4375 struct sd *sd = (struct sd *) gspca_dev;
4376
4377 sd->brightness = val;
4378 if (gspca_dev->streaming)
4379 setbrightness(gspca_dev);
4380 return 0;
4381 }
4382
4383 static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
4384 {
4385 struct sd *sd = (struct sd *) gspca_dev;
4386
4387 *val = sd->brightness;
4388 return 0;
4389 }
4390
4391 static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
4392 {
4393 struct sd *sd = (struct sd *) gspca_dev;
4394
4395 sd->contrast = val;
4396 if (gspca_dev->streaming)
4397 setcontrast(gspca_dev);
4398 return 0;
4399 }
4400
4401 static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
4402 {
4403 struct sd *sd = (struct sd *) gspca_dev;
4404
4405 *val = sd->contrast;
4406 return 0;
4407 }
4408
4409 static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val)
4410 {
4411 struct sd *sd = (struct sd *) gspca_dev;
4412
4413 sd->colors = val;
4414 if (gspca_dev->streaming)
4415 setcolors(gspca_dev);
4416 return 0;
4417 }
4418
4419 static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val)
4420 {
4421 struct sd *sd = (struct sd *) gspca_dev;
4422
4423 *val = sd->colors;
4424 return 0;
4425 }
4426
4427 static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val)
4428 {
4429 struct sd *sd = (struct sd *) gspca_dev;
4430
4431 sd->hflip = val;
4432 if (gspca_dev->streaming)
4433 sethvflip(sd);
4434 return 0;
4435 }
4436
4437 static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val)
4438 {
4439 struct sd *sd = (struct sd *) gspca_dev;
4440
4441 *val = sd->hflip;
4442 return 0;
4443 }
4444
4445 static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val)
4446 {
4447 struct sd *sd = (struct sd *) gspca_dev;
4448
4449 sd->vflip = val;
4450 if (gspca_dev->streaming)
4451 sethvflip(sd);
4452 return 0;
4453 }
4454
4455 static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)
4456 {
4457 struct sd *sd = (struct sd *) gspca_dev;
4458
4459 *val = sd->vflip;
4460 return 0;
4461 }
4462
4463 static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val)
4464 {
4465 struct sd *sd = (struct sd *) gspca_dev;
4466
4467 sd->autobrightness = val;
4468 if (gspca_dev->streaming)
4469 setautobrightness(sd);
4470 return 0;
4471 }
4472
4473 static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val)
4474 {
4475 struct sd *sd = (struct sd *) gspca_dev;
4476
4477 *val = sd->autobrightness;
4478 return 0;
4479 }
4480
4481 static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val)
4482 {
4483 struct sd *sd = (struct sd *) gspca_dev;
4484
4485 sd->freq = val;
4486 if (gspca_dev->streaming) {
4487 setfreq(sd);
4488 /* Ugly but necessary */
4489 if (sd->bridge == BRIDGE_W9968CF)
4490 w9968cf_set_crop_window(sd);
4491 }
4492 return 0;
4493 }
4494
4495 static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val)
4496 {
4497 struct sd *sd = (struct sd *) gspca_dev;
4498
4499 *val = sd->freq;
4500 return 0;
4501 }
4502
4503 static int sd_querymenu(struct gspca_dev *gspca_dev,
4504 struct v4l2_querymenu *menu)
4505 {
4506 struct sd *sd = (struct sd *) gspca_dev;
4507
4508 switch (menu->id) {
4509 case V4L2_CID_POWER_LINE_FREQUENCY:
4510 switch (menu->index) {
4511 case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
4512 strcpy((char *) menu->name, "NoFliker");
4513 return 0;
4514 case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
4515 strcpy((char *) menu->name, "50 Hz");
4516 return 0;
4517 case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
4518 strcpy((char *) menu->name, "60 Hz");
4519 return 0;
4520 case 3:
4521 if (sd->sensor != SEN_OV7670)
4522 return -EINVAL;
4523
4524 strcpy((char *) menu->name, "Automatic");
4525 return 0;
4526 }
4527 break;
4528 }
4529 return -EINVAL;
4530 }
4531
4532 static int sd_get_jcomp(struct gspca_dev *gspca_dev,
4533 struct v4l2_jpegcompression *jcomp)
4534 {
4535 struct sd *sd = (struct sd *) gspca_dev;
4536
4537 if (sd->bridge != BRIDGE_W9968CF)
4538 return -EINVAL;
4539
4540 memset(jcomp, 0, sizeof *jcomp);
4541 jcomp->quality = sd->quality;
4542 jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
4543 V4L2_JPEG_MARKER_DRI;
4544 return 0;
4545 }
4546
4547 static int sd_set_jcomp(struct gspca_dev *gspca_dev,
4548 struct v4l2_jpegcompression *jcomp)
4549 {
4550 struct sd *sd = (struct sd *) gspca_dev;
4551
4552 if (sd->bridge != BRIDGE_W9968CF)
4553 return -EINVAL;
4554
4555 if (gspca_dev->streaming)
4556 return -EBUSY;
4557
4558 if (jcomp->quality < QUALITY_MIN)
4559 sd->quality = QUALITY_MIN;
4560 else if (jcomp->quality > QUALITY_MAX)
4561 sd->quality = QUALITY_MAX;
4562 else
4563 sd->quality = jcomp->quality;
4564
4565 /* Return resulting jcomp params to app */
4566 sd_get_jcomp(gspca_dev, jcomp);
4567
4568 return 0;
4569 }
4570
4571 /* sub-driver description */
4572 static const struct sd_desc sd_desc = {
4573 .name = MODULE_NAME,
4574 .ctrls = sd_ctrls,
4575 .nctrls = ARRAY_SIZE(sd_ctrls),
4576 .config = sd_config,
4577 .init = sd_init,
4578 .start = sd_start,
4579 .stopN = sd_stopN,
4580 .stop0 = sd_stop0,
4581 .pkt_scan = sd_pkt_scan,
4582 .dq_callback = sd_reset_snapshot,
4583 .querymenu = sd_querymenu,
4584 .get_jcomp = sd_get_jcomp,
4585 .set_jcomp = sd_set_jcomp,
4586 #ifdef CONFIG_INPUT
4587 .other_input = 1,
4588 #endif
4589 };
4590
4591 /* -- module initialisation -- */
4592 static const __devinitdata struct usb_device_id device_table[] = {
4593 {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
4594 {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
4595 {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
4596 {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
4597 {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
4598 {USB_DEVICE(0x041e, 0x4064),
4599 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4600 {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
4601 {USB_DEVICE(0x041e, 0x4068),
4602 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4603 {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
4604 {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
4605 {USB_DEVICE(0x054c, 0x0155),
4606 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4607 {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
4608 {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
4609 {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
4610 {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 },
4611 {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
4612 {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
4613 {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
4614 {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
4615 {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
4616 {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
4617 {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
4618 {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
4619 {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
4620 {USB_DEVICE(0x8020, 0xEF04), .driver_info = BRIDGE_OVFX2 },
4621 {}
4622 };
4623
4624 MODULE_DEVICE_TABLE(usb, device_table);
4625
4626 /* -- device connect -- */
4627 static int sd_probe(struct usb_interface *intf,
4628 const struct usb_device_id *id)
4629 {
4630 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
4631 THIS_MODULE);
4632 }
4633
4634 static struct usb_driver sd_driver = {
4635 .name = MODULE_NAME,
4636 .id_table = device_table,
4637 .probe = sd_probe,
4638 .disconnect = gspca_disconnect,
4639 #ifdef CONFIG_PM
4640 .suspend = gspca_suspend,
4641 .resume = gspca_resume,
4642 #endif
4643 };
4644
4645 /* -- module insert / remove -- */
4646 static int __init sd_mod_init(void)
4647 {
4648 int ret;
4649 ret = usb_register(&sd_driver);
4650 if (ret < 0)
4651 return ret;
4652 PDEBUG(D_PROBE, "registered");
4653 return 0;
4654 }
4655 static void __exit sd_mod_exit(void)
4656 {
4657 usb_deregister(&sd_driver);
4658 PDEBUG(D_PROBE, "deregistered");
4659 }
4660
4661 module_init(sd_mod_init);
4662 module_exit(sd_mod_exit);
4663
4664 module_param(frame_rate, int, 0644);
4665 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");