drivers/net/wireless/iwlwifi/iwl-3945.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/version.h>
  30 #include <linux/init.h>
  31 #include <linux/pci.h>
  32 #include <linux/dma-mapping.h>
  33 #include <linux/delay.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/wireless.h>
  37 #include <linux/firmware.h>
  38 #include <net/mac80211.h>
  39
  40 #include <linux/etherdevice.h>
  41 #include <linux/delay.h>
  42
  43 #define IWL 3945
  44
  45 #include "iwlwifi.h"
  46 #include "iwl-helpers.h"
  47 #include "iwl-3945.h"
  48 #include "iwl-3945-rs.h"
  49
  50 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
  51         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,   \
  52                                     IWL_RATE_##r##M_IEEE,   \
  53                                     IWL_RATE_##ip##M_INDEX, \
  54                                     IWL_RATE_##in##M_INDEX, \
  55                                     IWL_RATE_##rp##M_INDEX, \
  56                                     IWL_RATE_##rn##M_INDEX, \
  57                                     IWL_RATE_##pp##M_INDEX, \
  58                                     IWL_RATE_##np##M_INDEX }
  59
  60 /*
  61  * Parameter order:
  62  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
  63  *
  64  * If there isn't a valid next or previous rate then INV is used which
  65  * maps to IWL_RATE_INVALID
  66  *
  67  */
  68 const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
  69         IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
  70         IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),       /*  9mbps */
  71         IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
  72         IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
  73         IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
  74         IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
  75         IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
  76         IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  77         IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),    /*  1mbps */
  78         IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),          /*  2mbps */
  79         IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
  80         IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),      /* 11mbps */
  81 };
  82
  83 /* 1 = enable the iwl_disable_events() function */
  84 #define IWL_EVT_DISABLE (0)
  85 #define IWL_EVT_DISABLE_SIZE (1532/32)
  86
  87 /**
  88  * iwl_disable_events - Disable selected events in uCode event log
  89  *
  90  * Disable an event by writing "1"s into "disable"
  91  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
  92  *   Default values of 0 enable uCode events to be logged.
  93  * Use for only special debugging.  This function is just a placeholder as-is,
  94  *   you'll need to provide the special bits! ...
  95  *   ... and set IWL_EVT_DISABLE to 1. */
  96 void iwl_disable_events(struct iwl_priv *priv)
  97 {
  98         int rc;
  99         int i;
 100         u32 base;               /* SRAM address of event log header */
 101         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
 102         u32 array_size;         /* # of u32 entries in array */
 103         u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
 104                 0x00000000,     /*   31 -    0  Event id numbers */
 105                 0x00000000,     /*   63 -   32 */
 106                 0x00000000,     /*   95 -   64 */
 107                 0x00000000,     /*  127 -   96 */
 108                 0x00000000,     /*  159 -  128 */
 109                 0x00000000,     /*  191 -  160 */
 110                 0x00000000,     /*  223 -  192 */
 111                 0x00000000,     /*  255 -  224 */
 112                 0x00000000,     /*  287 -  256 */
 113                 0x00000000,     /*  319 -  288 */
 114                 0x00000000,     /*  351 -  320 */
 115                 0x00000000,     /*  383 -  352 */
 116                 0x00000000,     /*  415 -  384 */
 117                 0x00000000,     /*  447 -  416 */
 118                 0x00000000,     /*  479 -  448 */
 119                 0x00000000,     /*  511 -  480 */
 120                 0x00000000,     /*  543 -  512 */
 121                 0x00000000,     /*  575 -  544 */
 122                 0x00000000,     /*  607 -  576 */
 123                 0x00000000,     /*  639 -  608 */
 124                 0x00000000,     /*  671 -  640 */
 125                 0x00000000,     /*  703 -  672 */
 126                 0x00000000,     /*  735 -  704 */
 127                 0x00000000,     /*  767 -  736 */
 128                 0x00000000,     /*  799 -  768 */
 129                 0x00000000,     /*  831 -  800 */
 130                 0x00000000,     /*  863 -  832 */
 131                 0x00000000,     /*  895 -  864 */
 132                 0x00000000,     /*  927 -  896 */
 133                 0x00000000,     /*  959 -  928 */
 134                 0x00000000,     /*  991 -  960 */
 135                 0x00000000,     /* 1023 -  992 */
 136                 0x00000000,     /* 1055 - 1024 */
 137                 0x00000000,     /* 1087 - 1056 */
 138                 0x00000000,     /* 1119 - 1088 */
 139                 0x00000000,     /* 1151 - 1120 */
 140                 0x00000000,     /* 1183 - 1152 */
 141                 0x00000000,     /* 1215 - 1184 */
 142                 0x00000000,     /* 1247 - 1216 */
 143                 0x00000000,     /* 1279 - 1248 */
 144                 0x00000000,     /* 1311 - 1280 */
 145                 0x00000000,     /* 1343 - 1312 */
 146                 0x00000000,     /* 1375 - 1344 */
 147                 0x00000000,     /* 1407 - 1376 */
 148                 0x00000000,     /* 1439 - 1408 */
 149                 0x00000000,     /* 1471 - 1440 */
 150                 0x00000000,     /* 1503 - 1472 */
 151         };
 152
 153         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 154         if (!iwl_hw_valid_rtc_data_addr(base)) {
 155                 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
 156                 return;
 157         }
 158
 159         rc = iwl_grab_restricted_access(priv);
 160         if (rc) {
 161                 IWL_WARNING("Can not read from adapter at this time.\n");
 162                 return;
 163         }
 164
 165         disable_ptr = iwl_read_restricted_mem(priv, base + (4 * sizeof(u32)));
 166         array_size = iwl_read_restricted_mem(priv, base + (5 * sizeof(u32)));
 167         iwl_release_restricted_access(priv);
 168
 169         if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
 170                 IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
 171                                disable_ptr);
 172                 rc = iwl_grab_restricted_access(priv);
 173                 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
 174                         iwl_write_restricted_mem(priv,
 175                                                  disable_ptr +
 176                                                  (i * sizeof(u32)),
 177                                                  evt_disable[i]);
 178
 179                 iwl_release_restricted_access(priv);
 180         } else {
 181                 IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
 182                 IWL_DEBUG_INFO("  by writing \"1\"s into disable bitmap\n");
 183                 IWL_DEBUG_INFO("  in SRAM at 0x%x, size %d u32s\n",
 184                                disable_ptr, array_size);
 185         }
 186
 187 }
 188
 189 /**
 190  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
 191  * @priv: eeprom and antenna fields are used to determine antenna flags
 192  *
 193  * priv->eeprom  is used to determine if antenna AUX/MAIN are reversed
 194  * priv->antenna specifies the antenna diversity mode:
 195  *
 196  * IWL_ANTENNA_DIVERISTY - NIC selects best antenna by itself
 197  * IWL_ANTENNA_MAIN      - Force MAIN antenna
 198  * IWL_ANTENNA_AUX       - Force AUX antenna
 199  */
 200 __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
 201 {
 202         switch (priv->antenna) {
 203         case IWL_ANTENNA_DIVERSITY:
 204                 return 0;
 205
 206         case IWL_ANTENNA_MAIN:
 207                 if (priv->eeprom.antenna_switch_type)
 208                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 209                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 210
 211         case IWL_ANTENNA_AUX:
 212                 if (priv->eeprom.antenna_switch_type)
 213                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 214                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 215         }
 216
 217         /* bad antenna selector value */
 218         IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
 219         return 0;               /* "diversity" is default if error */
 220 }
 221
 222 /*****************************************************************************
 223  *
 224  * Intel PRO/Wireless 3945ABG/BG Network Connection
 225  *
 226  *  RX handler implementations
 227  *
 228  *  Used by iwl-base.c
 229  *
 230  *****************************************************************************/
 231
 232 void iwl_hw_rx_statistics(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
 233 {
 234         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
 235         IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
 236                      (int)sizeof(struct iwl_notif_statistics),
 237                      le32_to_cpu(pkt->len));
 238
 239         memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
 240
 241         priv->last_statistics_time = jiffies;
 242 }
 243
 244 static void iwl3945_handle_data_packet(struct iwl_priv *priv, int is_data,
 245                                    struct iwl_rx_mem_buffer *rxb,
 246                                    struct ieee80211_rx_status *stats,
 247                                    u16 phy_flags)
 248 {
 249         struct ieee80211_hdr *hdr;
 250         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
 251         struct iwl_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 252         struct iwl_rx_frame_end *rx_end = IWL_RX_END(pkt);
 253         short len = le16_to_cpu(rx_hdr->len);
 254
 255         /* We received data from the HW, so stop the watchdog */
 256         if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
 257                 IWL_DEBUG_DROP("Corruption detected!\n");
 258                 return;
 259         }
 260
 261         /* We only process data packets if the interface is open */
 262         if (unlikely(!priv->is_open)) {
 263                 IWL_DEBUG_DROP_LIMIT
 264                     ("Dropping packet while interface is not open.\n");
 265                 return;
 266         }
 267         if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
 268                 if (iwl_param_hwcrypto)
 269                         iwl_set_decrypted_flag(priv, rxb->skb,
 270                                                le32_to_cpu(rx_end->status),
 271                                                stats);
 272                 iwl_handle_data_packet_monitor(priv, rxb, IWL_RX_DATA(pkt),
 273                                                len, stats, phy_flags);
 274                 return;
 275         }
 276
 277         skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
 278         /* Set the size of the skb to the size of the frame */
 279         skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
 280
 281         hdr = (void *)rxb->skb->data;
 282
 283         if (iwl_param_hwcrypto)
 284                 iwl_set_decrypted_flag(priv, rxb->skb,
 285                                        le32_to_cpu(rx_end->status), stats);
 286
 287         ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
 288         rxb->skb = NULL;
 289 }
 290
 291 static void iwl3945_rx_reply_rx(struct iwl_priv *priv,
 292                                 struct iwl_rx_mem_buffer *rxb)
 293 {
 294         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
 295         struct iwl_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 296         struct iwl_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 297         struct iwl_rx_frame_end *rx_end = IWL_RX_END(pkt);
 298         struct ieee80211_hdr *header;
 299         u16 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
 300         u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
 301         u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
 302         struct ieee80211_rx_status stats = {
 303                 .mactime = le64_to_cpu(rx_end->timestamp),
 304                 .freq = ieee80211chan2mhz(le16_to_cpu(rx_hdr->channel)),
 305                 .channel = le16_to_cpu(rx_hdr->channel),
 306                 .phymode = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
 307                 MODE_IEEE80211G : MODE_IEEE80211A,
 308                 .antenna = 0,
 309                 .rate = rx_hdr->rate,
 310                 .flag = 0,
 311         };
 312         u8 network_packet;
 313         int snr;
 314
 315         if ((unlikely(rx_stats->phy_count > 20))) {
 316                 IWL_DEBUG_DROP
 317                     ("dsp size out of range [0,20]: "
 318                      "%d/n", rx_stats->phy_count);
 319                 return;
 320         }
 321
 322         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
 323             || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 324                 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
 325                 return;
 326         }
 327
 328         if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
 329                 iwl3945_handle_data_packet(priv, 1, rxb, &stats, phy_flags);
 330                 return;
 331         }
 332
 333         /* Convert 3945's rssi indicator to dBm */
 334         stats.ssi = rx_stats->rssi - IWL_RSSI_OFFSET;
 335
 336         /* Set default noise value to -127 */
 337         if (priv->last_rx_noise == 0)
 338                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
 339
 340         /* 3945 provides noise info for OFDM frames only.
 341          * sig_avg and noise_diff are measured by the 3945's digital signal
 342          *   processor (DSP), and indicate linear levels of signal level and
 343          *   distortion/noise within the packet preamble after
 344          *   automatic gain control (AGC).  sig_avg should stay fairly
 345          *   constant if the radio's AGC is working well.
 346          * Since these values are linear (not dB or dBm), linear
 347          *   signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
 348          * Convert linear SNR to dB SNR, then subtract that from rssi dBm
 349          *   to obtain noise level in dBm.
 350          * Calculate stats.signal (quality indicator in %) based on SNR. */
 351         if (rx_stats_noise_diff) {
 352                 snr = rx_stats_sig_avg / rx_stats_noise_diff;
 353                 stats.noise = stats.ssi - iwl_calc_db_from_ratio(snr);
 354                 stats.signal = iwl_calc_sig_qual(stats.ssi, stats.noise);
 355
 356         /* If noise info not available, calculate signal quality indicator (%)
 357          *   using just the dBm signal level. */
 358         } else {
 359                 stats.noise = priv->last_rx_noise;
 360                 stats.signal = iwl_calc_sig_qual(stats.ssi, 0);
 361         }
 362
 363
 364         IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
 365                         stats.ssi, stats.noise, stats.signal,
 366                         rx_stats_sig_avg, rx_stats_noise_diff);
 367
 368         stats.freq = ieee80211chan2mhz(stats.channel);
 369
 370         /* can be covered by iwl_report_frame() in most cases */
 371 /*      IWL_DEBUG_RX("RX status: 0x%08X\n", rx_end->status); */
 372
 373         header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 374
 375         network_packet = iwl_is_network_packet(priv, header);
 376
 377 #ifdef CONFIG_IWLWIFI_DEBUG
 378         if (iwl_debug_level & IWL_DL_STATS && net_ratelimit())
 379                 IWL_DEBUG_STATS
 380                     ("[%c] %d RSSI: %d Signal: %u, Noise: %u, Rate: %u\n",
 381                      network_packet ? '*' : ' ',
 382                      stats.channel, stats.ssi, stats.ssi,
 383                      stats.ssi, stats.rate);
 384
 385         if (iwl_debug_level & (IWL_DL_RX))
 386                 /* Set "1" to report good data frames in groups of 100 */
 387                 iwl_report_frame(priv, pkt, header, 1);
 388 #endif
 389
 390         if (network_packet) {
 391                 priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
 392                 priv->last_tsf = le64_to_cpu(rx_end->timestamp);
 393                 priv->last_rx_rssi = stats.ssi;
 394                 priv->last_rx_noise = stats.noise;
 395         }
 396
 397         switch (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FTYPE) {
 398         case IEEE80211_FTYPE_MGMT:
 399                 switch (le16_to_cpu(header->frame_control) &
 400                         IEEE80211_FCTL_STYPE) {
 401                 case IEEE80211_STYPE_PROBE_RESP:
 402                 case IEEE80211_STYPE_BEACON:{
 403                                 /* If this is a beacon or probe response for
 404                                  * our network then cache the beacon
 405                                  * timestamp */
 406                                 if ((((priv->iw_mode == IEEE80211_IF_TYPE_STA)
 407                                       && !compare_ether_addr(header->addr2,
 408                                                              priv->bssid)) ||
 409                                      ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
 410                                       && !compare_ether_addr(header->addr3,
 411                                                              priv->bssid)))) {
 412                                         struct ieee80211_mgmt *mgmt =
 413                                             (struct ieee80211_mgmt *)header;
 414                                         __le32 *pos;
 415                                         pos =
 416                                             (__le32 *) & mgmt->u.beacon.
 417                                             timestamp;
 418                                         priv->timestamp0 = le32_to_cpu(pos[0]);
 419                                         priv->timestamp1 = le32_to_cpu(pos[1]);
 420                                         priv->beacon_int = le16_to_cpu(
 421                                             mgmt->u.beacon.beacon_int);
 422                                         if (priv->call_post_assoc_from_beacon &&
 423                                             (priv->iw_mode ==
 424                                                 IEEE80211_IF_TYPE_STA))
 425                                                 queue_work(priv->workqueue,
 426                                                     &priv->post_associate.work);
 427
 428                                         priv->call_post_assoc_from_beacon = 0;
 429                                 }
 430
 431                                 break;
 432                         }
 433
 434                 case IEEE80211_STYPE_ACTION:
 435                         /* TODO: Parse 802.11h frames for CSA... */
 436                         break;
 437
 438                         /*
 439                          * TODO: There is no callback function from upper
 440                          * stack to inform us when associated status. this
 441                          * work around to sniff assoc_resp management frame
 442                          * and finish the association process.
 443                          */
 444                 case IEEE80211_STYPE_ASSOC_RESP:
 445                 case IEEE80211_STYPE_REASSOC_RESP:{
 446                                 struct ieee80211_mgmt *mgnt =
 447                                     (struct ieee80211_mgmt *)header;
 448                                 priv->assoc_id = (~((1 << 15) | (1 << 14)) &
 449                                                   le16_to_cpu(mgnt->u.
 450                                                               assoc_resp.aid));
 451                                 priv->assoc_capability =
 452                                     le16_to_cpu(mgnt->u.assoc_resp.capab_info);
 453                                 if (priv->beacon_int)
 454                                         queue_work(priv->workqueue,
 455                                             &priv->post_associate.work);
 456                                 else
 457                                         priv->call_post_assoc_from_beacon = 1;
 458                                 break;
 459                         }
 460
 461                 case IEEE80211_STYPE_PROBE_REQ:{
 462                                 DECLARE_MAC_BUF(mac1);
 463                                 DECLARE_MAC_BUF(mac2);
 464                                 DECLARE_MAC_BUF(mac3);
 465                                 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
 466                                         IWL_DEBUG_DROP
 467                                             ("Dropping (non network): %s"
 468                                              ", %s, %s\n",
 469                                              print_mac(mac1, header->addr1),
 470                                              print_mac(mac2, header->addr2),
 471                                              print_mac(mac3, header->addr3));
 472                                 return;
 473                         }
 474                 }
 475
 476                 iwl3945_handle_data_packet(priv, 0, rxb, &stats, phy_flags);
 477                 break;
 478
 479         case IEEE80211_FTYPE_CTL:
 480                 break;
 481
 482         case IEEE80211_FTYPE_DATA: {
 483                 DECLARE_MAC_BUF(mac1);
 484                 DECLARE_MAC_BUF(mac2);
 485                 DECLARE_MAC_BUF(mac3);
 486
 487                 if (unlikely(is_duplicate_packet(priv, header)))
 488                         IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
 489                                        print_mac(mac1, header->addr1),
 490                                        print_mac(mac2, header->addr2),
 491                                        print_mac(mac3, header->addr3));
 492                 else
 493                         iwl3945_handle_data_packet(priv, 1, rxb, &stats,
 494                                                    phy_flags);
 495                 break;
 496         }
 497         }
 498 }
 499
 500 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, void *ptr,
 501                                  dma_addr_t addr, u16 len)
 502 {
 503         int count;
 504         u32 pad;
 505         struct iwl_tfd_frame *tfd = (struct iwl_tfd_frame *)ptr;
 506
 507         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 508         pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
 509
 510         if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
 511                 IWL_ERROR("Error can not send more than %d chunks\n",
 512                           NUM_TFD_CHUNKS);
 513                 return -EINVAL;
 514         }
 515
 516         tfd->pa[count].addr = cpu_to_le32(addr);
 517         tfd->pa[count].len = cpu_to_le32(len);
 518
 519         count++;
 520
 521         tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
 522                                          TFD_CTL_PAD_SET(pad));
 523
 524         return 0;
 525 }
 526
 527 /**
 528  * iwl_hw_txq_free_tfd - Free one TFD, those at index [txq->q.last_used]
 529  *
 530  * Does NOT advance any indexes
 531  */
 532 int iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 533 {
 534         struct iwl_tfd_frame *bd_tmp = (struct iwl_tfd_frame *)&txq->bd[0];
 535         struct iwl_tfd_frame *bd = &bd_tmp[txq->q.last_used];
 536         struct pci_dev *dev = priv->pci_dev;
 537         int i;
 538         int counter;
 539
 540         /* classify bd */
 541         if (txq->q.id == IWL_CMD_QUEUE_NUM)
 542                 /* nothing to cleanup after for host commands */
 543                 return 0;
 544
 545         /* sanity check */
 546         counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
 547         if (counter > NUM_TFD_CHUNKS) {
 548                 IWL_ERROR("Too many chunks: %i\n", counter);
 549                 /* @todo issue fatal error, it is quite serious situation */
 550                 return 0;
 551         }
 552
 553         /* unmap chunks if any */
 554
 555         for (i = 1; i < counter; i++) {
 556                 pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
 557                                  le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
 558                 if (txq->txb[txq->q.last_used].skb[0]) {
 559                         struct sk_buff *skb = txq->txb[txq->q.last_used].skb[0];
 560                         if (txq->txb[txq->q.last_used].skb[0]) {
 561                                 /* Can be called from interrupt context */
 562                                 dev_kfree_skb_any(skb);
 563                                 txq->txb[txq->q.last_used].skb[0] = NULL;
 564                         }
 565                 }
 566         }
 567         return 0;
 568 }
 569
 570 u8 iwl_hw_find_station(struct iwl_priv *priv, const u8 *addr)
 571 {
 572         int i;
 573         int ret = IWL_INVALID_STATION;
 574         unsigned long flags;
 575         DECLARE_MAC_BUF(mac);
 576
 577         spin_lock_irqsave(&priv->sta_lock, flags);
 578         for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
 579                 if ((priv->stations[i].used) &&
 580                     (!compare_ether_addr
 581                      (priv->stations[i].sta.sta.addr, addr))) {
 582                         ret = i;
 583                         goto out;
 584                 }
 585
 586         IWL_DEBUG_INFO("can not find STA %s (total %d)\n",
 587                        print_mac(mac, addr), priv->num_stations);
 588  out:
 589         spin_unlock_irqrestore(&priv->sta_lock, flags);
 590         return ret;
 591 }
 592
 593 /**
 594  * iwl_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
 595  *
 596 */
 597 void iwl_hw_build_tx_cmd_rate(struct iwl_priv *priv,
 598                               struct iwl_cmd *cmd,
 599                               struct ieee80211_tx_control *ctrl,
 600                               struct ieee80211_hdr *hdr, int sta_id, int tx_id)
 601 {
 602         unsigned long flags;
 603         u16 rate_index = min(ctrl->tx_rate & 0xffff, IWL_RATE_COUNT - 1);
 604         u16 rate_mask;
 605         int rate;
 606         u8 rts_retry_limit;
 607         u8 data_retry_limit;
 608         __le32 tx_flags;
 609         u16 fc = le16_to_cpu(hdr->frame_control);
 610
 611         rate = iwl_rates[rate_index].plcp;
 612         tx_flags = cmd->cmd.tx.tx_flags;
 613
 614         /* We need to figure out how to get the sta->supp_rates while
 615          * in this running context; perhaps encoding into ctrl->tx_rate? */
 616         rate_mask = IWL_RATES_MASK;
 617
 618         spin_lock_irqsave(&priv->sta_lock, flags);
 619
 620         priv->stations[sta_id].current_rate.rate_n_flags = rate;
 621
 622         if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
 623             (sta_id != IWL3945_BROADCAST_ID) &&
 624                 (sta_id != IWL_MULTICAST_ID))
 625                 priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate;
 626
 627         spin_unlock_irqrestore(&priv->sta_lock, flags);
 628
 629         if (tx_id >= IWL_CMD_QUEUE_NUM)
 630                 rts_retry_limit = 3;
 631         else
 632                 rts_retry_limit = 7;
 633
 634         if (ieee80211_is_probe_response(fc)) {
 635                 data_retry_limit = 3;
 636                 if (data_retry_limit < rts_retry_limit)
 637                         rts_retry_limit = data_retry_limit;
 638         } else
 639                 data_retry_limit = IWL_DEFAULT_TX_RETRY;
 640
 641         if (priv->data_retry_limit != -1)
 642                 data_retry_limit = priv->data_retry_limit;
 643
 644         if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
 645                 switch (fc & IEEE80211_FCTL_STYPE) {
 646                 case IEEE80211_STYPE_AUTH:
 647                 case IEEE80211_STYPE_DEAUTH:
 648                 case IEEE80211_STYPE_ASSOC_REQ:
 649                 case IEEE80211_STYPE_REASSOC_REQ:
 650                         if (tx_flags & TX_CMD_FLG_RTS_MSK) {
 651                                 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
 652                                 tx_flags |= TX_CMD_FLG_CTS_MSK;
 653                         }
 654                         break;
 655                 default:
 656                         break;
 657                 }
 658         }
 659
 660         cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
 661         cmd->cmd.tx.data_retry_limit = data_retry_limit;
 662         cmd->cmd.tx.rate = rate;
 663         cmd->cmd.tx.tx_flags = tx_flags;
 664
 665         /* OFDM */
 666         cmd->cmd.tx.supp_rates[0] = rate_mask & IWL_OFDM_RATES_MASK;
 667
 668         /* CCK */
 669         cmd->cmd.tx.supp_rates[1] = (rate_mask >> 8) & 0xF;
 670
 671         IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
 672                        "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
 673                        cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
 674                        cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
 675 }
 676
 677 u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id, u16 tx_rate, u8 flags)
 678 {
 679         unsigned long flags_spin;
 680         struct iwl_station_entry *station;
 681
 682         if (sta_id == IWL_INVALID_STATION)
 683                 return IWL_INVALID_STATION;
 684
 685         spin_lock_irqsave(&priv->sta_lock, flags_spin);
 686         station = &priv->stations[sta_id];
 687
 688         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
 689         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
 690         station->current_rate.rate_n_flags = tx_rate;
 691         station->sta.mode = STA_CONTROL_MODIFY_MSK;
 692
 693         spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
 694
 695         iwl_send_add_station(priv, &station->sta, flags);
 696         IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
 697                         sta_id, tx_rate);
 698         return sta_id;
 699 }
 700
 701 void iwl_hw_card_show_info(struct iwl_priv *priv)
 702 {
 703         IWL_DEBUG_INFO("3945ABG HW Version %u.%u.%u\n",
 704                        ((priv->eeprom.board_revision >> 8) & 0x0F),
 705                        ((priv->eeprom.board_revision >> 8) >> 4),
 706                        (priv->eeprom.board_revision & 0x00FF));
 707
 708         IWL_DEBUG_INFO("3945ABG PBA Number %.*s\n",
 709                        (int)sizeof(priv->eeprom.board_pba_number),
 710                        priv->eeprom.board_pba_number);
 711
 712         IWL_DEBUG_INFO("EEPROM_ANTENNA_SWITCH_TYPE is 0x%02X\n",
 713                        priv->eeprom.antenna_switch_type);
 714 }
 715
 716 static int iwl3945_nic_set_pwr_src(struct iwl_priv *priv, int pwr_max)
 717 {
 718         int rc;
 719         unsigned long flags;
 720
 721         spin_lock_irqsave(&priv->lock, flags);
 722         rc = iwl_grab_restricted_access(priv);
 723         if (rc) {
 724                 spin_unlock_irqrestore(&priv->lock, flags);
 725                 return rc;
 726         }
 727
 728         if (!pwr_max) {
 729                 u32 val;
 730
 731                 rc = pci_read_config_dword(priv->pci_dev,
 732                                 PCI_POWER_SOURCE, &val);
 733                 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
 734                         iwl_set_bits_mask_restricted_reg(priv, APMG_PS_CTRL_REG,
 735                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 736                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
 737                         iwl_release_restricted_access(priv);
 738
 739                         iwl_poll_bit(priv, CSR_GPIO_IN,
 740                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
 741                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
 742                 } else
 743                         iwl_release_restricted_access(priv);
 744         } else {
 745                 iwl_set_bits_mask_restricted_reg(priv, APMG_PS_CTRL_REG,
 746                                 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 747                                 ~APMG_PS_CTRL_MSK_PWR_SRC);
 748
 749                 iwl_release_restricted_access(priv);
 750                 iwl_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
 751                              CSR_GPIO_IN_BIT_AUX_POWER, 5000);  /* uS */
 752         }
 753         spin_unlock_irqrestore(&priv->lock, flags);
 754
 755         return rc;
 756 }
 757
 758 static int iwl3945_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 759 {
 760         int rc;
 761         unsigned long flags;
 762
 763         spin_lock_irqsave(&priv->lock, flags);
 764         rc = iwl_grab_restricted_access(priv);
 765         if (rc) {
 766                 spin_unlock_irqrestore(&priv->lock, flags);
 767                 return rc;
 768         }
 769
 770         iwl_write_restricted(priv, FH_RCSR_RBD_BASE(0), rxq->dma_addr);
 771         iwl_write_restricted(priv, FH_RCSR_RPTR_ADDR(0),
 772                              priv->hw_setting.shared_phys +
 773                              offsetof(struct iwl_shared, rx_read_ptr[0]));
 774         iwl_write_restricted(priv, FH_RCSR_WPTR(0), 0);
 775         iwl_write_restricted(priv, FH_RCSR_CONFIG(0),
 776                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
 777                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
 778                 ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
 779                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
 780                 (RX_QUEUE_SIZE_LOG << ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
 781                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
 782                 (1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
 783                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
 784
 785         /* fake read to flush all prev I/O */
 786         iwl_read_restricted(priv, FH_RSSR_CTRL);
 787
 788         iwl_release_restricted_access(priv);
 789         spin_unlock_irqrestore(&priv->lock, flags);
 790
 791         return 0;
 792 }
 793
 794 static int iwl3945_tx_reset(struct iwl_priv *priv)
 795 {
 796         int rc;
 797         unsigned long flags;
 798
 799         spin_lock_irqsave(&priv->lock, flags);
 800         rc = iwl_grab_restricted_access(priv);
 801         if (rc) {
 802                 spin_unlock_irqrestore(&priv->lock, flags);
 803                 return rc;
 804         }
 805
 806         /* bypass mode */
 807         iwl_write_restricted_reg(priv, SCD_MODE_REG, 0x2);
 808
 809         /* RA 0 is active */
 810         iwl_write_restricted_reg(priv, SCD_ARASTAT_REG, 0x01);
 811
 812         /* all 6 fifo are active */
 813         iwl_write_restricted_reg(priv, SCD_TXFACT_REG, 0x3f);
 814
 815         iwl_write_restricted_reg(priv, SCD_SBYP_MODE_1_REG, 0x010000);
 816         iwl_write_restricted_reg(priv, SCD_SBYP_MODE_2_REG, 0x030002);
 817         iwl_write_restricted_reg(priv, SCD_TXF4MF_REG, 0x000004);
 818         iwl_write_restricted_reg(priv, SCD_TXF5MF_REG, 0x000005);
 819
 820         iwl_write_restricted(priv, FH_TSSR_CBB_BASE,
 821                              priv->hw_setting.shared_phys);
 822
 823         iwl_write_restricted(priv, FH_TSSR_MSG_CONFIG,
 824                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
 825                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
 826                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
 827                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
 828                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
 829                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
 830                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
 831
 832         iwl_release_restricted_access(priv);
 833         spin_unlock_irqrestore(&priv->lock, flags);
 834
 835         return 0;
 836 }
 837
 838 /**
 839  * iwl3945_txq_ctx_reset - Reset TX queue context
 840  *
 841  * Destroys all DMA structures and initialize them again
 842  */
 843 static int iwl3945_txq_ctx_reset(struct iwl_priv *priv)
 844 {
 845         int rc;
 846         int txq_id, slots_num;
 847
 848         iwl_hw_txq_ctx_free(priv);
 849
 850         /* Tx CMD queue */
 851         rc = iwl3945_tx_reset(priv);
 852         if (rc)
 853                 goto error;
 854
 855         /* Tx queue(s) */
 856         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
 857                 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
 858                                 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
 859                 rc = iwl_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
 860                                 txq_id);
 861                 if (rc) {
 862                         IWL_ERROR("Tx %d queue init failed\n", txq_id);
 863                         goto error;
 864                 }
 865         }
 866
 867         return rc;
 868
 869  error:
 870         iwl_hw_txq_ctx_free(priv);
 871         return rc;
 872 }
 873
 874 int iwl_hw_nic_init(struct iwl_priv *priv)
 875 {
 876         u8 rev_id;
 877         int rc;
 878         unsigned long flags;
 879         struct iwl_rx_queue *rxq = &priv->rxq;
 880
 881         iwl_power_init_handle(priv);
 882
 883         spin_lock_irqsave(&priv->lock, flags);
 884         iwl_set_bit(priv, CSR_ANA_PLL_CFG, (1 << 24));
 885         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 886                     CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
 887
 888         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 889         rc = iwl_poll_bit(priv, CSR_GP_CNTRL,
 890                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 891                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 892         if (rc < 0) {
 893                 spin_unlock_irqrestore(&priv->lock, flags);
 894                 IWL_DEBUG_INFO("Failed to init the card\n");
 895                 return rc;
 896         }
 897
 898         rc = iwl_grab_restricted_access(priv);
 899         if (rc) {
 900                 spin_unlock_irqrestore(&priv->lock, flags);
 901                 return rc;
 902         }
 903         iwl_write_restricted_reg(priv, APMG_CLK_EN_REG,
 904                                  APMG_CLK_VAL_DMA_CLK_RQT |
 905                                  APMG_CLK_VAL_BSM_CLK_RQT);
 906         udelay(20);
 907         iwl_set_bits_restricted_reg(priv, APMG_PCIDEV_STT_REG,
 908                                     APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 909         iwl_release_restricted_access(priv);
 910         spin_unlock_irqrestore(&priv->lock, flags);
 911
 912         /* Determine HW type */
 913         rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
 914         if (rc)
 915                 return rc;
 916         IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
 917
 918         iwl3945_nic_set_pwr_src(priv, 1);
 919         spin_lock_irqsave(&priv->lock, flags);
 920
 921         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
 922                 IWL_DEBUG_INFO("RTP type \n");
 923         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
 924                 IWL_DEBUG_INFO("ALM-MB type\n");
 925                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 926                             CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MB);
 927         } else {
 928                 IWL_DEBUG_INFO("ALM-MM type\n");
 929                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 930                             CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MM);
 931         }
 932
 933         spin_unlock_irqrestore(&priv->lock, flags);
 934
 935         /* Initialize the EEPROM */
 936         rc = iwl_eeprom_init(priv);
 937         if (rc)
 938                 return rc;
 939
 940         spin_lock_irqsave(&priv->lock, flags);
 941         if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
 942                 IWL_DEBUG_INFO("SKU OP mode is mrc\n");
 943                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 944                             CSR_HW_IF_CONFIG_REG_BIT_SKU_MRC);
 945         } else
 946                 IWL_DEBUG_INFO("SKU OP mode is basic\n");
 947
 948         if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
 949                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
 950                                priv->eeprom.board_revision);
 951                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 952                             CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
 953         } else {
 954                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
 955                                priv->eeprom.board_revision);
 956                 iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
 957                               CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
 958         }
 959
 960         if (priv->eeprom.almgor_m_version <= 1) {
 961                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 962                             CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
 963                 IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
 964                                priv->eeprom.almgor_m_version);
 965         } else {
 966                 IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
 967                                priv->eeprom.almgor_m_version);
 968                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 969                             CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
 970         }
 971         spin_unlock_irqrestore(&priv->lock, flags);
 972
 973         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
 974                 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
 975
 976         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
 977                 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
 978
 979         /* Allocate the RX queue, or reset if it is already allocated */
 980         if (!rxq->bd) {
 981                 rc = iwl_rx_queue_alloc(priv);
 982                 if (rc) {
 983                         IWL_ERROR("Unable to initialize Rx queue\n");
 984                         return -ENOMEM;
 985                 }
 986         } else
 987                 iwl_rx_queue_reset(priv, rxq);
 988
 989         iwl_rx_replenish(priv);
 990
 991         iwl3945_rx_init(priv, rxq);
 992
 993         spin_lock_irqsave(&priv->lock, flags);
 994
 995         /* Look at using this instead:
 996         rxq->need_update = 1;
 997         iwl_rx_queue_update_write_ptr(priv, rxq);
 998         */
 999
1000         rc = iwl_grab_restricted_access(priv);
1001         if (rc) {
1002                 spin_unlock_irqrestore(&priv->lock, flags);
1003                 return rc;
1004         }
1005         iwl_write_restricted(priv, FH_RCSR_WPTR(0), rxq->write & ~7);
1006         iwl_release_restricted_access(priv);
1007
1008         spin_unlock_irqrestore(&priv->lock, flags);
1009
1010         rc = iwl3945_txq_ctx_reset(priv);
1011         if (rc)
1012                 return rc;
1013
1014         set_bit(STATUS_INIT, &priv->status);
1015
1016         return 0;
1017 }
1018
1019 /**
1020  * iwl_hw_txq_ctx_free - Free TXQ Context
1021  *
1022  * Destroy all TX DMA queues and structures
1023  */
1024 void iwl_hw_txq_ctx_free(struct iwl_priv *priv)
1025 {
1026         int txq_id;
1027
1028         /* Tx queues */
1029         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
1030                 iwl_tx_queue_free(priv, &priv->txq[txq_id]);
1031 }
1032
1033 void iwl_hw_txq_ctx_stop(struct iwl_priv *priv)
1034 {
1035         int queue;
1036         unsigned long flags;
1037
1038         spin_lock_irqsave(&priv->lock, flags);
1039         if (iwl_grab_restricted_access(priv)) {
1040                 spin_unlock_irqrestore(&priv->lock, flags);
1041                 iwl_hw_txq_ctx_free(priv);
1042                 return;
1043         }
1044
1045         /* stop SCD */
1046         iwl_write_restricted_reg(priv, SCD_MODE_REG, 0);
1047
1048         /* reset TFD queues */
1049         for (queue = TFD_QUEUE_MIN; queue < TFD_QUEUE_MAX; queue++) {
1050                 iwl_write_restricted(priv, FH_TCSR_CONFIG(queue), 0x0);
1051                 iwl_poll_restricted_bit(priv, FH_TSSR_TX_STATUS,
1052                                 ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue),
1053                                 1000);
1054         }
1055
1056         iwl_release_restricted_access(priv);
1057         spin_unlock_irqrestore(&priv->lock, flags);
1058
1059         iwl_hw_txq_ctx_free(priv);
1060 }
1061
1062 int iwl_hw_nic_stop_master(struct iwl_priv *priv)
1063 {
1064         int rc = 0;
1065         u32 reg_val;
1066         unsigned long flags;
1067
1068         spin_lock_irqsave(&priv->lock, flags);
1069
1070         /* set stop master bit */
1071         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1072
1073         reg_val = iwl_read32(priv, CSR_GP_CNTRL);
1074
1075         if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
1076             (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
1077                 IWL_DEBUG_INFO("Card in power save, master is already "
1078                                "stopped\n");
1079         else {
1080                 rc = iwl_poll_bit(priv, CSR_RESET,
1081                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
1082                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1083                 if (rc < 0) {
1084                         spin_unlock_irqrestore(&priv->lock, flags);
1085                         return rc;
1086                 }
1087         }
1088
1089         spin_unlock_irqrestore(&priv->lock, flags);
1090         IWL_DEBUG_INFO("stop master\n");
1091
1092         return rc;
1093 }
1094
1095 int iwl_hw_nic_reset(struct iwl_priv *priv)
1096 {
1097         int rc;
1098         unsigned long flags;
1099
1100         iwl_hw_nic_stop_master(priv);
1101
1102         spin_lock_irqsave(&priv->lock, flags);
1103
1104         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1105
1106         rc = iwl_poll_bit(priv, CSR_GP_CNTRL,
1107                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1108                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1109
1110         rc = iwl_grab_restricted_access(priv);
1111         if (!rc) {
1112                 iwl_write_restricted_reg(priv, APMG_CLK_CTRL_REG,
1113                                          APMG_CLK_VAL_BSM_CLK_RQT);
1114
1115                 udelay(10);
1116
1117                 iwl_set_bit(priv, CSR_GP_CNTRL,
1118                             CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1119
1120                 iwl_write_restricted_reg(priv, APMG_RTC_INT_MSK_REG, 0x0);
1121                 iwl_write_restricted_reg(priv, APMG_RTC_INT_STT_REG,
1122                                         0xFFFFFFFF);
1123
1124                 /* enable DMA */
1125                 iwl_write_restricted_reg(priv, APMG_CLK_EN_REG,
1126                                          APMG_CLK_VAL_DMA_CLK_RQT |
1127                                          APMG_CLK_VAL_BSM_CLK_RQT);
1128                 udelay(10);
1129
1130                 iwl_set_bits_restricted_reg(priv, APMG_PS_CTRL_REG,
1131                                 APMG_PS_CTRL_VAL_RESET_REQ);
1132                 udelay(5);
1133                 iwl_clear_bits_restricted_reg(priv, APMG_PS_CTRL_REG,
1134                                 APMG_PS_CTRL_VAL_RESET_REQ);
1135                 iwl_release_restricted_access(priv);
1136         }
1137
1138         /* Clear the 'host command active' bit... */
1139         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1140
1141         wake_up_interruptible(&priv->wait_command_queue);
1142         spin_unlock_irqrestore(&priv->lock, flags);
1143
1144         return rc;
1145 }
1146
1147 /**
1148  * iwl_hw_reg_adjust_power_by_temp - return index delta into power gain settings table
1149  */
1150 static int iwl_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1151 {
1152         return (new_reading - old_reading) * (-11) / 100;
1153 }
1154
1155 /**
1156  * iwl_hw_reg_temp_out_of_range - Keep temperature in sane range
1157  */
1158 static inline int iwl_hw_reg_temp_out_of_range(int temperature)
1159 {
1160         return (((temperature < -260) || (temperature > 25)) ? 1 : 0);
1161 }
1162
1163 int iwl_hw_get_temperature(struct iwl_priv *priv)
1164 {
1165         return iwl_read32(priv, CSR_UCODE_DRV_GP2);
1166 }
1167
1168 /**
1169  * iwl_hw_reg_txpower_get_temperature - get current temperature by reading from NIC
1170  */
1171 static int iwl_hw_reg_txpower_get_temperature(struct iwl_priv *priv)
1172 {
1173         int temperature;
1174
1175         temperature = iwl_hw_get_temperature(priv);
1176
1177         /* driver's okay range is -260 to +25.
1178          *   human readable okay range is 0 to +285 */
1179         IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1180
1181         /* handle insane temp reading */
1182         if (iwl_hw_reg_temp_out_of_range(temperature)) {
1183                 IWL_ERROR("Error bad temperature value  %d\n", temperature);
1184
1185                 /* if really really hot(?),
1186                  *   substitute the 3rd band/group's temp measured at factory */
1187                 if (priv->last_temperature > 100)
1188                         temperature = priv->eeprom.groups[2].temperature;
1189                 else /* else use most recent "sane" value from driver */
1190                         temperature = priv->last_temperature;
1191         }
1192
1193         return temperature;     /* raw, not "human readable" */
1194 }
1195
1196 /* Adjust Txpower only if temperature variance is greater than threshold.
1197  *
1198  * Both are lower than older versions' 9 degrees */
1199 #define IWL_TEMPERATURE_LIMIT_TIMER   6
1200
1201 /**
1202  * is_temp_calib_needed - determines if new calibration is needed
1203  *
1204  * records new temperature in tx_mgr->temperature.
1205  * replaces tx_mgr->last_temperature *only* if calib needed
1206  *    (assumes caller will actually do the calibration!). */
1207 static int is_temp_calib_needed(struct iwl_priv *priv)
1208 {
1209         int temp_diff;
1210
1211         priv->temperature = iwl_hw_reg_txpower_get_temperature(priv);
1212         temp_diff = priv->temperature - priv->last_temperature;
1213
1214         /* get absolute value */
1215         if (temp_diff < 0) {
1216                 IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
1217                 temp_diff = -temp_diff;
1218         } else if (temp_diff == 0)
1219                 IWL_DEBUG_POWER("Same temp,\n");
1220         else
1221                 IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
1222
1223         /* if we don't need calibration, *don't* update last_temperature */
1224         if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1225                 IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1226                 return 0;
1227         }
1228
1229         IWL_DEBUG_POWER("Timed thermal calib needed\n");
1230
1231         /* assume that caller will actually do calib ...
1232          *   update the "last temperature" value */
1233         priv->last_temperature = priv->temperature;
1234         return 1;
1235 }
1236
1237 #define IWL_MAX_GAIN_ENTRIES 78
1238 #define IWL_CCK_FROM_OFDM_POWER_DIFF  -5
1239 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1240
1241 /* radio and DSP power table, each step is 1/2 dB.
1242  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1243 static struct iwl_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1244         {
1245          {251, 127},            /* 2.4 GHz, highest power */
1246          {251, 127},
1247          {251, 127},
1248          {251, 127},
1249          {251, 125},
1250          {251, 110},
1251          {251, 105},
1252          {251, 98},
1253          {187, 125},
1254          {187, 115},
1255          {187, 108},
1256          {187, 99},
1257          {243, 119},
1258          {243, 111},
1259          {243, 105},
1260          {243, 97},
1261          {243, 92},
1262          {211, 106},
1263          {211, 100},
1264          {179, 120},
1265          {179, 113},
1266          {179, 107},
1267          {147, 125},
1268          {147, 119},
1269          {147, 112},
1270          {147, 106},
1271          {147, 101},
1272          {147, 97},
1273          {147, 91},
1274          {115, 107},
1275          {235, 121},
1276          {235, 115},
1277          {235, 109},
1278          {203, 127},
1279          {203, 121},
1280          {203, 115},
1281          {203, 108},
1282          {203, 102},
1283          {203, 96},
1284          {203, 92},
1285          {171, 110},
1286          {171, 104},
1287          {171, 98},
1288          {139, 116},
1289          {227, 125},
1290          {227, 119},
1291          {227, 113},
1292          {227, 107},
1293          {227, 101},
1294          {227, 96},
1295          {195, 113},
1296          {195, 106},
1297          {195, 102},
1298          {195, 95},
1299          {163, 113},
1300          {163, 106},
1301          {163, 102},
1302          {163, 95},
1303          {131, 113},
1304          {131, 106},
1305          {131, 102},
1306          {131, 95},
1307          {99, 113},
1308          {99, 106},
1309          {99, 102},
1310          {99, 95},
1311          {67, 113},
1312          {67, 106},
1313          {67, 102},
1314          {67, 95},
1315          {35, 113},
1316          {35, 106},
1317          {35, 102},
1318          {35, 95},
1319          {3, 113},
1320          {3, 106},
1321          {3, 102},
1322          {3, 95} },             /* 2.4 GHz, lowest power */
1323         {
1324          {251, 127},            /* 5.x GHz, highest power */
1325          {251, 120},
1326          {251, 114},
1327          {219, 119},
1328          {219, 101},
1329          {187, 113},
1330          {187, 102},
1331          {155, 114},
1332          {155, 103},
1333          {123, 117},
1334          {123, 107},
1335          {123, 99},
1336          {123, 92},
1337          {91, 108},
1338          {59, 125},
1339          {59, 118},
1340          {59, 109},
1341          {59, 102},
1342          {59, 96},
1343          {59, 90},
1344          {27, 104},
1345          {27, 98},
1346          {27, 92},
1347          {115, 118},
1348          {115, 111},
1349          {115, 104},
1350          {83, 126},
1351          {83, 121},
1352          {83, 113},
1353          {83, 105},
1354          {83, 99},
1355          {51, 118},
1356          {51, 111},
1357          {51, 104},
1358          {51, 98},
1359          {19, 116},
1360          {19, 109},
1361          {19, 102},
1362          {19, 98},
1363          {19, 93},
1364          {171, 113},
1365          {171, 107},
1366          {171, 99},
1367          {139, 120},
1368          {139, 113},
1369          {139, 107},
1370          {139, 99},
1371          {107, 120},
1372          {107, 113},
1373          {107, 107},
1374          {107, 99},
1375          {75, 120},
1376          {75, 113},
1377          {75, 107},
1378          {75, 99},
1379          {43, 120},
1380          {43, 113},
1381          {43, 107},
1382          {43, 99},
1383          {11, 120},
1384          {11, 113},
1385          {11, 107},
1386          {11, 99},
1387          {131, 107},
1388          {131, 99},
1389          {99, 120},
1390          {99, 113},
1391          {99, 107},
1392          {99, 99},
1393          {67, 120},
1394          {67, 113},
1395          {67, 107},
1396          {67, 99},
1397          {35, 120},
1398          {35, 113},
1399          {35, 107},
1400          {35, 99},
1401          {3, 120} }             /* 5.x GHz, lowest power */
1402 };
1403
1404 static inline u8 iwl_hw_reg_fix_power_index(int index)
1405 {
1406         if (index < 0)
1407                 return 0;
1408         if (index >= IWL_MAX_GAIN_ENTRIES)
1409                 return IWL_MAX_GAIN_ENTRIES - 1;
1410         return (u8) index;
1411 }
1412
1413 /* Kick off thermal recalibration check every 60 seconds */
1414 #define REG_RECALIB_PERIOD (60)
1415
1416 /**
1417  * iwl_hw_reg_set_scan_power - Set Tx power for scan probe requests
1418  *
1419  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1420  * or 6 Mbit (OFDM) rates.
1421  */
1422 static void iwl_hw_reg_set_scan_power(struct iwl_priv *priv, u32 scan_tbl_index,
1423                                s32 rate_index, const s8 *clip_pwrs,
1424                                struct iwl_channel_info *ch_info,
1425                                int band_index)
1426 {
1427         struct iwl_scan_power_info *scan_power_info;
1428         s8 power;
1429         u8 power_index;
1430
1431         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1432
1433         /* use this channel group's 6Mbit clipping/saturation pwr,
1434          *   but cap at regulatory scan power restriction (set during init
1435          *   based on eeprom channel data) for this channel.  */
1436         power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX]);
1437
1438         /* further limit to user's max power preference.
1439          * FIXME:  Other spectrum management power limitations do not
1440          *   seem to apply?? */
1441         power = min(power, priv->user_txpower_limit);
1442         scan_power_info->requested_power = power;
1443
1444         /* find difference between new scan *power* and current "normal"
1445          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1446          *   current "normal" temperature-compensated Tx power *index* for
1447          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1448          *   *index*. */
1449         power_index = ch_info->power_info[rate_index].power_table_index
1450             - (power - ch_info->power_info
1451                [IWL_RATE_6M_INDEX].requested_power) * 2;
1452
1453         /* store reference index that we use when adjusting *all* scan
1454          *   powers.  So we can accommodate user (all channel) or spectrum
1455          *   management (single channel) power changes "between" temperature
1456          *   feedback compensation procedures.
1457          * don't force fit this reference index into gain table; it may be a
1458          *   negative number.  This will help avoid errors when we're at
1459          *   the lower bounds (highest gains, for warmest temperatures)
1460          *   of the table. */
1461
1462         /* don't exceed table bounds for "real" setting */
1463         power_index = iwl_hw_reg_fix_power_index(power_index);
1464
1465         scan_power_info->power_table_index = power_index;
1466         scan_power_info->tpc.tx_gain =
1467             power_gain_table[band_index][power_index].tx_gain;
1468         scan_power_info->tpc.dsp_atten =
1469             power_gain_table[band_index][power_index].dsp_atten;
1470 }
1471
1472 /**
1473  * iwl_hw_reg_send_txpower - fill in Tx Power command with gain settings
1474  *
1475  * Configures power settings for all rates for the current channel,
1476  * using values from channel info struct, and send to NIC
1477  */
1478 int iwl_hw_reg_send_txpower(struct iwl_priv *priv)
1479 {
1480         int rate_idx;
1481         const struct iwl_channel_info *ch_info = NULL;
1482         struct iwl_txpowertable_cmd txpower = {
1483                 .channel = priv->active_rxon.channel,
1484         };
1485
1486         txpower.band = (priv->phymode == MODE_IEEE80211A) ? 0 : 1;
1487         ch_info = iwl_get_channel_info(priv,
1488                                        priv->phymode,
1489                                        le16_to_cpu(priv->active_rxon.channel));
1490         if (!ch_info) {
1491                 IWL_ERROR
1492                     ("Failed to get channel info for channel %d [%d]\n",
1493                      le16_to_cpu(priv->active_rxon.channel), priv->phymode);
1494                 return -EINVAL;
1495         }
1496
1497         if (!is_channel_valid(ch_info)) {
1498                 IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1499                                 "non-Tx channel.\n");
1500                 return 0;
1501         }
1502
1503         /* fill cmd with power settings for all rates for current channel */
1504         for (rate_idx = 0; rate_idx < IWL_RATE_COUNT; rate_idx++) {
1505                 txpower.power[rate_idx].tpc = ch_info->power_info[rate_idx].tpc;
1506                 txpower.power[rate_idx].rate = iwl_rates[rate_idx].plcp;
1507
1508                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1509                                 le16_to_cpu(txpower.channel),
1510                                 txpower.band,
1511                                 txpower.power[rate_idx].tpc.tx_gain,
1512                                 txpower.power[rate_idx].tpc.dsp_atten,
1513                                 txpower.power[rate_idx].rate);
1514         }
1515
1516         return iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1517                                 sizeof(struct iwl_txpowertable_cmd), &txpower);
1518
1519 }
1520
1521 /**
1522  * iwl_hw_reg_set_new_power - Configures power tables at new levels
1523  * @ch_info: Channel to update.  Uses power_info.requested_power.
1524  *
1525  * Replace requested_power and base_power_index ch_info fields for
1526  * one channel.
1527  *
1528  * Called if user or spectrum management changes power preferences.
1529  * Takes into account h/w and modulation limitations (clip power).
1530  *
1531  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1532  *
1533  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1534  *       properly fill out the scan powers, and actual h/w gain settings,
1535  *       and send changes to NIC
1536  */
1537 static int iwl_hw_reg_set_new_power(struct iwl_priv *priv,
1538                              struct iwl_channel_info *ch_info)
1539 {
1540         struct iwl_channel_power_info *power_info;
1541         int power_changed = 0;
1542         int i;
1543         const s8 *clip_pwrs;
1544         int power;
1545
1546         /* Get this chnlgrp's rate-to-max/clip-powers table */
1547         clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1548
1549         /* Get this channel's rate-to-current-power settings table */
1550         power_info = ch_info->power_info;
1551
1552         /* update OFDM Txpower settings */
1553         for (i = IWL_FIRST_OFDM_RATE; i <= IWL_LAST_OFDM_RATE;
1554              i++, ++power_info) {
1555                 int delta_idx;
1556
1557                 /* limit new power to be no more than h/w capability */
1558                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1559                 if (power == power_info->requested_power)
1560                         continue;
1561
1562                 /* find difference between old and new requested powers,
1563                  *    update base (non-temp-compensated) power index */
1564                 delta_idx = (power - power_info->requested_power) * 2;
1565                 power_info->base_power_index -= delta_idx;
1566
1567                 /* save new requested power value */
1568                 power_info->requested_power = power;
1569
1570                 power_changed = 1;
1571         }
1572
1573         /* update CCK Txpower settings, based on OFDM 12M setting ...
1574          *    ... all CCK power settings for a given channel are the *same*. */
1575         if (power_changed) {
1576                 power =
1577                     ch_info->power_info[IWL_RATE_12M_INDEX].
1578                     requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1579
1580                 /* do all CCK rates' iwl_channel_power_info structures */
1581                 for (i = IWL_FIRST_CCK_RATE; i <= IWL_LAST_CCK_RATE; i++) {
1582                         power_info->requested_power = power;
1583                         power_info->base_power_index =
1584                             ch_info->power_info[IWL_RATE_12M_INDEX].
1585                             base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1586                         ++power_info;
1587                 }
1588         }
1589
1590         return 0;
1591 }
1592
1593 /**
1594  * iwl_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1595  *
1596  * NOTE: Returned power limit may be less (but not more) than requested,
1597  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1598  *       (no consideration for h/w clipping limitations).
1599  */
1600 static int iwl_hw_reg_get_ch_txpower_limit(struct iwl_channel_info *ch_info)
1601 {
1602         s8 max_power;
1603
1604 #if 0
1605         /* if we're using TGd limits, use lower of TGd or EEPROM */
1606         if (ch_info->tgd_data.max_power != 0)
1607                 max_power = min(ch_info->tgd_data.max_power,
1608                                 ch_info->eeprom.max_power_avg);
1609
1610         /* else just use EEPROM limits */
1611         else
1612 #endif
1613                 max_power = ch_info->eeprom.max_power_avg;
1614
1615         return min(max_power, ch_info->max_power_avg);
1616 }
1617
1618 /**
1619  * iwl_hw_reg_comp_txpower_temp - Compensate for temperature
1620  *
1621  * Compensate txpower settings of *all* channels for temperature.
1622  * This only accounts for the difference between current temperature
1623  *   and the factory calibration temperatures, and bases the new settings
1624  *   on the channel's base_power_index.
1625  *
1626  * If RxOn is "associated", this sends the new Txpower to NIC!
1627  */
1628 static int iwl_hw_reg_comp_txpower_temp(struct iwl_priv *priv)
1629 {
1630         struct iwl_channel_info *ch_info = NULL;
1631         int delta_index;
1632         const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1633         u8 a_band;
1634         u8 rate_index;
1635         u8 scan_tbl_index;
1636         u8 i;
1637         int ref_temp;
1638         int temperature = priv->temperature;
1639
1640         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1641         for (i = 0; i < priv->channel_count; i++) {
1642                 ch_info = &priv->channel_info[i];
1643                 a_band = is_channel_a_band(ch_info);
1644
1645                 /* Get this chnlgrp's factory calibration temperature */
1646                 ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
1647                     temperature;
1648
1649                 /* get power index adjustment based on curr and factory
1650                  * temps */
1651                 delta_index = iwl_hw_reg_adjust_power_by_temp(temperature,
1652                                                               ref_temp);
1653
1654                 /* set tx power value for all rates, OFDM and CCK */
1655                 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
1656                      rate_index++) {
1657                         int power_idx =
1658                             ch_info->power_info[rate_index].base_power_index;
1659
1660                         /* temperature compensate */
1661                         power_idx += delta_index;
1662
1663                         /* stay within table range */
1664                         power_idx = iwl_hw_reg_fix_power_index(power_idx);
1665                         ch_info->power_info[rate_index].
1666                             power_table_index = (u8) power_idx;
1667                         ch_info->power_info[rate_index].tpc =
1668                             power_gain_table[a_band][power_idx];
1669                 }
1670
1671                 /* Get this chnlgrp's rate-to-max/clip-powers table */
1672                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1673
1674                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1675                 for (scan_tbl_index = 0;
1676                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
1677                         s32 actual_index = (scan_tbl_index == 0) ?
1678                             IWL_RATE_1M_INDEX : IWL_RATE_6M_INDEX;
1679                         iwl_hw_reg_set_scan_power(priv, scan_tbl_index,
1680                                            actual_index, clip_pwrs,
1681                                            ch_info, a_band);
1682                 }
1683         }
1684
1685         /* send Txpower command for current channel to ucode */
1686         return iwl_hw_reg_send_txpower(priv);
1687 }
1688
1689 int iwl_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
1690 {
1691         struct iwl_channel_info *ch_info;
1692         s8 max_power;
1693         u8 a_band;
1694         u8 i;
1695
1696         if (priv->user_txpower_limit == power) {
1697                 IWL_DEBUG_POWER("Requested Tx power same as current "
1698                                 "limit: %ddBm.\n", power);
1699                 return 0;
1700         }
1701
1702         IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
1703         priv->user_txpower_limit = power;
1704
1705         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1706
1707         for (i = 0; i < priv->channel_count; i++) {
1708                 ch_info = &priv->channel_info[i];
1709                 a_band = is_channel_a_band(ch_info);
1710
1711                 /* find minimum power of all user and regulatory constraints
1712                  *    (does not consider h/w clipping limitations) */
1713                 max_power = iwl_hw_reg_get_ch_txpower_limit(ch_info);
1714                 max_power = min(power, max_power);
1715                 if (max_power != ch_info->curr_txpow) {
1716                         ch_info->curr_txpow = max_power;
1717
1718                         /* this considers the h/w clipping limitations */
1719                         iwl_hw_reg_set_new_power(priv, ch_info);
1720                 }
1721         }
1722
1723         /* update txpower settings for all channels,
1724          *   send to NIC if associated. */
1725         is_temp_calib_needed(priv);
1726         iwl_hw_reg_comp_txpower_temp(priv);
1727
1728         return 0;
1729 }
1730
1731 /* will add 3945 channel switch cmd handling later */
1732 int iwl_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1733 {
1734         return 0;
1735 }
1736
1737 /**
1738  * iwl3945_reg_txpower_periodic -  called when time to check our temperature.
1739  *
1740  * -- reset periodic timer
1741  * -- see if temp has changed enough to warrant re-calibration ... if so:
1742  *     -- correct coeffs for temp (can reset temp timer)
1743  *     -- save this temp as "last",
1744  *     -- send new set of gain settings to NIC
1745  * NOTE:  This should continue working, even when we're not associated,
1746  *   so we can keep our internal table of scan powers current. */
1747 void iwl3945_reg_txpower_periodic(struct iwl_priv *priv)
1748 {
1749         /* This will kick in the "brute force"
1750          * iwl_hw_reg_comp_txpower_temp() below */
1751         if (!is_temp_calib_needed(priv))
1752                 goto reschedule;
1753
1754         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
1755          * This is based *only* on current temperature,
1756          * ignoring any previous power measurements */
1757         iwl_hw_reg_comp_txpower_temp(priv);
1758
1759  reschedule:
1760         queue_delayed_work(priv->workqueue,
1761                            &priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
1762 }
1763
1764 void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
1765 {
1766         struct iwl_priv *priv = container_of(work, struct iwl_priv,
1767                                              thermal_periodic.work);
1768
1769         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1770                 return;
1771
1772         mutex_lock(&priv->mutex);
1773         iwl3945_reg_txpower_periodic(priv);
1774         mutex_unlock(&priv->mutex);
1775 }
1776
1777 /**
1778  * iwl_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
1779  *                                 for the channel.
1780  *
1781  * This function is used when initializing channel-info structs.
1782  *
1783  * NOTE: These channel groups do *NOT* match the bands above!
1784  *       These channel groups are based on factory-tested channels;
1785  *       on A-band, EEPROM's "group frequency" entries represent the top
1786  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
1787  */
1788 static u16 iwl_hw_reg_get_ch_grp_index(struct iwl_priv *priv,
1789                                        const struct iwl_channel_info *ch_info)
1790 {
1791         struct iwl_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
1792         u8 group;
1793         u16 group_index = 0;    /* based on factory calib frequencies */
1794         u8 grp_channel;
1795
1796         /* Find the group index for the channel ... don't use index 1(?) */
1797         if (is_channel_a_band(ch_info)) {
1798                 for (group = 1; group < 5; group++) {
1799                         grp_channel = ch_grp[group].group_channel;
1800                         if (ch_info->channel <= grp_channel) {
1801                                 group_index = group;
1802                                 break;
1803                         }
1804                 }
1805                 /* group 4 has a few channels *above* its factory cal freq */
1806                 if (group == 5)
1807                         group_index = 4;
1808         } else
1809                 group_index = 0;        /* 2.4 GHz, group 0 */
1810
1811         IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
1812                         group_index);
1813         return group_index;
1814 }
1815
1816 /**
1817  * iwl_hw_reg_get_matched_power_index - Interpolate to get nominal index
1818  *
1819  * Interpolate to get nominal (i.e. at factory calibration temperature) index
1820  *   into radio/DSP gain settings table for requested power.
1821  */
1822 static int iwl_hw_reg_get_matched_power_index(struct iwl_priv *priv,
1823                                        s8 requested_power,
1824                                        s32 setting_index, s32 *new_index)
1825 {
1826         const struct iwl_eeprom_txpower_group *chnl_grp = NULL;
1827         s32 index0, index1;
1828         s32 power = 2 * requested_power;
1829         s32 i;
1830         const struct iwl_eeprom_txpower_sample *samples;
1831         s32 gains0, gains1;
1832         s32 res;
1833         s32 denominator;
1834
1835         chnl_grp = &priv->eeprom.groups[setting_index];
1836         samples = chnl_grp->samples;
1837         for (i = 0; i < 5; i++) {
1838                 if (power == samples[i].power) {
1839                         *new_index = samples[i].gain_index;
1840                         return 0;
1841                 }
1842         }
1843
1844         if (power > samples[1].power) {
1845                 index0 = 0;
1846                 index1 = 1;
1847         } else if (power > samples[2].power) {
1848                 index0 = 1;
1849                 index1 = 2;
1850         } else if (power > samples[3].power) {
1851                 index0 = 2;
1852                 index1 = 3;
1853         } else {
1854                 index0 = 3;
1855                 index1 = 4;
1856         }
1857
1858         denominator = (s32) samples[index1].power - (s32) samples[index0].power;
1859         if (denominator == 0)
1860                 return -EINVAL;
1861         gains0 = (s32) samples[index0].gain_index * (1 << 19);
1862         gains1 = (s32) samples[index1].gain_index * (1 << 19);
1863         res = gains0 + (gains1 - gains0) *
1864             ((s32) power - (s32) samples[index0].power) / denominator +
1865             (1 << 18);
1866         *new_index = res >> 19;
1867         return 0;
1868 }
1869
1870 static void iwl_hw_reg_init_channel_groups(struct iwl_priv *priv)
1871 {
1872         u32 i;
1873         s32 rate_index;
1874         const struct iwl_eeprom_txpower_group *group;
1875
1876         IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
1877
1878         for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
1879                 s8 *clip_pwrs;  /* table of power levels for each rate */
1880                 s8 satur_pwr;   /* saturation power for each chnl group */
1881                 group = &priv->eeprom.groups[i];
1882
1883                 /* sanity check on factory saturation power value */
1884                 if (group->saturation_power < 40) {
1885                         IWL_WARNING("Error: saturation power is %d, "
1886                                     "less than minimum expected 40\n",
1887                                     group->saturation_power);
1888                         return;
1889                 }
1890
1891                 /*
1892                  * Derive requested power levels for each rate, based on
1893                  *   hardware capabilities (saturation power for band).
1894                  * Basic value is 3dB down from saturation, with further
1895                  *   power reductions for highest 3 data rates.  These
1896                  *   backoffs provide headroom for high rate modulation
1897                  *   power peaks, without too much distortion (clipping).
1898                  */
1899                 /* we'll fill in this array with h/w max power levels */
1900                 clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
1901
1902                 /* divide factory saturation power by 2 to find -3dB level */
1903                 satur_pwr = (s8) (group->saturation_power >> 1);
1904
1905                 /* fill in channel group's nominal powers for each rate */
1906                 for (rate_index = 0;
1907                      rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
1908                         switch (rate_index) {
1909                         case IWL_RATE_36M_INDEX:
1910                                 if (i == 0)     /* B/G */
1911                                         *clip_pwrs = satur_pwr;
1912                                 else    /* A */
1913                                         *clip_pwrs = satur_pwr - 5;
1914                                 break;
1915                         case IWL_RATE_48M_INDEX:
1916                                 if (i == 0)
1917                                         *clip_pwrs = satur_pwr - 7;
1918                                 else
1919                                         *clip_pwrs = satur_pwr - 10;
1920                                 break;
1921                         case IWL_RATE_54M_INDEX:
1922                                 if (i == 0)
1923                                         *clip_pwrs = satur_pwr - 9;
1924                                 else
1925                                         *clip_pwrs = satur_pwr - 12;
1926                                 break;
1927                         default:
1928                                 *clip_pwrs = satur_pwr;
1929                                 break;
1930                         }
1931                 }
1932         }
1933 }
1934
1935 /**
1936  * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
1937  *
1938  * Second pass (during init) to set up priv->channel_info
1939  *
1940  * Set up Tx-power settings in our channel info database for each VALID
1941  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
1942  * and current temperature.
1943  *
1944  * Since this is based on current temperature (at init time), these values may
1945  * not be valid for very long, but it gives us a starting/default point,
1946  * and allows us to active (i.e. using Tx) scan.
1947  *
1948  * This does *not* write values to NIC, just sets up our internal table.
1949  */
1950 int iwl3945_txpower_set_from_eeprom(struct iwl_priv *priv)
1951 {
1952         struct iwl_channel_info *ch_info = NULL;
1953         struct iwl_channel_power_info *pwr_info;
1954         int delta_index;
1955         u8 rate_index;
1956         u8 scan_tbl_index;
1957         const s8 *clip_pwrs;    /* array of power levels for each rate */
1958         u8 gain, dsp_atten;
1959         s8 power;
1960         u8 pwr_index, base_pwr_index, a_band;
1961         u8 i;
1962         int temperature;
1963
1964         /* save temperature reference,
1965          *   so we can determine next time to calibrate */
1966         temperature = iwl_hw_reg_txpower_get_temperature(priv);
1967         priv->last_temperature = temperature;
1968
1969         iwl_hw_reg_init_channel_groups(priv);
1970
1971         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
1972         for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
1973              i++, ch_info++) {
1974                 a_band = is_channel_a_band(ch_info);
1975                 if (!is_channel_valid(ch_info))
1976                         continue;
1977
1978                 /* find this channel's channel group (*not* "band") index */
1979                 ch_info->group_index =
1980                         iwl_hw_reg_get_ch_grp_index(priv, ch_info);
1981
1982                 /* Get this chnlgrp's rate->max/clip-powers table */
1983                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1984
1985                 /* calculate power index *adjustment* value according to
1986                  *  diff between current temperature and factory temperature */
1987                 delta_index = iwl_hw_reg_adjust_power_by_temp(temperature,
1988                                 priv->eeprom.groups[ch_info->group_index].
1989                                 temperature);
1990
1991                 IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
1992                                 ch_info->channel, delta_index, temperature +
1993                                 IWL_TEMP_CONVERT);
1994
1995                 /* set tx power value for all OFDM rates */
1996                 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
1997                      rate_index++) {
1998                         s32 power_idx;
1999                         int rc;
2000
2001                         /* use channel group's clip-power table,
2002                          *   but don't exceed channel's max power */
2003                         s8 pwr = min(ch_info->max_power_avg,
2004                                      clip_pwrs[rate_index]);
2005
2006                         pwr_info = &ch_info->power_info[rate_index];
2007
2008                         /* get base (i.e. at factory-measured temperature)
2009                          *    power table index for this rate's power */
2010                         rc = iwl_hw_reg_get_matched_power_index(priv, pwr,
2011                                                          ch_info->group_index,
2012                                                          &power_idx);
2013                         if (rc) {
2014                                 IWL_ERROR("Invalid power index\n");
2015                                 return rc;
2016                         }
2017                         pwr_info->base_power_index = (u8) power_idx;
2018
2019                         /* temperature compensate */
2020                         power_idx += delta_index;
2021
2022                         /* stay within range of gain table */
2023                         power_idx = iwl_hw_reg_fix_power_index(power_idx);
2024
2025                         /* fill 1 OFDM rate's iwl_channel_power_info struct */
2026                         pwr_info->requested_power = pwr;
2027                         pwr_info->power_table_index = (u8) power_idx;
2028                         pwr_info->tpc.tx_gain =
2029                             power_gain_table[a_band][power_idx].tx_gain;
2030                         pwr_info->tpc.dsp_atten =
2031                             power_gain_table[a_band][power_idx].dsp_atten;
2032                 }
2033
2034                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2035                 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX];
2036                 power = pwr_info->requested_power +
2037                         IWL_CCK_FROM_OFDM_POWER_DIFF;
2038                 pwr_index = pwr_info->power_table_index +
2039                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2040                 base_pwr_index = pwr_info->base_power_index +
2041                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2042
2043                 /* stay within table range */
2044                 pwr_index = iwl_hw_reg_fix_power_index(pwr_index);
2045                 gain = power_gain_table[a_band][pwr_index].tx_gain;
2046                 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2047
2048                 /* fill each CCK rate's iwl_channel_power_info structure
2049                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2050                  * NOTE:  CCK rates start at end of OFDM rates! */
2051                 for (rate_index = IWL_OFDM_RATES;
2052                      rate_index < IWL_RATE_COUNT; rate_index++) {
2053                         pwr_info = &ch_info->power_info[rate_index];
2054                         pwr_info->requested_power = power;
2055                         pwr_info->power_table_index = pwr_index;
2056                         pwr_info->base_power_index = base_pwr_index;
2057                         pwr_info->tpc.tx_gain = gain;
2058                         pwr_info->tpc.dsp_atten = dsp_atten;
2059                 }
2060
2061                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2062                 for (scan_tbl_index = 0;
2063                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2064                         s32 actual_index = (scan_tbl_index == 0) ?
2065                                 IWL_RATE_1M_INDEX : IWL_RATE_6M_INDEX;
2066                         iwl_hw_reg_set_scan_power(priv, scan_tbl_index,
2067                                 actual_index, clip_pwrs, ch_info, a_band);
2068                 }
2069         }
2070
2071         return 0;
2072 }
2073
2074 int iwl_hw_rxq_stop(struct iwl_priv *priv)
2075 {
2076         int rc;
2077         unsigned long flags;
2078
2079         spin_lock_irqsave(&priv->lock, flags);
2080         rc = iwl_grab_restricted_access(priv);
2081         if (rc) {
2082                 spin_unlock_irqrestore(&priv->lock, flags);
2083                 return rc;
2084         }
2085
2086         iwl_write_restricted(priv, FH_RCSR_CONFIG(0), 0);
2087         rc = iwl_poll_restricted_bit(priv, FH_RSSR_STATUS, (1 << 24), 1000);
2088         if (rc < 0)
2089                 IWL_ERROR("Can't stop Rx DMA.\n");
2090
2091         iwl_release_restricted_access(priv);
2092         spin_unlock_irqrestore(&priv->lock, flags);
2093
2094         return 0;
2095 }
2096
2097 int iwl_hw_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq)
2098 {
2099         int rc;
2100         unsigned long flags;
2101         int txq_id = txq->q.id;
2102
2103         struct iwl_shared *shared_data = priv->hw_setting.shared_virt;
2104
2105         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2106
2107         spin_lock_irqsave(&priv->lock, flags);
2108         rc = iwl_grab_restricted_access(priv);
2109         if (rc) {
2110                 spin_unlock_irqrestore(&priv->lock, flags);
2111                 return rc;
2112         }
2113         iwl_write_restricted(priv, FH_CBCC_CTRL(txq_id), 0);
2114         iwl_write_restricted(priv, FH_CBCC_BASE(txq_id), 0);
2115
2116         iwl_write_restricted(priv, FH_TCSR_CONFIG(txq_id),
2117                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2118                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2119                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2120                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2121                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2122         iwl_release_restricted_access(priv);
2123
2124         /* fake read to flush all prev. writes */
2125         iwl_read32(priv, FH_TSSR_CBB_BASE);
2126         spin_unlock_irqrestore(&priv->lock, flags);
2127
2128         return 0;
2129 }
2130
2131 int iwl_hw_get_rx_read(struct iwl_priv *priv)
2132 {
2133         struct iwl_shared *shared_data = priv->hw_setting.shared_virt;
2134
2135         return le32_to_cpu(shared_data->rx_read_ptr[0]);
2136 }
2137
2138 /**
2139  * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2140  */
2141 int iwl3945_init_hw_rate_table(struct iwl_priv *priv)
2142 {
2143         int rc, i;
2144         struct iwl_rate_scaling_cmd rate_cmd = {
2145                 .reserved = {0, 0, 0},
2146         };
2147         struct iwl_rate_scaling_info *table = rate_cmd.table;
2148
2149         for (i = 0; i < ARRAY_SIZE(iwl_rates); i++) {
2150                 table[i].rate_n_flags =
2151                         iwl_hw_set_rate_n_flags(iwl_rates[i].plcp, 0);
2152                 table[i].try_cnt = priv->retry_rate;
2153                 table[i].next_rate_index = iwl_get_prev_ieee_rate(i);
2154         }
2155
2156         switch (priv->phymode) {
2157         case MODE_IEEE80211A:
2158                 IWL_DEBUG_RATE("Select A mode rate scale\n");
2159                 /* If one of the following CCK rates is used,
2160                  * have it fall back to the 6M OFDM rate */
2161                 for (i = IWL_FIRST_CCK_RATE; i <= IWL_LAST_CCK_RATE; i++)
2162                         table[i].next_rate_index = IWL_FIRST_OFDM_RATE;
2163
2164                 /* Don't fall back to CCK rates */
2165                 table[IWL_RATE_12M_INDEX].next_rate_index = IWL_RATE_9M_INDEX;
2166
2167                 /* Don't drop out of OFDM rates */
2168                 table[IWL_FIRST_OFDM_RATE].next_rate_index =
2169                     IWL_FIRST_OFDM_RATE;
2170                 break;
2171
2172         case MODE_IEEE80211B:
2173                 IWL_DEBUG_RATE("Select B mode rate scale\n");
2174                 /* If an OFDM rate is used, have it fall back to the
2175                  * 1M CCK rates */
2176                 for (i = IWL_FIRST_OFDM_RATE; i <= IWL_LAST_OFDM_RATE; i++)
2177                         table[i].next_rate_index = IWL_FIRST_CCK_RATE;
2178
2179                 /* CCK shouldn't fall back to OFDM... */
2180                 table[IWL_RATE_11M_INDEX].next_rate_index = IWL_RATE_5M_INDEX;
2181                 break;
2182
2183         default:
2184                 IWL_DEBUG_RATE("Select G mode rate scale\n");
2185                 break;
2186         }
2187
2188         /* Update the rate scaling for control frame Tx */
2189         rate_cmd.table_id = 0;
2190         rc = iwl_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2191                               &rate_cmd);
2192         if (rc)
2193                 return rc;
2194
2195         /* Update the rate scaling for data frame Tx */
2196         rate_cmd.table_id = 1;
2197         return iwl_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2198                                 &rate_cmd);
2199 }
2200
2201 int iwl_hw_set_hw_setting(struct iwl_priv *priv)
2202 {
2203         memset((void *)&priv->hw_setting, 0,
2204                sizeof(struct iwl_driver_hw_info));
2205
2206         priv->hw_setting.shared_virt =
2207             pci_alloc_consistent(priv->pci_dev,
2208                                  sizeof(struct iwl_shared),
2209                                  &priv->hw_setting.shared_phys);
2210
2211         if (!priv->hw_setting.shared_virt) {
2212                 IWL_ERROR("failed to allocate pci memory\n");
2213                 mutex_unlock(&priv->mutex);
2214                 return -ENOMEM;
2215         }
2216
2217         priv->hw_setting.ac_queue_count = AC_NUM;
2218         priv->hw_setting.rx_buffer_size = IWL_RX_BUF_SIZE;
2219         priv->hw_setting.tx_cmd_len = sizeof(struct iwl_tx_cmd);
2220         priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
2221         priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
2222         priv->hw_setting.cck_flag = 0;
2223         priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
2224         priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
2225         return 0;
2226 }
2227
2228 unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
2229                           struct iwl_frame *frame, u8 rate)
2230 {
2231         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
2232         unsigned int frame_size;
2233
2234         tx_beacon_cmd = (struct iwl_tx_beacon_cmd *)&frame->u;
2235         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2236
2237         tx_beacon_cmd->tx.sta_id = IWL3945_BROADCAST_ID;
2238         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2239
2240         frame_size = iwl_fill_beacon_frame(priv,
2241                                 tx_beacon_cmd->frame,
2242                                 BROADCAST_ADDR,
2243                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2244
2245         BUG_ON(frame_size > MAX_MPDU_SIZE);
2246         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2247
2248         tx_beacon_cmd->tx.rate = rate;
2249         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2250                                       TX_CMD_FLG_TSF_MSK);
2251
2252         /* supp_rates[0] == OFDM  */
2253         tx_beacon_cmd->tx.supp_rates[0] = IWL_OFDM_BASIC_RATES_MASK;
2254
2255         /* supp_rates[1] == CCK
2256          *
2257          * NOTE:  IWL_*_RATES_MASK are not in the order that supp_rates
2258          * expects so we have to shift them around.
2259          *
2260          * supp_rates expects:
2261          * CCK rates are bit0..3
2262          *
2263          * However IWL_*_RATES_MASK has:
2264          * CCK rates are bit8..11
2265          */
2266         tx_beacon_cmd->tx.supp_rates[1] =
2267                 (IWL_CCK_BASIC_RATES_MASK >> 8) & 0xF;
2268
2269         return (sizeof(struct iwl_tx_beacon_cmd) + frame_size);
2270 }
2271
2272 void iwl_hw_rx_handler_setup(struct iwl_priv *priv)
2273 {
2274         priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2275 }
2276
2277 void iwl_hw_setup_deferred_work(struct iwl_priv *priv)
2278 {
2279         INIT_DELAYED_WORK(&priv->thermal_periodic,
2280                           iwl3945_bg_reg_txpower_periodic);
2281 }
2282
2283 void iwl_hw_cancel_deferred_work(struct iwl_priv *priv)
2284 {
2285         cancel_delayed_work(&priv->thermal_periodic);
2286 }
2287
2288 struct pci_device_id iwl_hw_card_ids[] = {
2289         {0x8086, 0x4222, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2290         {0x8086, 0x4227, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2291         {0}
2292 };
2293
2294 inline int iwl_eeprom_aqcuire_semaphore(struct iwl_priv *priv)
2295 {
2296         _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
2297         return 0;
2298 }
2299
2300 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);