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e1000: Add device IDs of blade version of the 82571 quad port
[pv_ops_mirror.git] / drivers / net / e1000 / e1000_main.c
blobe7c8951f47fa94d3e0fae7551f5e6d84ef16676a
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30 #include <net/ip6_checksum.h>
31
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #ifndef CONFIG_E1000_NAPI
35 #define DRIVERNAPI
36 #else
37 #define DRIVERNAPI "-NAPI"
38 #endif
39 #define DRV_VERSION "7.3.20-k2"DRIVERNAPI
40 char e1000_driver_version[] = DRV_VERSION;
41 static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
42
43 /* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50 static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
76 INTEL_E1000_ETHERNET_DEVICE(0x1049),
77 INTEL_E1000_ETHERNET_DEVICE(0x104A),
78 INTEL_E1000_ETHERNET_DEVICE(0x104B),
79 INTEL_E1000_ETHERNET_DEVICE(0x104C),
80 INTEL_E1000_ETHERNET_DEVICE(0x104D),
81 INTEL_E1000_ETHERNET_DEVICE(0x105E),
82 INTEL_E1000_ETHERNET_DEVICE(0x105F),
83 INTEL_E1000_ETHERNET_DEVICE(0x1060),
84 INTEL_E1000_ETHERNET_DEVICE(0x1075),
85 INTEL_E1000_ETHERNET_DEVICE(0x1076),
86 INTEL_E1000_ETHERNET_DEVICE(0x1077),
87 INTEL_E1000_ETHERNET_DEVICE(0x1078),
88 INTEL_E1000_ETHERNET_DEVICE(0x1079),
89 INTEL_E1000_ETHERNET_DEVICE(0x107A),
90 INTEL_E1000_ETHERNET_DEVICE(0x107B),
91 INTEL_E1000_ETHERNET_DEVICE(0x107C),
92 INTEL_E1000_ETHERNET_DEVICE(0x107D),
93 INTEL_E1000_ETHERNET_DEVICE(0x107E),
94 INTEL_E1000_ETHERNET_DEVICE(0x107F),
95 INTEL_E1000_ETHERNET_DEVICE(0x108A),
96 INTEL_E1000_ETHERNET_DEVICE(0x108B),
97 INTEL_E1000_ETHERNET_DEVICE(0x108C),
98 INTEL_E1000_ETHERNET_DEVICE(0x1096),
99 INTEL_E1000_ETHERNET_DEVICE(0x1098),
100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
102 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
103 INTEL_E1000_ETHERNET_DEVICE(0x10A5),
104 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
105 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
106 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
107 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
108 INTEL_E1000_ETHERNET_DEVICE(0x10BC),
109 INTEL_E1000_ETHERNET_DEVICE(0x10C4),
110 INTEL_E1000_ETHERNET_DEVICE(0x10C5),
111 INTEL_E1000_ETHERNET_DEVICE(0x10D5),
112 INTEL_E1000_ETHERNET_DEVICE(0x10D9),
113 INTEL_E1000_ETHERNET_DEVICE(0x10DA),
114 /* required last entry */
115 {0,}
116 };
117
118 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
119
120 int e1000_up(struct e1000_adapter *adapter);
121 void e1000_down(struct e1000_adapter *adapter);
122 void e1000_reinit_locked(struct e1000_adapter *adapter);
123 void e1000_reset(struct e1000_adapter *adapter);
124 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
125 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
126 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
127 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
128 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
129 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
130 struct e1000_tx_ring *txdr);
131 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
132 struct e1000_rx_ring *rxdr);
133 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
134 struct e1000_tx_ring *tx_ring);
135 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
136 struct e1000_rx_ring *rx_ring);
137 void e1000_update_stats(struct e1000_adapter *adapter);
138
139 static int e1000_init_module(void);
140 static void e1000_exit_module(void);
141 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
142 static void __devexit e1000_remove(struct pci_dev *pdev);
143 static int e1000_alloc_queues(struct e1000_adapter *adapter);
144 static int e1000_sw_init(struct e1000_adapter *adapter);
145 static int e1000_open(struct net_device *netdev);
146 static int e1000_close(struct net_device *netdev);
147 static void e1000_configure_tx(struct e1000_adapter *adapter);
148 static void e1000_configure_rx(struct e1000_adapter *adapter);
149 static void e1000_setup_rctl(struct e1000_adapter *adapter);
150 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
151 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
152 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
153 struct e1000_tx_ring *tx_ring);
154 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
155 struct e1000_rx_ring *rx_ring);
156 static void e1000_set_multi(struct net_device *netdev);
157 static void e1000_update_phy_info(unsigned long data);
158 static void e1000_watchdog(unsigned long data);
159 static void e1000_82547_tx_fifo_stall(unsigned long data);
160 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
161 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
162 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
163 static int e1000_set_mac(struct net_device *netdev, void *p);
164 static irqreturn_t e1000_intr(int irq, void *data);
165 static irqreturn_t e1000_intr_msi(int irq, void *data);
166 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
167 struct e1000_tx_ring *tx_ring);
168 #ifdef CONFIG_E1000_NAPI
169 static int e1000_clean(struct net_device *poll_dev, int *budget);
170 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
171 struct e1000_rx_ring *rx_ring,
172 int *work_done, int work_to_do);
173 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
174 struct e1000_rx_ring *rx_ring,
175 int *work_done, int work_to_do);
176 #else
177 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
178 struct e1000_rx_ring *rx_ring);
179 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
180 struct e1000_rx_ring *rx_ring);
181 #endif
182 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
183 struct e1000_rx_ring *rx_ring,
184 int cleaned_count);
185 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
186 struct e1000_rx_ring *rx_ring,
187 int cleaned_count);
188 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
189 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
190 int cmd);
191 void e1000_set_ethtool_ops(struct net_device *netdev);
192 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
193 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
194 static void e1000_tx_timeout(struct net_device *dev);
195 static void e1000_reset_task(struct work_struct *work);
196 static void e1000_smartspeed(struct e1000_adapter *adapter);
197 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
198 struct sk_buff *skb);
199
200 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
201 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
202 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
203 static void e1000_restore_vlan(struct e1000_adapter *adapter);
204
205 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
206 #ifdef CONFIG_PM
207 static int e1000_resume(struct pci_dev *pdev);
208 #endif
209 static void e1000_shutdown(struct pci_dev *pdev);
210
211 #ifdef CONFIG_NET_POLL_CONTROLLER
212 /* for netdump / net console */
213 static void e1000_netpoll (struct net_device *netdev);
214 #endif
215
216 extern void e1000_check_options(struct e1000_adapter *adapter);
217
218 #define COPYBREAK_DEFAULT 256
219 static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
220 module_param(copybreak, uint, 0644);
221 MODULE_PARM_DESC(copybreak,
222 "Maximum size of packet that is copied to a new buffer on receive");
223
224 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
225 pci_channel_state_t state);
226 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
227 static void e1000_io_resume(struct pci_dev *pdev);
228
229 static struct pci_error_handlers e1000_err_handler = {
230 .error_detected = e1000_io_error_detected,
231 .slot_reset = e1000_io_slot_reset,
232 .resume = e1000_io_resume,
233 };
234
235 static struct pci_driver e1000_driver = {
236 .name = e1000_driver_name,
237 .id_table = e1000_pci_tbl,
238 .probe = e1000_probe,
239 .remove = __devexit_p(e1000_remove),
240 #ifdef CONFIG_PM
241 /* Power Managment Hooks */
242 .suspend = e1000_suspend,
243 .resume = e1000_resume,
244 #endif
245 .shutdown = e1000_shutdown,
246 .err_handler = &e1000_err_handler
247 };
248
249 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
250 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
251 MODULE_LICENSE("GPL");
252 MODULE_VERSION(DRV_VERSION);
253
254 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
255 module_param(debug, int, 0);
256 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
257
258 /**
259 * e1000_init_module - Driver Registration Routine
260 *
261 * e1000_init_module is the first routine called when the driver is
262 * loaded. All it does is register with the PCI subsystem.
263 **/
264
265 static int __init
266 e1000_init_module(void)
267 {
268 int ret;
269 printk(KERN_INFO "%s - version %s\n",
270 e1000_driver_string, e1000_driver_version);
271
272 printk(KERN_INFO "%s\n", e1000_copyright);
273
274 ret = pci_register_driver(&e1000_driver);
275 if (copybreak != COPYBREAK_DEFAULT) {
276 if (copybreak == 0)
277 printk(KERN_INFO "e1000: copybreak disabled\n");
278 else
279 printk(KERN_INFO "e1000: copybreak enabled for "
280 "packets <= %u bytes\n", copybreak);
281 }
282 return ret;
283 }
284
285 module_init(e1000_init_module);
286
287 /**
288 * e1000_exit_module - Driver Exit Cleanup Routine
289 *
290 * e1000_exit_module is called just before the driver is removed
291 * from memory.
292 **/
293
294 static void __exit
295 e1000_exit_module(void)
296 {
297 pci_unregister_driver(&e1000_driver);
298 }
299
300 module_exit(e1000_exit_module);
301
302 static int e1000_request_irq(struct e1000_adapter *adapter)
303 {
304 struct net_device *netdev = adapter->netdev;
305 void (*handler) = &e1000_intr;
306 int irq_flags = IRQF_SHARED;
307 int err;
308
309 if (adapter->hw.mac_type >= e1000_82571) {
310 adapter->have_msi = !pci_enable_msi(adapter->pdev);
311 if (adapter->have_msi) {
312 handler = &e1000_intr_msi;
313 irq_flags = 0;
314 }
315 }
316
317 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
318 netdev);
319 if (err) {
320 if (adapter->have_msi)
321 pci_disable_msi(adapter->pdev);
322 DPRINTK(PROBE, ERR,
323 "Unable to allocate interrupt Error: %d\n", err);
324 }
325
326 return err;
327 }
328
329 static void e1000_free_irq(struct e1000_adapter *adapter)
330 {
331 struct net_device *netdev = adapter->netdev;
332
333 free_irq(adapter->pdev->irq, netdev);
334
335 if (adapter->have_msi)
336 pci_disable_msi(adapter->pdev);
337 }
338
339 /**
340 * e1000_irq_disable - Mask off interrupt generation on the NIC
341 * @adapter: board private structure
342 **/
343
344 static void
345 e1000_irq_disable(struct e1000_adapter *adapter)
346 {
347 atomic_inc(&adapter->irq_sem);
348 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
349 E1000_WRITE_FLUSH(&adapter->hw);
350 synchronize_irq(adapter->pdev->irq);
351 }
352
353 /**
354 * e1000_irq_enable - Enable default interrupt generation settings
355 * @adapter: board private structure
356 **/
357
358 static void
359 e1000_irq_enable(struct e1000_adapter *adapter)
360 {
361 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
362 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
363 E1000_WRITE_FLUSH(&adapter->hw);
364 }
365 }
366
367 static void
368 e1000_update_mng_vlan(struct e1000_adapter *adapter)
369 {
370 struct net_device *netdev = adapter->netdev;
371 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
372 uint16_t old_vid = adapter->mng_vlan_id;
373 if (adapter->vlgrp) {
374 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
375 if (adapter->hw.mng_cookie.status &
376 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
377 e1000_vlan_rx_add_vid(netdev, vid);
378 adapter->mng_vlan_id = vid;
379 } else
380 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
381
382 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
383 (vid != old_vid) &&
384 !vlan_group_get_device(adapter->vlgrp, old_vid))
385 e1000_vlan_rx_kill_vid(netdev, old_vid);
386 } else
387 adapter->mng_vlan_id = vid;
388 }
389 }
390
391 /**
392 * e1000_release_hw_control - release control of the h/w to f/w
393 * @adapter: address of board private structure
394 *
395 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
396 * For ASF and Pass Through versions of f/w this means that the
397 * driver is no longer loaded. For AMT version (only with 82573) i
398 * of the f/w this means that the network i/f is closed.
399 *
400 **/
401
402 static void
403 e1000_release_hw_control(struct e1000_adapter *adapter)
404 {
405 uint32_t ctrl_ext;
406 uint32_t swsm;
407
408 /* Let firmware taken over control of h/w */
409 switch (adapter->hw.mac_type) {
410 case e1000_82573:
411 swsm = E1000_READ_REG(&adapter->hw, SWSM);
412 E1000_WRITE_REG(&adapter->hw, SWSM,
413 swsm & ~E1000_SWSM_DRV_LOAD);
414 break;
415 case e1000_82571:
416 case e1000_82572:
417 case e1000_80003es2lan:
418 case e1000_ich8lan:
419 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
420 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
421 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
422 break;
423 default:
424 break;
425 }
426 }
427
428 /**
429 * e1000_get_hw_control - get control of the h/w from f/w
430 * @adapter: address of board private structure
431 *
432 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
433 * For ASF and Pass Through versions of f/w this means that
434 * the driver is loaded. For AMT version (only with 82573)
435 * of the f/w this means that the network i/f is open.
436 *
437 **/
438
439 static void
440 e1000_get_hw_control(struct e1000_adapter *adapter)
441 {
442 uint32_t ctrl_ext;
443 uint32_t swsm;
444
445 /* Let firmware know the driver has taken over */
446 switch (adapter->hw.mac_type) {
447 case e1000_82573:
448 swsm = E1000_READ_REG(&adapter->hw, SWSM);
449 E1000_WRITE_REG(&adapter->hw, SWSM,
450 swsm | E1000_SWSM_DRV_LOAD);
451 break;
452 case e1000_82571:
453 case e1000_82572:
454 case e1000_80003es2lan:
455 case e1000_ich8lan:
456 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
457 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
458 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
459 break;
460 default:
461 break;
462 }
463 }
464
465 static void
466 e1000_init_manageability(struct e1000_adapter *adapter)
467 {
468 if (adapter->en_mng_pt) {
469 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
470
471 /* disable hardware interception of ARP */
472 manc &= ~(E1000_MANC_ARP_EN);
473
474 /* enable receiving management packets to the host */
475 /* this will probably generate destination unreachable messages
476 * from the host OS, but the packets will be handled on SMBUS */
477 if (adapter->hw.has_manc2h) {
478 uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
479
480 manc |= E1000_MANC_EN_MNG2HOST;
481 #define E1000_MNG2HOST_PORT_623 (1 << 5)
482 #define E1000_MNG2HOST_PORT_664 (1 << 6)
483 manc2h |= E1000_MNG2HOST_PORT_623;
484 manc2h |= E1000_MNG2HOST_PORT_664;
485 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
486 }
487
488 E1000_WRITE_REG(&adapter->hw, MANC, manc);
489 }
490 }
491
492 static void
493 e1000_release_manageability(struct e1000_adapter *adapter)
494 {
495 if (adapter->en_mng_pt) {
496 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
497
498 /* re-enable hardware interception of ARP */
499 manc |= E1000_MANC_ARP_EN;
500
501 if (adapter->hw.has_manc2h)
502 manc &= ~E1000_MANC_EN_MNG2HOST;
503
504 /* don't explicitly have to mess with MANC2H since
505 * MANC has an enable disable that gates MANC2H */
506
507 E1000_WRITE_REG(&adapter->hw, MANC, manc);
508 }
509 }
510
511 /**
512 * e1000_configure - configure the hardware for RX and TX
513 * @adapter = private board structure
514 **/
515 static void e1000_configure(struct e1000_adapter *adapter)
516 {
517 struct net_device *netdev = adapter->netdev;
518 int i;
519
520 e1000_set_multi(netdev);
521
522 e1000_restore_vlan(adapter);
523 e1000_init_manageability(adapter);
524
525 e1000_configure_tx(adapter);
526 e1000_setup_rctl(adapter);
527 e1000_configure_rx(adapter);
528 /* call E1000_DESC_UNUSED which always leaves
529 * at least 1 descriptor unused to make sure
530 * next_to_use != next_to_clean */
531 for (i = 0; i < adapter->num_rx_queues; i++) {
532 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
533 adapter->alloc_rx_buf(adapter, ring,
534 E1000_DESC_UNUSED(ring));
535 }
536
537 adapter->tx_queue_len = netdev->tx_queue_len;
538 }
539
540 int e1000_up(struct e1000_adapter *adapter)
541 {
542 /* hardware has been reset, we need to reload some things */
543 e1000_configure(adapter);
544
545 clear_bit(__E1000_DOWN, &adapter->flags);
546
547 #ifdef CONFIG_E1000_NAPI
548 netif_poll_enable(adapter->netdev);
549 #endif
550 e1000_irq_enable(adapter);
551
552 /* fire a link change interrupt to start the watchdog */
553 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
554 return 0;
555 }
556
557 /**
558 * e1000_power_up_phy - restore link in case the phy was powered down
559 * @adapter: address of board private structure
560 *
561 * The phy may be powered down to save power and turn off link when the
562 * driver is unloaded and wake on lan is not enabled (among others)
563 * *** this routine MUST be followed by a call to e1000_reset ***
564 *
565 **/
566
567 void e1000_power_up_phy(struct e1000_adapter *adapter)
568 {
569 uint16_t mii_reg = 0;
570
571 /* Just clear the power down bit to wake the phy back up */
572 if (adapter->hw.media_type == e1000_media_type_copper) {
573 /* according to the manual, the phy will retain its
574 * settings across a power-down/up cycle */
575 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
576 mii_reg &= ~MII_CR_POWER_DOWN;
577 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
578 }
579 }
580
581 static void e1000_power_down_phy(struct e1000_adapter *adapter)
582 {
583 /* Power down the PHY so no link is implied when interface is down *
584 * The PHY cannot be powered down if any of the following is TRUE *
585 * (a) WoL is enabled
586 * (b) AMT is active
587 * (c) SoL/IDER session is active */
588 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
589 adapter->hw.media_type == e1000_media_type_copper) {
590 uint16_t mii_reg = 0;
591
592 switch (adapter->hw.mac_type) {
593 case e1000_82540:
594 case e1000_82545:
595 case e1000_82545_rev_3:
596 case e1000_82546:
597 case e1000_82546_rev_3:
598 case e1000_82541:
599 case e1000_82541_rev_2:
600 case e1000_82547:
601 case e1000_82547_rev_2:
602 if (E1000_READ_REG(&adapter->hw, MANC) &
603 E1000_MANC_SMBUS_EN)
604 goto out;
605 break;
606 case e1000_82571:
607 case e1000_82572:
608 case e1000_82573:
609 case e1000_80003es2lan:
610 case e1000_ich8lan:
611 if (e1000_check_mng_mode(&adapter->hw) ||
612 e1000_check_phy_reset_block(&adapter->hw))
613 goto out;
614 break;
615 default:
616 goto out;
617 }
618 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
619 mii_reg |= MII_CR_POWER_DOWN;
620 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
621 mdelay(1);
622 }
623 out:
624 return;
625 }
626
627 void
628 e1000_down(struct e1000_adapter *adapter)
629 {
630 struct net_device *netdev = adapter->netdev;
631
632 /* signal that we're down so the interrupt handler does not
633 * reschedule our watchdog timer */
634 set_bit(__E1000_DOWN, &adapter->flags);
635
636 #ifdef CONFIG_E1000_NAPI
637 netif_poll_disable(netdev);
638 #endif
639 e1000_irq_disable(adapter);
640
641 del_timer_sync(&adapter->tx_fifo_stall_timer);
642 del_timer_sync(&adapter->watchdog_timer);
643 del_timer_sync(&adapter->phy_info_timer);
644
645 netdev->tx_queue_len = adapter->tx_queue_len;
646 adapter->link_speed = 0;
647 adapter->link_duplex = 0;
648 netif_carrier_off(netdev);
649 netif_stop_queue(netdev);
650
651 e1000_reset(adapter);
652 e1000_clean_all_tx_rings(adapter);
653 e1000_clean_all_rx_rings(adapter);
654 }
655
656 void
657 e1000_reinit_locked(struct e1000_adapter *adapter)
658 {
659 WARN_ON(in_interrupt());
660 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
661 msleep(1);
662 e1000_down(adapter);
663 e1000_up(adapter);
664 clear_bit(__E1000_RESETTING, &adapter->flags);
665 }
666
667 void
668 e1000_reset(struct e1000_adapter *adapter)
669 {
670 uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
671 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
672 boolean_t legacy_pba_adjust = FALSE;
673
674 /* Repartition Pba for greater than 9k mtu
675 * To take effect CTRL.RST is required.
676 */
677
678 switch (adapter->hw.mac_type) {
679 case e1000_82542_rev2_0:
680 case e1000_82542_rev2_1:
681 case e1000_82543:
682 case e1000_82544:
683 case e1000_82540:
684 case e1000_82541:
685 case e1000_82541_rev_2:
686 legacy_pba_adjust = TRUE;
687 pba = E1000_PBA_48K;
688 break;
689 case e1000_82545:
690 case e1000_82545_rev_3:
691 case e1000_82546:
692 case e1000_82546_rev_3:
693 pba = E1000_PBA_48K;
694 break;
695 case e1000_82547:
696 case e1000_82547_rev_2:
697 legacy_pba_adjust = TRUE;
698 pba = E1000_PBA_30K;
699 break;
700 case e1000_82571:
701 case e1000_82572:
702 case e1000_80003es2lan:
703 pba = E1000_PBA_38K;
704 break;
705 case e1000_82573:
706 pba = E1000_PBA_20K;
707 break;
708 case e1000_ich8lan:
709 pba = E1000_PBA_8K;
710 case e1000_undefined:
711 case e1000_num_macs:
712 break;
713 }
714
715 if (legacy_pba_adjust == TRUE) {
716 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
717 pba -= 8; /* allocate more FIFO for Tx */
718
719 if (adapter->hw.mac_type == e1000_82547) {
720 adapter->tx_fifo_head = 0;
721 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
722 adapter->tx_fifo_size =
723 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
724 atomic_set(&adapter->tx_fifo_stall, 0);
725 }
726 } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
727 /* adjust PBA for jumbo frames */
728 E1000_WRITE_REG(&adapter->hw, PBA, pba);
729
730 /* To maintain wire speed transmits, the Tx FIFO should be
731 * large enough to accomodate two full transmit packets,
732 * rounded up to the next 1KB and expressed in KB. Likewise,
733 * the Rx FIFO should be large enough to accomodate at least
734 * one full receive packet and is similarly rounded up and
735 * expressed in KB. */
736 pba = E1000_READ_REG(&adapter->hw, PBA);
737 /* upper 16 bits has Tx packet buffer allocation size in KB */
738 tx_space = pba >> 16;
739 /* lower 16 bits has Rx packet buffer allocation size in KB */
740 pba &= 0xffff;
741 /* don't include ethernet FCS because hardware appends/strips */
742 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
743 VLAN_TAG_SIZE;
744 min_tx_space = min_rx_space;
745 min_tx_space *= 2;
746 min_tx_space = ALIGN(min_tx_space, 1024);
747 min_tx_space >>= 10;
748 min_rx_space = ALIGN(min_rx_space, 1024);
749 min_rx_space >>= 10;
750
751 /* If current Tx allocation is less than the min Tx FIFO size,
752 * and the min Tx FIFO size is less than the current Rx FIFO
753 * allocation, take space away from current Rx allocation */
754 if (tx_space < min_tx_space &&
755 ((min_tx_space - tx_space) < pba)) {
756 pba = pba - (min_tx_space - tx_space);
757
758 /* PCI/PCIx hardware has PBA alignment constraints */
759 switch (adapter->hw.mac_type) {
760 case e1000_82545 ... e1000_82546_rev_3:
761 pba &= ~(E1000_PBA_8K - 1);
762 break;
763 default:
764 break;
765 }
766
767 /* if short on rx space, rx wins and must trump tx
768 * adjustment or use Early Receive if available */
769 if (pba < min_rx_space) {
770 switch (adapter->hw.mac_type) {
771 case e1000_82573:
772 /* ERT enabled in e1000_configure_rx */
773 break;
774 default:
775 pba = min_rx_space;
776 break;
777 }
778 }
779 }
780 }
781
782 E1000_WRITE_REG(&adapter->hw, PBA, pba);
783
784 /* flow control settings */
785 /* Set the FC high water mark to 90% of the FIFO size.
786 * Required to clear last 3 LSB */
787 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
788 /* We can't use 90% on small FIFOs because the remainder
789 * would be less than 1 full frame. In this case, we size
790 * it to allow at least a full frame above the high water
791 * mark. */
792 if (pba < E1000_PBA_16K)
793 fc_high_water_mark = (pba * 1024) - 1600;
794
795 adapter->hw.fc_high_water = fc_high_water_mark;
796 adapter->hw.fc_low_water = fc_high_water_mark - 8;
797 if (adapter->hw.mac_type == e1000_80003es2lan)
798 adapter->hw.fc_pause_time = 0xFFFF;
799 else
800 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
801 adapter->hw.fc_send_xon = 1;
802 adapter->hw.fc = adapter->hw.original_fc;
803
804 /* Allow time for pending master requests to run */
805 e1000_reset_hw(&adapter->hw);
806 if (adapter->hw.mac_type >= e1000_82544)
807 E1000_WRITE_REG(&adapter->hw, WUC, 0);
808
809 if (e1000_init_hw(&adapter->hw))
810 DPRINTK(PROBE, ERR, "Hardware Error\n");
811 e1000_update_mng_vlan(adapter);
812
813 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
814 if (adapter->hw.mac_type >= e1000_82544 &&
815 adapter->hw.mac_type <= e1000_82547_rev_2 &&
816 adapter->hw.autoneg == 1 &&
817 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
818 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
819 /* clear phy power management bit if we are in gig only mode,
820 * which if enabled will attempt negotiation to 100Mb, which
821 * can cause a loss of link at power off or driver unload */
822 ctrl &= ~E1000_CTRL_SWDPIN3;
823 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
824 }
825
826 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
827 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
828
829 e1000_reset_adaptive(&adapter->hw);
830 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
831
832 if (!adapter->smart_power_down &&
833 (adapter->hw.mac_type == e1000_82571 ||
834 adapter->hw.mac_type == e1000_82572)) {
835 uint16_t phy_data = 0;
836 /* speed up time to link by disabling smart power down, ignore
837 * the return value of this function because there is nothing
838 * different we would do if it failed */
839 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
840 &phy_data);
841 phy_data &= ~IGP02E1000_PM_SPD;
842 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
843 phy_data);
844 }
845
846 e1000_release_manageability(adapter);
847 }
848
849 /**
850 * e1000_probe - Device Initialization Routine
851 * @pdev: PCI device information struct
852 * @ent: entry in e1000_pci_tbl
853 *
854 * Returns 0 on success, negative on failure
855 *
856 * e1000_probe initializes an adapter identified by a pci_dev structure.
857 * The OS initialization, configuring of the adapter private structure,
858 * and a hardware reset occur.
859 **/
860
861 static int __devinit
862 e1000_probe(struct pci_dev *pdev,
863 const struct pci_device_id *ent)
864 {
865 struct net_device *netdev;
866 struct e1000_adapter *adapter;
867 unsigned long mmio_start, mmio_len;
868 unsigned long flash_start, flash_len;
869
870 static int cards_found = 0;
871 static int global_quad_port_a = 0; /* global ksp3 port a indication */
872 int i, err, pci_using_dac;
873 uint16_t eeprom_data = 0;
874 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
875 if ((err = pci_enable_device(pdev)))
876 return err;
877
878 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
879 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
880 pci_using_dac = 1;
881 } else {
882 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
883 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
884 E1000_ERR("No usable DMA configuration, aborting\n");
885 goto err_dma;
886 }
887 pci_using_dac = 0;
888 }
889
890 if ((err = pci_request_regions(pdev, e1000_driver_name)))
891 goto err_pci_reg;
892
893 pci_set_master(pdev);
894
895 err = -ENOMEM;
896 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
897 if (!netdev)
898 goto err_alloc_etherdev;
899
900 SET_MODULE_OWNER(netdev);
901 SET_NETDEV_DEV(netdev, &pdev->dev);
902
903 pci_set_drvdata(pdev, netdev);
904 adapter = netdev_priv(netdev);
905 adapter->netdev = netdev;
906 adapter->pdev = pdev;
907 adapter->hw.back = adapter;
908 adapter->msg_enable = (1 << debug) - 1;
909
910 mmio_start = pci_resource_start(pdev, BAR_0);
911 mmio_len = pci_resource_len(pdev, BAR_0);
912
913 err = -EIO;
914 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
915 if (!adapter->hw.hw_addr)
916 goto err_ioremap;
917
918 for (i = BAR_1; i <= BAR_5; i++) {
919 if (pci_resource_len(pdev, i) == 0)
920 continue;
921 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
922 adapter->hw.io_base = pci_resource_start(pdev, i);
923 break;
924 }
925 }
926
927 netdev->open = &e1000_open;
928 netdev->stop = &e1000_close;
929 netdev->hard_start_xmit = &e1000_xmit_frame;
930 netdev->get_stats = &e1000_get_stats;
931 netdev->set_multicast_list = &e1000_set_multi;
932 netdev->set_mac_address = &e1000_set_mac;
933 netdev->change_mtu = &e1000_change_mtu;
934 netdev->do_ioctl = &e1000_ioctl;
935 e1000_set_ethtool_ops(netdev);
936 netdev->tx_timeout = &e1000_tx_timeout;
937 netdev->watchdog_timeo = 5 * HZ;
938 #ifdef CONFIG_E1000_NAPI
939 netdev->poll = &e1000_clean;
940 netdev->weight = 64;
941 #endif
942 netdev->vlan_rx_register = e1000_vlan_rx_register;
943 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
944 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
945 #ifdef CONFIG_NET_POLL_CONTROLLER
946 netdev->poll_controller = e1000_netpoll;
947 #endif
948 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
949
950 netdev->mem_start = mmio_start;
951 netdev->mem_end = mmio_start + mmio_len;
952 netdev->base_addr = adapter->hw.io_base;
953
954 adapter->bd_number = cards_found;
955
956 /* setup the private structure */
957
958 if ((err = e1000_sw_init(adapter)))
959 goto err_sw_init;
960
961 err = -EIO;
962 /* Flash BAR mapping must happen after e1000_sw_init
963 * because it depends on mac_type */
964 if ((adapter->hw.mac_type == e1000_ich8lan) &&
965 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
966 flash_start = pci_resource_start(pdev, 1);
967 flash_len = pci_resource_len(pdev, 1);
968 adapter->hw.flash_address = ioremap(flash_start, flash_len);
969 if (!adapter->hw.flash_address)
970 goto err_flashmap;
971 }
972
973 if (e1000_check_phy_reset_block(&adapter->hw))
974 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
975
976 if (adapter->hw.mac_type >= e1000_82543) {
977 netdev->features = NETIF_F_SG |
978 NETIF_F_HW_CSUM |
979 NETIF_F_HW_VLAN_TX |
980 NETIF_F_HW_VLAN_RX |
981 NETIF_F_HW_VLAN_FILTER;
982 if (adapter->hw.mac_type == e1000_ich8lan)
983 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
984 }
985
986 if ((adapter->hw.mac_type >= e1000_82544) &&
987 (adapter->hw.mac_type != e1000_82547))
988 netdev->features |= NETIF_F_TSO;
989
990 if (adapter->hw.mac_type > e1000_82547_rev_2)
991 netdev->features |= NETIF_F_TSO6;
992 if (pci_using_dac)
993 netdev->features |= NETIF_F_HIGHDMA;
994
995 netdev->features |= NETIF_F_LLTX;
996
997 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
998
999 /* initialize eeprom parameters */
1000
1001 if (e1000_init_eeprom_params(&adapter->hw)) {
1002 E1000_ERR("EEPROM initialization failed\n");
1003 goto err_eeprom;
1004 }
1005
1006 /* before reading the EEPROM, reset the controller to
1007 * put the device in a known good starting state */
1008
1009 e1000_reset_hw(&adapter->hw);
1010
1011 /* make sure the EEPROM is good */
1012
1013 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1014 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1015 goto err_eeprom;
1016 }
1017
1018 /* copy the MAC address out of the EEPROM */
1019
1020 if (e1000_read_mac_addr(&adapter->hw))
1021 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1022 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
1023 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1024
1025 if (!is_valid_ether_addr(netdev->perm_addr)) {
1026 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1027 goto err_eeprom;
1028 }
1029
1030 e1000_get_bus_info(&adapter->hw);
1031
1032 init_timer(&adapter->tx_fifo_stall_timer);
1033 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1034 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
1035
1036 init_timer(&adapter->watchdog_timer);
1037 adapter->watchdog_timer.function = &e1000_watchdog;
1038 adapter->watchdog_timer.data = (unsigned long) adapter;
1039
1040 init_timer(&adapter->phy_info_timer);
1041 adapter->phy_info_timer.function = &e1000_update_phy_info;
1042 adapter->phy_info_timer.data = (unsigned long) adapter;
1043
1044 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1045
1046 e1000_check_options(adapter);
1047
1048 /* Initial Wake on LAN setting
1049 * If APM wake is enabled in the EEPROM,
1050 * enable the ACPI Magic Packet filter
1051 */
1052
1053 switch (adapter->hw.mac_type) {
1054 case e1000_82542_rev2_0:
1055 case e1000_82542_rev2_1:
1056 case e1000_82543:
1057 break;
1058 case e1000_82544:
1059 e1000_read_eeprom(&adapter->hw,
1060 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1061 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1062 break;
1063 case e1000_ich8lan:
1064 e1000_read_eeprom(&adapter->hw,
1065 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1066 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1067 break;
1068 case e1000_82546:
1069 case e1000_82546_rev_3:
1070 case e1000_82571:
1071 case e1000_80003es2lan:
1072 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1073 e1000_read_eeprom(&adapter->hw,
1074 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1075 break;
1076 }
1077 /* Fall Through */
1078 default:
1079 e1000_read_eeprom(&adapter->hw,
1080 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1081 break;
1082 }
1083 if (eeprom_data & eeprom_apme_mask)
1084 adapter->eeprom_wol |= E1000_WUFC_MAG;
1085
1086 /* now that we have the eeprom settings, apply the special cases
1087 * where the eeprom may be wrong or the board simply won't support
1088 * wake on lan on a particular port */
1089 switch (pdev->device) {
1090 case E1000_DEV_ID_82546GB_PCIE:
1091 adapter->eeprom_wol = 0;
1092 break;
1093 case E1000_DEV_ID_82546EB_FIBER:
1094 case E1000_DEV_ID_82546GB_FIBER:
1095 case E1000_DEV_ID_82571EB_FIBER:
1096 /* Wake events only supported on port A for dual fiber
1097 * regardless of eeprom setting */
1098 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1099 adapter->eeprom_wol = 0;
1100 break;
1101 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1102 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1103 case E1000_DEV_ID_82571EB_QUAD_FIBER:
1104 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1105 case E1000_DEV_ID_82571PT_QUAD_COPPER:
1106 /* if quad port adapter, disable WoL on all but port A */
1107 if (global_quad_port_a != 0)
1108 adapter->eeprom_wol = 0;
1109 else
1110 adapter->quad_port_a = 1;
1111 /* Reset for multiple quad port adapters */
1112 if (++global_quad_port_a == 4)
1113 global_quad_port_a = 0;
1114 break;
1115 }
1116
1117 /* initialize the wol settings based on the eeprom settings */
1118 adapter->wol = adapter->eeprom_wol;
1119
1120 /* print bus type/speed/width info */
1121 {
1122 struct e1000_hw *hw = &adapter->hw;
1123 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1124 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1125 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1126 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1127 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1128 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1129 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1130 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1131 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1132 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1133 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1134 "32-bit"));
1135 }
1136
1137 for (i = 0; i < 6; i++)
1138 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1139
1140 /* reset the hardware with the new settings */
1141 e1000_reset(adapter);
1142
1143 /* If the controller is 82573 and f/w is AMT, do not set
1144 * DRV_LOAD until the interface is up. For all other cases,
1145 * let the f/w know that the h/w is now under the control
1146 * of the driver. */
1147 if (adapter->hw.mac_type != e1000_82573 ||
1148 !e1000_check_mng_mode(&adapter->hw))
1149 e1000_get_hw_control(adapter);
1150
1151 /* tell the stack to leave us alone until e1000_open() is called */
1152 netif_carrier_off(netdev);
1153 netif_stop_queue(netdev);
1154 #ifdef CONFIG_E1000_NAPI
1155 netif_poll_disable(netdev);
1156 #endif
1157
1158 strcpy(netdev->name, "eth%d");
1159 if ((err = register_netdev(netdev)))
1160 goto err_register;
1161
1162 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1163
1164 cards_found++;
1165 return 0;
1166
1167 err_register:
1168 e1000_release_hw_control(adapter);
1169 err_eeprom:
1170 if (!e1000_check_phy_reset_block(&adapter->hw))
1171 e1000_phy_hw_reset(&adapter->hw);
1172
1173 if (adapter->hw.flash_address)
1174 iounmap(adapter->hw.flash_address);
1175 err_flashmap:
1176 #ifdef CONFIG_E1000_NAPI
1177 for (i = 0; i < adapter->num_rx_queues; i++)
1178 dev_put(&adapter->polling_netdev[i]);
1179 #endif
1180
1181 kfree(adapter->tx_ring);
1182 kfree(adapter->rx_ring);
1183 #ifdef CONFIG_E1000_NAPI
1184 kfree(adapter->polling_netdev);
1185 #endif
1186 err_sw_init:
1187 iounmap(adapter->hw.hw_addr);
1188 err_ioremap:
1189 free_netdev(netdev);
1190 err_alloc_etherdev:
1191 pci_release_regions(pdev);
1192 err_pci_reg:
1193 err_dma:
1194 pci_disable_device(pdev);
1195 return err;
1196 }
1197
1198 /**
1199 * e1000_remove - Device Removal Routine
1200 * @pdev: PCI device information struct
1201 *
1202 * e1000_remove is called by the PCI subsystem to alert the driver
1203 * that it should release a PCI device. The could be caused by a
1204 * Hot-Plug event, or because the driver is going to be removed from
1205 * memory.
1206 **/
1207
1208 static void __devexit
1209 e1000_remove(struct pci_dev *pdev)
1210 {
1211 struct net_device *netdev = pci_get_drvdata(pdev);
1212 struct e1000_adapter *adapter = netdev_priv(netdev);
1213 #ifdef CONFIG_E1000_NAPI
1214 int i;
1215 #endif
1216
1217 cancel_work_sync(&adapter->reset_task);
1218
1219 e1000_release_manageability(adapter);
1220
1221 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1222 * would have already happened in close and is redundant. */
1223 e1000_release_hw_control(adapter);
1224
1225 unregister_netdev(netdev);
1226 #ifdef CONFIG_E1000_NAPI
1227 for (i = 0; i < adapter->num_rx_queues; i++)
1228 dev_put(&adapter->polling_netdev[i]);
1229 #endif
1230
1231 if (!e1000_check_phy_reset_block(&adapter->hw))
1232 e1000_phy_hw_reset(&adapter->hw);
1233
1234 kfree(adapter->tx_ring);
1235 kfree(adapter->rx_ring);
1236 #ifdef CONFIG_E1000_NAPI
1237 kfree(adapter->polling_netdev);
1238 #endif
1239
1240 iounmap(adapter->hw.hw_addr);
1241 if (adapter->hw.flash_address)
1242 iounmap(adapter->hw.flash_address);
1243 pci_release_regions(pdev);
1244
1245 free_netdev(netdev);
1246
1247 pci_disable_device(pdev);
1248 }
1249
1250 /**
1251 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1252 * @adapter: board private structure to initialize
1253 *
1254 * e1000_sw_init initializes the Adapter private data structure.
1255 * Fields are initialized based on PCI device information and
1256 * OS network device settings (MTU size).
1257 **/
1258
1259 static int __devinit
1260 e1000_sw_init(struct e1000_adapter *adapter)
1261 {
1262 struct e1000_hw *hw = &adapter->hw;
1263 struct net_device *netdev = adapter->netdev;
1264 struct pci_dev *pdev = adapter->pdev;
1265 #ifdef CONFIG_E1000_NAPI
1266 int i;
1267 #endif
1268
1269 /* PCI config space info */
1270
1271 hw->vendor_id = pdev->vendor;
1272 hw->device_id = pdev->device;
1273 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1274 hw->subsystem_id = pdev->subsystem_device;
1275 hw->revision_id = pdev->revision;
1276
1277 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1278
1279 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1280 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1281 hw->max_frame_size = netdev->mtu +
1282 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1283 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1284
1285 /* identify the MAC */
1286
1287 if (e1000_set_mac_type(hw)) {
1288 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1289 return -EIO;
1290 }
1291
1292 switch (hw->mac_type) {
1293 default:
1294 break;
1295 case e1000_82541:
1296 case e1000_82547:
1297 case e1000_82541_rev_2:
1298 case e1000_82547_rev_2:
1299 hw->phy_init_script = 1;
1300 break;
1301 }
1302
1303 e1000_set_media_type(hw);
1304
1305 hw->wait_autoneg_complete = FALSE;
1306 hw->tbi_compatibility_en = TRUE;
1307 hw->adaptive_ifs = TRUE;
1308
1309 /* Copper options */
1310
1311 if (hw->media_type == e1000_media_type_copper) {
1312 hw->mdix = AUTO_ALL_MODES;
1313 hw->disable_polarity_correction = FALSE;
1314 hw->master_slave = E1000_MASTER_SLAVE;
1315 }
1316
1317 adapter->num_tx_queues = 1;
1318 adapter->num_rx_queues = 1;
1319
1320 if (e1000_alloc_queues(adapter)) {
1321 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1322 return -ENOMEM;
1323 }
1324
1325 #ifdef CONFIG_E1000_NAPI
1326 for (i = 0; i < adapter->num_rx_queues; i++) {
1327 adapter->polling_netdev[i].priv = adapter;
1328 adapter->polling_netdev[i].poll = &e1000_clean;
1329 adapter->polling_netdev[i].weight = 64;
1330 dev_hold(&adapter->polling_netdev[i]);
1331 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1332 }
1333 spin_lock_init(&adapter->tx_queue_lock);
1334 #endif
1335
1336 /* Explicitly disable IRQ since the NIC can be in any state. */
1337 atomic_set(&adapter->irq_sem, 0);
1338 e1000_irq_disable(adapter);
1339
1340 spin_lock_init(&adapter->stats_lock);
1341
1342 set_bit(__E1000_DOWN, &adapter->flags);
1343
1344 return 0;
1345 }
1346
1347 /**
1348 * e1000_alloc_queues - Allocate memory for all rings
1349 * @adapter: board private structure to initialize
1350 *
1351 * We allocate one ring per queue at run-time since we don't know the
1352 * number of queues at compile-time. The polling_netdev array is
1353 * intended for Multiqueue, but should work fine with a single queue.
1354 **/
1355
1356 static int __devinit
1357 e1000_alloc_queues(struct e1000_adapter *adapter)
1358 {
1359 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1360 sizeof(struct e1000_tx_ring), GFP_KERNEL);
1361 if (!adapter->tx_ring)
1362 return -ENOMEM;
1363
1364 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1365 sizeof(struct e1000_rx_ring), GFP_KERNEL);
1366 if (!adapter->rx_ring) {
1367 kfree(adapter->tx_ring);
1368 return -ENOMEM;
1369 }
1370
1371 #ifdef CONFIG_E1000_NAPI
1372 adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
1373 sizeof(struct net_device),
1374 GFP_KERNEL);
1375 if (!adapter->polling_netdev) {
1376 kfree(adapter->tx_ring);
1377 kfree(adapter->rx_ring);
1378 return -ENOMEM;
1379 }
1380 #endif
1381
1382 return E1000_SUCCESS;
1383 }
1384
1385 /**
1386 * e1000_open - Called when a network interface is made active
1387 * @netdev: network interface device structure
1388 *
1389 * Returns 0 on success, negative value on failure
1390 *
1391 * The open entry point is called when a network interface is made
1392 * active by the system (IFF_UP). At this point all resources needed
1393 * for transmit and receive operations are allocated, the interrupt
1394 * handler is registered with the OS, the watchdog timer is started,
1395 * and the stack is notified that the interface is ready.
1396 **/
1397
1398 static int
1399 e1000_open(struct net_device *netdev)
1400 {
1401 struct e1000_adapter *adapter = netdev_priv(netdev);
1402 int err;
1403
1404 /* disallow open during test */
1405 if (test_bit(__E1000_TESTING, &adapter->flags))
1406 return -EBUSY;
1407
1408 /* allocate transmit descriptors */
1409 err = e1000_setup_all_tx_resources(adapter);
1410 if (err)
1411 goto err_setup_tx;
1412
1413 /* allocate receive descriptors */
1414 err = e1000_setup_all_rx_resources(adapter);
1415 if (err)
1416 goto err_setup_rx;
1417
1418 e1000_power_up_phy(adapter);
1419
1420 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1421 if ((adapter->hw.mng_cookie.status &
1422 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1423 e1000_update_mng_vlan(adapter);
1424 }
1425
1426 /* If AMT is enabled, let the firmware know that the network
1427 * interface is now open */
1428 if (adapter->hw.mac_type == e1000_82573 &&
1429 e1000_check_mng_mode(&adapter->hw))
1430 e1000_get_hw_control(adapter);
1431
1432 /* before we allocate an interrupt, we must be ready to handle it.
1433 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1434 * as soon as we call pci_request_irq, so we have to setup our
1435 * clean_rx handler before we do so. */
1436 e1000_configure(adapter);
1437
1438 err = e1000_request_irq(adapter);
1439 if (err)
1440 goto err_req_irq;
1441
1442 /* From here on the code is the same as e1000_up() */
1443 clear_bit(__E1000_DOWN, &adapter->flags);
1444
1445 #ifdef CONFIG_E1000_NAPI
1446 netif_poll_enable(netdev);
1447 #endif
1448
1449 e1000_irq_enable(adapter);
1450
1451 /* fire a link status change interrupt to start the watchdog */
1452 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
1453
1454 return E1000_SUCCESS;
1455
1456 err_req_irq:
1457 e1000_release_hw_control(adapter);
1458 e1000_power_down_phy(adapter);
1459 e1000_free_all_rx_resources(adapter);
1460 err_setup_rx:
1461 e1000_free_all_tx_resources(adapter);
1462 err_setup_tx:
1463 e1000_reset(adapter);
1464
1465 return err;
1466 }
1467
1468 /**
1469 * e1000_close - Disables a network interface
1470 * @netdev: network interface device structure
1471 *
1472 * Returns 0, this is not allowed to fail
1473 *
1474 * The close entry point is called when an interface is de-activated
1475 * by the OS. The hardware is still under the drivers control, but
1476 * needs to be disabled. A global MAC reset is issued to stop the
1477 * hardware, and all transmit and receive resources are freed.
1478 **/
1479
1480 static int
1481 e1000_close(struct net_device *netdev)
1482 {
1483 struct e1000_adapter *adapter = netdev_priv(netdev);
1484
1485 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1486 e1000_down(adapter);
1487 e1000_power_down_phy(adapter);
1488 e1000_free_irq(adapter);
1489
1490 e1000_free_all_tx_resources(adapter);
1491 e1000_free_all_rx_resources(adapter);
1492
1493 /* kill manageability vlan ID if supported, but not if a vlan with
1494 * the same ID is registered on the host OS (let 8021q kill it) */
1495 if ((adapter->hw.mng_cookie.status &
1496 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1497 !(adapter->vlgrp &&
1498 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
1499 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1500 }
1501
1502 /* If AMT is enabled, let the firmware know that the network
1503 * interface is now closed */
1504 if (adapter->hw.mac_type == e1000_82573 &&
1505 e1000_check_mng_mode(&adapter->hw))
1506 e1000_release_hw_control(adapter);
1507
1508 return 0;
1509 }
1510
1511 /**
1512 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1513 * @adapter: address of board private structure
1514 * @start: address of beginning of memory
1515 * @len: length of memory
1516 **/
1517 static boolean_t
1518 e1000_check_64k_bound(struct e1000_adapter *adapter,
1519 void *start, unsigned long len)
1520 {
1521 unsigned long begin = (unsigned long) start;
1522 unsigned long end = begin + len;
1523
1524 /* First rev 82545 and 82546 need to not allow any memory
1525 * write location to cross 64k boundary due to errata 23 */
1526 if (adapter->hw.mac_type == e1000_82545 ||
1527 adapter->hw.mac_type == e1000_82546) {
1528 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1529 }
1530
1531 return TRUE;
1532 }
1533
1534 /**
1535 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1536 * @adapter: board private structure
1537 * @txdr: tx descriptor ring (for a specific queue) to setup
1538 *
1539 * Return 0 on success, negative on failure
1540 **/
1541
1542 static int
1543 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1544 struct e1000_tx_ring *txdr)
1545 {
1546 struct pci_dev *pdev = adapter->pdev;
1547 int size;
1548
1549 size = sizeof(struct e1000_buffer) * txdr->count;
1550 txdr->buffer_info = vmalloc(size);
1551 if (!txdr->buffer_info) {
1552 DPRINTK(PROBE, ERR,
1553 "Unable to allocate memory for the transmit descriptor ring\n");
1554 return -ENOMEM;
1555 }
1556 memset(txdr->buffer_info, 0, size);
1557
1558 /* round up to nearest 4K */
1559
1560 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1561 txdr->size = ALIGN(txdr->size, 4096);
1562
1563 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1564 if (!txdr->desc) {
1565 setup_tx_desc_die:
1566 vfree(txdr->buffer_info);
1567 DPRINTK(PROBE, ERR,
1568 "Unable to allocate memory for the transmit descriptor ring\n");
1569 return -ENOMEM;
1570 }
1571
1572 /* Fix for errata 23, can't cross 64kB boundary */
1573 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1574 void *olddesc = txdr->desc;
1575 dma_addr_t olddma = txdr->dma;
1576 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1577 "at %p\n", txdr->size, txdr->desc);
1578 /* Try again, without freeing the previous */
1579 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1580 /* Failed allocation, critical failure */
1581 if (!txdr->desc) {
1582 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1583 goto setup_tx_desc_die;
1584 }
1585
1586 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1587 /* give up */
1588 pci_free_consistent(pdev, txdr->size, txdr->desc,
1589 txdr->dma);
1590 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1591 DPRINTK(PROBE, ERR,
1592 "Unable to allocate aligned memory "
1593 "for the transmit descriptor ring\n");
1594 vfree(txdr->buffer_info);
1595 return -ENOMEM;
1596 } else {
1597 /* Free old allocation, new allocation was successful */
1598 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1599 }
1600 }
1601 memset(txdr->desc, 0, txdr->size);
1602
1603 txdr->next_to_use = 0;
1604 txdr->next_to_clean = 0;
1605 spin_lock_init(&txdr->tx_lock);
1606
1607 return 0;
1608 }
1609
1610 /**
1611 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1612 * (Descriptors) for all queues
1613 * @adapter: board private structure
1614 *
1615 * Return 0 on success, negative on failure
1616 **/
1617
1618 int
1619 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1620 {
1621 int i, err = 0;
1622
1623 for (i = 0; i < adapter->num_tx_queues; i++) {
1624 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1625 if (err) {
1626 DPRINTK(PROBE, ERR,
1627 "Allocation for Tx Queue %u failed\n", i);
1628 for (i-- ; i >= 0; i--)
1629 e1000_free_tx_resources(adapter,
1630 &adapter->tx_ring[i]);
1631 break;
1632 }
1633 }
1634
1635 return err;
1636 }
1637
1638 /**
1639 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1640 * @adapter: board private structure
1641 *
1642 * Configure the Tx unit of the MAC after a reset.
1643 **/
1644
1645 static void
1646 e1000_configure_tx(struct e1000_adapter *adapter)
1647 {
1648 uint64_t tdba;
1649 struct e1000_hw *hw = &adapter->hw;
1650 uint32_t tdlen, tctl, tipg, tarc;
1651 uint32_t ipgr1, ipgr2;
1652
1653 /* Setup the HW Tx Head and Tail descriptor pointers */
1654
1655 switch (adapter->num_tx_queues) {
1656 case 1:
1657 default:
1658 tdba = adapter->tx_ring[0].dma;
1659 tdlen = adapter->tx_ring[0].count *
1660 sizeof(struct e1000_tx_desc);
1661 E1000_WRITE_REG(hw, TDLEN, tdlen);
1662 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1663 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1664 E1000_WRITE_REG(hw, TDT, 0);
1665 E1000_WRITE_REG(hw, TDH, 0);
1666 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1667 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1668 break;
1669 }
1670
1671 /* Set the default values for the Tx Inter Packet Gap timer */
1672 if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
1673 (hw->media_type == e1000_media_type_fiber ||
1674 hw->media_type == e1000_media_type_internal_serdes))
1675 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1676 else
1677 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1678
1679 switch (hw->mac_type) {
1680 case e1000_82542_rev2_0:
1681 case e1000_82542_rev2_1:
1682 tipg = DEFAULT_82542_TIPG_IPGT;
1683 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1684 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1685 break;
1686 case e1000_80003es2lan:
1687 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1688 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1689 break;
1690 default:
1691 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1692 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1693 break;
1694 }
1695 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1696 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1697 E1000_WRITE_REG(hw, TIPG, tipg);
1698
1699 /* Set the Tx Interrupt Delay register */
1700
1701 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1702 if (hw->mac_type >= e1000_82540)
1703 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1704
1705 /* Program the Transmit Control Register */
1706
1707 tctl = E1000_READ_REG(hw, TCTL);
1708 tctl &= ~E1000_TCTL_CT;
1709 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1710 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1711
1712 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1713 tarc = E1000_READ_REG(hw, TARC0);
1714 /* set the speed mode bit, we'll clear it if we're not at
1715 * gigabit link later */
1716 tarc |= (1 << 21);
1717 E1000_WRITE_REG(hw, TARC0, tarc);
1718 } else if (hw->mac_type == e1000_80003es2lan) {
1719 tarc = E1000_READ_REG(hw, TARC0);
1720 tarc |= 1;
1721 E1000_WRITE_REG(hw, TARC0, tarc);
1722 tarc = E1000_READ_REG(hw, TARC1);
1723 tarc |= 1;
1724 E1000_WRITE_REG(hw, TARC1, tarc);
1725 }
1726
1727 e1000_config_collision_dist(hw);
1728
1729 /* Setup Transmit Descriptor Settings for eop descriptor */
1730 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1731
1732 /* only set IDE if we are delaying interrupts using the timers */
1733 if (adapter->tx_int_delay)
1734 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1735
1736 if (hw->mac_type < e1000_82543)
1737 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1738 else
1739 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1740
1741 /* Cache if we're 82544 running in PCI-X because we'll
1742 * need this to apply a workaround later in the send path. */
1743 if (hw->mac_type == e1000_82544 &&
1744 hw->bus_type == e1000_bus_type_pcix)
1745 adapter->pcix_82544 = 1;
1746
1747 E1000_WRITE_REG(hw, TCTL, tctl);
1748
1749 }
1750
1751 /**
1752 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1753 * @adapter: board private structure
1754 * @rxdr: rx descriptor ring (for a specific queue) to setup
1755 *
1756 * Returns 0 on success, negative on failure
1757 **/
1758
1759 static int
1760 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1761 struct e1000_rx_ring *rxdr)
1762 {
1763 struct pci_dev *pdev = adapter->pdev;
1764 int size, desc_len;
1765
1766 size = sizeof(struct e1000_buffer) * rxdr->count;
1767 rxdr->buffer_info = vmalloc(size);
1768 if (!rxdr->buffer_info) {
1769 DPRINTK(PROBE, ERR,
1770 "Unable to allocate memory for the receive descriptor ring\n");
1771 return -ENOMEM;
1772 }
1773 memset(rxdr->buffer_info, 0, size);
1774
1775 rxdr->ps_page = kcalloc(rxdr->count, sizeof(struct e1000_ps_page),
1776 GFP_KERNEL);
1777 if (!rxdr->ps_page) {
1778 vfree(rxdr->buffer_info);
1779 DPRINTK(PROBE, ERR,
1780 "Unable to allocate memory for the receive descriptor ring\n");
1781 return -ENOMEM;
1782 }
1783
1784 rxdr->ps_page_dma = kcalloc(rxdr->count,
1785 sizeof(struct e1000_ps_page_dma),
1786 GFP_KERNEL);
1787 if (!rxdr->ps_page_dma) {
1788 vfree(rxdr->buffer_info);
1789 kfree(rxdr->ps_page);
1790 DPRINTK(PROBE, ERR,
1791 "Unable to allocate memory for the receive descriptor ring\n");
1792 return -ENOMEM;
1793 }
1794
1795 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1796 desc_len = sizeof(struct e1000_rx_desc);
1797 else
1798 desc_len = sizeof(union e1000_rx_desc_packet_split);
1799
1800 /* Round up to nearest 4K */
1801
1802 rxdr->size = rxdr->count * desc_len;
1803 rxdr->size = ALIGN(rxdr->size, 4096);
1804
1805 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1806
1807 if (!rxdr->desc) {
1808 DPRINTK(PROBE, ERR,
1809 "Unable to allocate memory for the receive descriptor ring\n");
1810 setup_rx_desc_die:
1811 vfree(rxdr->buffer_info);
1812 kfree(rxdr->ps_page);
1813 kfree(rxdr->ps_page_dma);
1814 return -ENOMEM;
1815 }
1816
1817 /* Fix for errata 23, can't cross 64kB boundary */
1818 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1819 void *olddesc = rxdr->desc;
1820 dma_addr_t olddma = rxdr->dma;
1821 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1822 "at %p\n", rxdr->size, rxdr->desc);
1823 /* Try again, without freeing the previous */
1824 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1825 /* Failed allocation, critical failure */
1826 if (!rxdr->desc) {
1827 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1828 DPRINTK(PROBE, ERR,
1829 "Unable to allocate memory "
1830 "for the receive descriptor ring\n");
1831 goto setup_rx_desc_die;
1832 }
1833
1834 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1835 /* give up */
1836 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1837 rxdr->dma);
1838 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1839 DPRINTK(PROBE, ERR,
1840 "Unable to allocate aligned memory "
1841 "for the receive descriptor ring\n");
1842 goto setup_rx_desc_die;
1843 } else {
1844 /* Free old allocation, new allocation was successful */
1845 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1846 }
1847 }
1848 memset(rxdr->desc, 0, rxdr->size);
1849
1850 rxdr->next_to_clean = 0;
1851 rxdr->next_to_use = 0;
1852
1853 return 0;
1854 }
1855
1856 /**
1857 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1858 * (Descriptors) for all queues
1859 * @adapter: board private structure
1860 *
1861 * Return 0 on success, negative on failure
1862 **/
1863
1864 int
1865 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1866 {
1867 int i, err = 0;
1868
1869 for (i = 0; i < adapter->num_rx_queues; i++) {
1870 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1871 if (err) {
1872 DPRINTK(PROBE, ERR,
1873 "Allocation for Rx Queue %u failed\n", i);
1874 for (i-- ; i >= 0; i--)
1875 e1000_free_rx_resources(adapter,
1876 &adapter->rx_ring[i]);
1877 break;
1878 }
1879 }
1880
1881 return err;
1882 }
1883
1884 /**
1885 * e1000_setup_rctl - configure the receive control registers
1886 * @adapter: Board private structure
1887 **/
1888 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1889 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1890 static void
1891 e1000_setup_rctl(struct e1000_adapter *adapter)
1892 {
1893 uint32_t rctl, rfctl;
1894 uint32_t psrctl = 0;
1895 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1896 uint32_t pages = 0;
1897 #endif
1898
1899 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1900
1901 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1902
1903 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1904 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1905 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1906
1907 if (adapter->hw.tbi_compatibility_on == 1)
1908 rctl |= E1000_RCTL_SBP;
1909 else
1910 rctl &= ~E1000_RCTL_SBP;
1911
1912 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1913 rctl &= ~E1000_RCTL_LPE;
1914 else
1915 rctl |= E1000_RCTL_LPE;
1916
1917 /* Setup buffer sizes */
1918 rctl &= ~E1000_RCTL_SZ_4096;
1919 rctl |= E1000_RCTL_BSEX;
1920 switch (adapter->rx_buffer_len) {
1921 case E1000_RXBUFFER_256:
1922 rctl |= E1000_RCTL_SZ_256;
1923 rctl &= ~E1000_RCTL_BSEX;
1924 break;
1925 case E1000_RXBUFFER_512:
1926 rctl |= E1000_RCTL_SZ_512;
1927 rctl &= ~E1000_RCTL_BSEX;
1928 break;
1929 case E1000_RXBUFFER_1024:
1930 rctl |= E1000_RCTL_SZ_1024;
1931 rctl &= ~E1000_RCTL_BSEX;
1932 break;
1933 case E1000_RXBUFFER_2048:
1934 default:
1935 rctl |= E1000_RCTL_SZ_2048;
1936 rctl &= ~E1000_RCTL_BSEX;
1937 break;
1938 case E1000_RXBUFFER_4096:
1939 rctl |= E1000_RCTL_SZ_4096;
1940 break;
1941 case E1000_RXBUFFER_8192:
1942 rctl |= E1000_RCTL_SZ_8192;
1943 break;
1944 case E1000_RXBUFFER_16384:
1945 rctl |= E1000_RCTL_SZ_16384;
1946 break;
1947 }
1948
1949 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1950 /* 82571 and greater support packet-split where the protocol
1951 * header is placed in skb->data and the packet data is
1952 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1953 * In the case of a non-split, skb->data is linearly filled,
1954 * followed by the page buffers. Therefore, skb->data is
1955 * sized to hold the largest protocol header.
1956 */
1957 /* allocations using alloc_page take too long for regular MTU
1958 * so only enable packet split for jumbo frames */
1959 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1960 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1961 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
1962 adapter->rx_ps_pages = pages;
1963 else
1964 adapter->rx_ps_pages = 0;
1965 #endif
1966 if (adapter->rx_ps_pages) {
1967 /* Configure extra packet-split registers */
1968 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1969 rfctl |= E1000_RFCTL_EXTEN;
1970 /* disable packet split support for IPv6 extension headers,
1971 * because some malformed IPv6 headers can hang the RX */
1972 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1973 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1974
1975 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1976
1977 rctl |= E1000_RCTL_DTYP_PS;
1978
1979 psrctl |= adapter->rx_ps_bsize0 >>
1980 E1000_PSRCTL_BSIZE0_SHIFT;
1981
1982 switch (adapter->rx_ps_pages) {
1983 case 3:
1984 psrctl |= PAGE_SIZE <<
1985 E1000_PSRCTL_BSIZE3_SHIFT;
1986 case 2:
1987 psrctl |= PAGE_SIZE <<
1988 E1000_PSRCTL_BSIZE2_SHIFT;
1989 case 1:
1990 psrctl |= PAGE_SIZE >>
1991 E1000_PSRCTL_BSIZE1_SHIFT;
1992 break;
1993 }
1994
1995 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1996 }
1997
1998 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1999 }
2000
2001 /**
2002 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
2003 * @adapter: board private structure
2004 *
2005 * Configure the Rx unit of the MAC after a reset.
2006 **/
2007
2008 static void
2009 e1000_configure_rx(struct e1000_adapter *adapter)
2010 {
2011 uint64_t rdba;
2012 struct e1000_hw *hw = &adapter->hw;
2013 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2014
2015 if (adapter->rx_ps_pages) {
2016 /* this is a 32 byte descriptor */
2017 rdlen = adapter->rx_ring[0].count *
2018 sizeof(union e1000_rx_desc_packet_split);
2019 adapter->clean_rx = e1000_clean_rx_irq_ps;
2020 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2021 } else {
2022 rdlen = adapter->rx_ring[0].count *
2023 sizeof(struct e1000_rx_desc);
2024 adapter->clean_rx = e1000_clean_rx_irq;
2025 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2026 }
2027
2028 /* disable receives while setting up the descriptors */
2029 rctl = E1000_READ_REG(hw, RCTL);
2030 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
2031
2032 /* set the Receive Delay Timer Register */
2033 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
2034
2035 if (hw->mac_type >= e1000_82540) {
2036 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
2037 if (adapter->itr_setting != 0)
2038 E1000_WRITE_REG(hw, ITR,
2039 1000000000 / (adapter->itr * 256));
2040 }
2041
2042 if (hw->mac_type >= e1000_82571) {
2043 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
2044 /* Reset delay timers after every interrupt */
2045 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2046 #ifdef CONFIG_E1000_NAPI
2047 /* Auto-Mask interrupts upon ICR access */
2048 ctrl_ext |= E1000_CTRL_EXT_IAME;
2049 E1000_WRITE_REG(hw, IAM, 0xffffffff);
2050 #endif
2051 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
2052 E1000_WRITE_FLUSH(hw);
2053 }
2054
2055 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2056 * the Base and Length of the Rx Descriptor Ring */
2057 switch (adapter->num_rx_queues) {
2058 case 1:
2059 default:
2060 rdba = adapter->rx_ring[0].dma;
2061 E1000_WRITE_REG(hw, RDLEN, rdlen);
2062 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
2063 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
2064 E1000_WRITE_REG(hw, RDT, 0);
2065 E1000_WRITE_REG(hw, RDH, 0);
2066 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2067 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
2068 break;
2069 }
2070
2071 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2072 if (hw->mac_type >= e1000_82543) {
2073 rxcsum = E1000_READ_REG(hw, RXCSUM);
2074 if (adapter->rx_csum == TRUE) {
2075 rxcsum |= E1000_RXCSUM_TUOFL;
2076
2077 /* Enable 82571 IPv4 payload checksum for UDP fragments
2078 * Must be used in conjunction with packet-split. */
2079 if ((hw->mac_type >= e1000_82571) &&
2080 (adapter->rx_ps_pages)) {
2081 rxcsum |= E1000_RXCSUM_IPPCSE;
2082 }
2083 } else {
2084 rxcsum &= ~E1000_RXCSUM_TUOFL;
2085 /* don't need to clear IPPCSE as it defaults to 0 */
2086 }
2087 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
2088 }
2089
2090 /* enable early receives on 82573, only takes effect if using > 2048
2091 * byte total frame size. for example only for jumbo frames */
2092 #define E1000_ERT_2048 0x100
2093 if (hw->mac_type == e1000_82573)
2094 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2095
2096 /* Enable Receives */
2097 E1000_WRITE_REG(hw, RCTL, rctl);
2098 }
2099
2100 /**
2101 * e1000_free_tx_resources - Free Tx Resources per Queue
2102 * @adapter: board private structure
2103 * @tx_ring: Tx descriptor ring for a specific queue
2104 *
2105 * Free all transmit software resources
2106 **/
2107
2108 static void
2109 e1000_free_tx_resources(struct e1000_adapter *adapter,
2110 struct e1000_tx_ring *tx_ring)
2111 {
2112 struct pci_dev *pdev = adapter->pdev;
2113
2114 e1000_clean_tx_ring(adapter, tx_ring);
2115
2116 vfree(tx_ring->buffer_info);
2117 tx_ring->buffer_info = NULL;
2118
2119 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2120
2121 tx_ring->desc = NULL;
2122 }
2123
2124 /**
2125 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2126 * @adapter: board private structure
2127 *
2128 * Free all transmit software resources
2129 **/
2130
2131 void
2132 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2133 {
2134 int i;
2135
2136 for (i = 0; i < adapter->num_tx_queues; i++)
2137 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2138 }
2139
2140 static void
2141 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2142 struct e1000_buffer *buffer_info)
2143 {
2144 if (buffer_info->dma) {
2145 pci_unmap_page(adapter->pdev,
2146 buffer_info->dma,
2147 buffer_info->length,
2148 PCI_DMA_TODEVICE);
2149 buffer_info->dma = 0;
2150 }
2151 if (buffer_info->skb) {
2152 dev_kfree_skb_any(buffer_info->skb);
2153 buffer_info->skb = NULL;
2154 }
2155 /* buffer_info must be completely set up in the transmit path */
2156 }
2157
2158 /**
2159 * e1000_clean_tx_ring - Free Tx Buffers
2160 * @adapter: board private structure
2161 * @tx_ring: ring to be cleaned
2162 **/
2163
2164 static void
2165 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2166 struct e1000_tx_ring *tx_ring)
2167 {
2168 struct e1000_buffer *buffer_info;
2169 unsigned long size;
2170 unsigned int i;
2171
2172 /* Free all the Tx ring sk_buffs */
2173
2174 for (i = 0; i < tx_ring->count; i++) {
2175 buffer_info = &tx_ring->buffer_info[i];
2176 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2177 }
2178
2179 size = sizeof(struct e1000_buffer) * tx_ring->count;
2180 memset(tx_ring->buffer_info, 0, size);
2181
2182 /* Zero out the descriptor ring */
2183
2184 memset(tx_ring->desc, 0, tx_ring->size);
2185
2186 tx_ring->next_to_use = 0;
2187 tx_ring->next_to_clean = 0;
2188 tx_ring->last_tx_tso = 0;
2189
2190 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2191 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2192 }
2193
2194 /**
2195 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2196 * @adapter: board private structure
2197 **/
2198
2199 static void
2200 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2201 {
2202 int i;
2203
2204 for (i = 0; i < adapter->num_tx_queues; i++)
2205 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2206 }
2207
2208 /**
2209 * e1000_free_rx_resources - Free Rx Resources
2210 * @adapter: board private structure
2211 * @rx_ring: ring to clean the resources from
2212 *
2213 * Free all receive software resources
2214 **/
2215
2216 static void
2217 e1000_free_rx_resources(struct e1000_adapter *adapter,
2218 struct e1000_rx_ring *rx_ring)
2219 {
2220 struct pci_dev *pdev = adapter->pdev;
2221
2222 e1000_clean_rx_ring(adapter, rx_ring);
2223
2224 vfree(rx_ring->buffer_info);
2225 rx_ring->buffer_info = NULL;
2226 kfree(rx_ring->ps_page);
2227 rx_ring->ps_page = NULL;
2228 kfree(rx_ring->ps_page_dma);
2229 rx_ring->ps_page_dma = NULL;
2230
2231 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2232
2233 rx_ring->desc = NULL;
2234 }
2235
2236 /**
2237 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2238 * @adapter: board private structure
2239 *
2240 * Free all receive software resources
2241 **/
2242
2243 void
2244 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2245 {
2246 int i;
2247
2248 for (i = 0; i < adapter->num_rx_queues; i++)
2249 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2250 }
2251
2252 /**
2253 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2254 * @adapter: board private structure
2255 * @rx_ring: ring to free buffers from
2256 **/
2257
2258 static void
2259 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2260 struct e1000_rx_ring *rx_ring)
2261 {
2262 struct e1000_buffer *buffer_info;
2263 struct e1000_ps_page *ps_page;
2264 struct e1000_ps_page_dma *ps_page_dma;
2265 struct pci_dev *pdev = adapter->pdev;
2266 unsigned long size;
2267 unsigned int i, j;
2268
2269 /* Free all the Rx ring sk_buffs */
2270 for (i = 0; i < rx_ring->count; i++) {
2271 buffer_info = &rx_ring->buffer_info[i];
2272 if (buffer_info->skb) {
2273 pci_unmap_single(pdev,
2274 buffer_info->dma,
2275 buffer_info->length,
2276 PCI_DMA_FROMDEVICE);
2277
2278 dev_kfree_skb(buffer_info->skb);
2279 buffer_info->skb = NULL;
2280 }
2281 ps_page = &rx_ring->ps_page[i];
2282 ps_page_dma = &rx_ring->ps_page_dma[i];
2283 for (j = 0; j < adapter->rx_ps_pages; j++) {
2284 if (!ps_page->ps_page[j]) break;
2285 pci_unmap_page(pdev,
2286 ps_page_dma->ps_page_dma[j],
2287 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2288 ps_page_dma->ps_page_dma[j] = 0;
2289 put_page(ps_page->ps_page[j]);
2290 ps_page->ps_page[j] = NULL;
2291 }
2292 }
2293
2294 size = sizeof(struct e1000_buffer) * rx_ring->count;
2295 memset(rx_ring->buffer_info, 0, size);
2296 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2297 memset(rx_ring->ps_page, 0, size);
2298 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2299 memset(rx_ring->ps_page_dma, 0, size);
2300
2301 /* Zero out the descriptor ring */
2302
2303 memset(rx_ring->desc, 0, rx_ring->size);
2304
2305 rx_ring->next_to_clean = 0;
2306 rx_ring->next_to_use = 0;
2307
2308 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2309 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2310 }
2311
2312 /**
2313 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2314 * @adapter: board private structure
2315 **/
2316
2317 static void
2318 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2319 {
2320 int i;
2321
2322 for (i = 0; i < adapter->num_rx_queues; i++)
2323 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2324 }
2325
2326 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2327 * and memory write and invalidate disabled for certain operations
2328 */
2329 static void
2330 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2331 {
2332 struct net_device *netdev = adapter->netdev;
2333 uint32_t rctl;
2334
2335 e1000_pci_clear_mwi(&adapter->hw);
2336
2337 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2338 rctl |= E1000_RCTL_RST;
2339 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2340 E1000_WRITE_FLUSH(&adapter->hw);
2341 mdelay(5);
2342
2343 if (netif_running(netdev))
2344 e1000_clean_all_rx_rings(adapter);
2345 }
2346
2347 static void
2348 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2349 {
2350 struct net_device *netdev = adapter->netdev;
2351 uint32_t rctl;
2352
2353 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2354 rctl &= ~E1000_RCTL_RST;
2355 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2356 E1000_WRITE_FLUSH(&adapter->hw);
2357 mdelay(5);
2358
2359 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2360 e1000_pci_set_mwi(&adapter->hw);
2361
2362 if (netif_running(netdev)) {
2363 /* No need to loop, because 82542 supports only 1 queue */
2364 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2365 e1000_configure_rx(adapter);
2366 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2367 }
2368 }
2369
2370 /**
2371 * e1000_set_mac - Change the Ethernet Address of the NIC
2372 * @netdev: network interface device structure
2373 * @p: pointer to an address structure
2374 *
2375 * Returns 0 on success, negative on failure
2376 **/
2377
2378 static int
2379 e1000_set_mac(struct net_device *netdev, void *p)
2380 {
2381 struct e1000_adapter *adapter = netdev_priv(netdev);
2382 struct sockaddr *addr = p;
2383
2384 if (!is_valid_ether_addr(addr->sa_data))
2385 return -EADDRNOTAVAIL;
2386
2387 /* 82542 2.0 needs to be in reset to write receive address registers */
2388
2389 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2390 e1000_enter_82542_rst(adapter);
2391
2392 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2393 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2394
2395 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2396
2397 /* With 82571 controllers, LAA may be overwritten (with the default)
2398 * due to controller reset from the other port. */
2399 if (adapter->hw.mac_type == e1000_82571) {
2400 /* activate the work around */
2401 adapter->hw.laa_is_present = 1;
2402
2403 /* Hold a copy of the LAA in RAR[14] This is done so that
2404 * between the time RAR[0] gets clobbered and the time it
2405 * gets fixed (in e1000_watchdog), the actual LAA is in one
2406 * of the RARs and no incoming packets directed to this port
2407 * are dropped. Eventaully the LAA will be in RAR[0] and
2408 * RAR[14] */
2409 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2410 E1000_RAR_ENTRIES - 1);
2411 }
2412
2413 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2414 e1000_leave_82542_rst(adapter);
2415
2416 return 0;
2417 }
2418
2419 /**
2420 * e1000_set_multi - Multicast and Promiscuous mode set
2421 * @netdev: network interface device structure
2422 *
2423 * The set_multi entry point is called whenever the multicast address
2424 * list or the network interface flags are updated. This routine is
2425 * responsible for configuring the hardware for proper multicast,
2426 * promiscuous mode, and all-multi behavior.
2427 **/
2428
2429 static void
2430 e1000_set_multi(struct net_device *netdev)
2431 {
2432 struct e1000_adapter *adapter = netdev_priv(netdev);
2433 struct e1000_hw *hw = &adapter->hw;
2434 struct dev_mc_list *mc_ptr;
2435 uint32_t rctl;
2436 uint32_t hash_value;
2437 int i, rar_entries = E1000_RAR_ENTRIES;
2438 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2439 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2440 E1000_NUM_MTA_REGISTERS;
2441
2442 if (adapter->hw.mac_type == e1000_ich8lan)
2443 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2444
2445 /* reserve RAR[14] for LAA over-write work-around */
2446 if (adapter->hw.mac_type == e1000_82571)
2447 rar_entries--;
2448
2449 /* Check for Promiscuous and All Multicast modes */
2450
2451 rctl = E1000_READ_REG(hw, RCTL);
2452
2453 if (netdev->flags & IFF_PROMISC) {
2454 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2455 } else if (netdev->flags & IFF_ALLMULTI) {
2456 rctl |= E1000_RCTL_MPE;
2457 rctl &= ~E1000_RCTL_UPE;
2458 } else {
2459 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2460 }
2461
2462 E1000_WRITE_REG(hw, RCTL, rctl);
2463
2464 /* 82542 2.0 needs to be in reset to write receive address registers */
2465
2466 if (hw->mac_type == e1000_82542_rev2_0)
2467 e1000_enter_82542_rst(adapter);
2468
2469 /* load the first 14 multicast address into the exact filters 1-14
2470 * RAR 0 is used for the station MAC adddress
2471 * if there are not 14 addresses, go ahead and clear the filters
2472 * -- with 82571 controllers only 0-13 entries are filled here
2473 */
2474 mc_ptr = netdev->mc_list;
2475
2476 for (i = 1; i < rar_entries; i++) {
2477 if (mc_ptr) {
2478 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2479 mc_ptr = mc_ptr->next;
2480 } else {
2481 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2482 E1000_WRITE_FLUSH(hw);
2483 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2484 E1000_WRITE_FLUSH(hw);
2485 }
2486 }
2487
2488 /* clear the old settings from the multicast hash table */
2489
2490 for (i = 0; i < mta_reg_count; i++) {
2491 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2492 E1000_WRITE_FLUSH(hw);
2493 }
2494
2495 /* load any remaining addresses into the hash table */
2496
2497 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2498 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2499 e1000_mta_set(hw, hash_value);
2500 }
2501
2502 if (hw->mac_type == e1000_82542_rev2_0)
2503 e1000_leave_82542_rst(adapter);
2504 }
2505
2506 /* Need to wait a few seconds after link up to get diagnostic information from
2507 * the phy */
2508
2509 static void
2510 e1000_update_phy_info(unsigned long data)
2511 {
2512 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2513 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2514 }
2515
2516 /**
2517 * e1000_82547_tx_fifo_stall - Timer Call-back
2518 * @data: pointer to adapter cast into an unsigned long
2519 **/
2520
2521 static void
2522 e1000_82547_tx_fifo_stall(unsigned long data)
2523 {
2524 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2525 struct net_device *netdev = adapter->netdev;
2526 uint32_t tctl;
2527
2528 if (atomic_read(&adapter->tx_fifo_stall)) {
2529 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2530 E1000_READ_REG(&adapter->hw, TDH)) &&
2531 (E1000_READ_REG(&adapter->hw, TDFT) ==
2532 E1000_READ_REG(&adapter->hw, TDFH)) &&
2533 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2534 E1000_READ_REG(&adapter->hw, TDFHS))) {
2535 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2536 E1000_WRITE_REG(&adapter->hw, TCTL,
2537 tctl & ~E1000_TCTL_EN);
2538 E1000_WRITE_REG(&adapter->hw, TDFT,
2539 adapter->tx_head_addr);
2540 E1000_WRITE_REG(&adapter->hw, TDFH,
2541 adapter->tx_head_addr);
2542 E1000_WRITE_REG(&adapter->hw, TDFTS,
2543 adapter->tx_head_addr);
2544 E1000_WRITE_REG(&adapter->hw, TDFHS,
2545 adapter->tx_head_addr);
2546 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2547 E1000_WRITE_FLUSH(&adapter->hw);
2548
2549 adapter->tx_fifo_head = 0;
2550 atomic_set(&adapter->tx_fifo_stall, 0);
2551 netif_wake_queue(netdev);
2552 } else {
2553 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2554 }
2555 }
2556 }
2557
2558 /**
2559 * e1000_watchdog - Timer Call-back
2560 * @data: pointer to adapter cast into an unsigned long
2561 **/
2562 static void
2563 e1000_watchdog(unsigned long data)
2564 {
2565 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2566 struct net_device *netdev = adapter->netdev;
2567 struct e1000_tx_ring *txdr = adapter->tx_ring;
2568 uint32_t link, tctl;
2569 int32_t ret_val;
2570
2571 ret_val = e1000_check_for_link(&adapter->hw);
2572 if ((ret_val == E1000_ERR_PHY) &&
2573 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2574 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2575 /* See e1000_kumeran_lock_loss_workaround() */
2576 DPRINTK(LINK, INFO,
2577 "Gigabit has been disabled, downgrading speed\n");
2578 }
2579
2580 if (adapter->hw.mac_type == e1000_82573) {
2581 e1000_enable_tx_pkt_filtering(&adapter->hw);
2582 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2583 e1000_update_mng_vlan(adapter);
2584 }
2585
2586 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2587 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2588 link = !adapter->hw.serdes_link_down;
2589 else
2590 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2591
2592 if (link) {
2593 if (!netif_carrier_ok(netdev)) {
2594 uint32_t ctrl;
2595 boolean_t txb2b = 1;
2596 e1000_get_speed_and_duplex(&adapter->hw,
2597 &adapter->link_speed,
2598 &adapter->link_duplex);
2599
2600 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
2601 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2602 "Flow Control: %s\n",
2603 adapter->link_speed,
2604 adapter->link_duplex == FULL_DUPLEX ?
2605 "Full Duplex" : "Half Duplex",
2606 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2607 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2608 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2609 E1000_CTRL_TFCE) ? "TX" : "None" )));
2610
2611 /* tweak tx_queue_len according to speed/duplex
2612 * and adjust the timeout factor */
2613 netdev->tx_queue_len = adapter->tx_queue_len;
2614 adapter->tx_timeout_factor = 1;
2615 switch (adapter->link_speed) {
2616 case SPEED_10:
2617 txb2b = 0;
2618 netdev->tx_queue_len = 10;
2619 adapter->tx_timeout_factor = 8;
2620 break;
2621 case SPEED_100:
2622 txb2b = 0;
2623 netdev->tx_queue_len = 100;
2624 /* maybe add some timeout factor ? */
2625 break;
2626 }
2627
2628 if ((adapter->hw.mac_type == e1000_82571 ||
2629 adapter->hw.mac_type == e1000_82572) &&
2630 txb2b == 0) {
2631 uint32_t tarc0;
2632 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2633 tarc0 &= ~(1 << 21);
2634 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2635 }
2636
2637 /* disable TSO for pcie and 10/100 speeds, to avoid
2638 * some hardware issues */
2639 if (!adapter->tso_force &&
2640 adapter->hw.bus_type == e1000_bus_type_pci_express){
2641 switch (adapter->link_speed) {
2642 case SPEED_10:
2643 case SPEED_100:
2644 DPRINTK(PROBE,INFO,
2645 "10/100 speed: disabling TSO\n");
2646 netdev->features &= ~NETIF_F_TSO;
2647 netdev->features &= ~NETIF_F_TSO6;
2648 break;
2649 case SPEED_1000:
2650 netdev->features |= NETIF_F_TSO;
2651 netdev->features |= NETIF_F_TSO6;
2652 break;
2653 default:
2654 /* oops */
2655 break;
2656 }
2657 }
2658
2659 /* enable transmits in the hardware, need to do this
2660 * after setting TARC0 */
2661 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2662 tctl |= E1000_TCTL_EN;
2663 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2664
2665 netif_carrier_on(netdev);
2666 netif_wake_queue(netdev);
2667 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2668 adapter->smartspeed = 0;
2669 } else {
2670 /* make sure the receive unit is started */
2671 if (adapter->hw.rx_needs_kicking) {
2672 struct e1000_hw *hw = &adapter->hw;
2673 uint32_t rctl = E1000_READ_REG(hw, RCTL);
2674 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
2675 }
2676 }
2677 } else {
2678 if (netif_carrier_ok(netdev)) {
2679 adapter->link_speed = 0;
2680 adapter->link_duplex = 0;
2681 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2682 netif_carrier_off(netdev);
2683 netif_stop_queue(netdev);
2684 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2685
2686 /* 80003ES2LAN workaround--
2687 * For packet buffer work-around on link down event;
2688 * disable receives in the ISR and
2689 * reset device here in the watchdog
2690 */
2691 if (adapter->hw.mac_type == e1000_80003es2lan)
2692 /* reset device */
2693 schedule_work(&adapter->reset_task);
2694 }
2695
2696 e1000_smartspeed(adapter);
2697 }
2698
2699 e1000_update_stats(adapter);
2700
2701 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2702 adapter->tpt_old = adapter->stats.tpt;
2703 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2704 adapter->colc_old = adapter->stats.colc;
2705
2706 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2707 adapter->gorcl_old = adapter->stats.gorcl;
2708 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2709 adapter->gotcl_old = adapter->stats.gotcl;
2710
2711 e1000_update_adaptive(&adapter->hw);
2712
2713 if (!netif_carrier_ok(netdev)) {
2714 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2715 /* We've lost link, so the controller stops DMA,
2716 * but we've got queued Tx work that's never going
2717 * to get done, so reset controller to flush Tx.
2718 * (Do the reset outside of interrupt context). */
2719 adapter->tx_timeout_count++;
2720 schedule_work(&adapter->reset_task);
2721 }
2722 }
2723
2724 /* Cause software interrupt to ensure rx ring is cleaned */
2725 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2726
2727 /* Force detection of hung controller every watchdog period */
2728 adapter->detect_tx_hung = TRUE;
2729
2730 /* With 82571 controllers, LAA may be overwritten due to controller
2731 * reset from the other port. Set the appropriate LAA in RAR[0] */
2732 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2733 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2734
2735 /* Reset the timer */
2736 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
2737 }
2738
2739 enum latency_range {
2740 lowest_latency = 0,
2741 low_latency = 1,
2742 bulk_latency = 2,
2743 latency_invalid = 255
2744 };
2745
2746 /**
2747 * e1000_update_itr - update the dynamic ITR value based on statistics
2748 * Stores a new ITR value based on packets and byte
2749 * counts during the last interrupt. The advantage of per interrupt
2750 * computation is faster updates and more accurate ITR for the current
2751 * traffic pattern. Constants in this function were computed
2752 * based on theoretical maximum wire speed and thresholds were set based
2753 * on testing data as well as attempting to minimize response time
2754 * while increasing bulk throughput.
2755 * this functionality is controlled by the InterruptThrottleRate module
2756 * parameter (see e1000_param.c)
2757 * @adapter: pointer to adapter
2758 * @itr_setting: current adapter->itr
2759 * @packets: the number of packets during this measurement interval
2760 * @bytes: the number of bytes during this measurement interval
2761 **/
2762 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2763 uint16_t itr_setting,
2764 int packets,
2765 int bytes)
2766 {
2767 unsigned int retval = itr_setting;
2768 struct e1000_hw *hw = &adapter->hw;
2769
2770 if (unlikely(hw->mac_type < e1000_82540))
2771 goto update_itr_done;
2772
2773 if (packets == 0)
2774 goto update_itr_done;
2775
2776 switch (itr_setting) {
2777 case lowest_latency:
2778 /* jumbo frames get bulk treatment*/
2779 if (bytes/packets > 8000)
2780 retval = bulk_latency;
2781 else if ((packets < 5) && (bytes > 512))
2782 retval = low_latency;
2783 break;
2784 case low_latency: /* 50 usec aka 20000 ints/s */
2785 if (bytes > 10000) {
2786 /* jumbo frames need bulk latency setting */
2787 if (bytes/packets > 8000)
2788 retval = bulk_latency;
2789 else if ((packets < 10) || ((bytes/packets) > 1200))
2790 retval = bulk_latency;
2791 else if ((packets > 35))
2792 retval = lowest_latency;
2793 } else if (bytes/packets > 2000)
2794 retval = bulk_latency;
2795 else if (packets <= 2 && bytes < 512)
2796 retval = lowest_latency;
2797 break;
2798 case bulk_latency: /* 250 usec aka 4000 ints/s */
2799 if (bytes > 25000) {
2800 if (packets > 35)
2801 retval = low_latency;
2802 } else if (bytes < 6000) {
2803 retval = low_latency;
2804 }
2805 break;
2806 }
2807
2808 update_itr_done:
2809 return retval;
2810 }
2811
2812 static void e1000_set_itr(struct e1000_adapter *adapter)
2813 {
2814 struct e1000_hw *hw = &adapter->hw;
2815 uint16_t current_itr;
2816 uint32_t new_itr = adapter->itr;
2817
2818 if (unlikely(hw->mac_type < e1000_82540))
2819 return;
2820
2821 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2822 if (unlikely(adapter->link_speed != SPEED_1000)) {
2823 current_itr = 0;
2824 new_itr = 4000;
2825 goto set_itr_now;
2826 }
2827
2828 adapter->tx_itr = e1000_update_itr(adapter,
2829 adapter->tx_itr,
2830 adapter->total_tx_packets,
2831 adapter->total_tx_bytes);
2832 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2833 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2834 adapter->tx_itr = low_latency;
2835
2836 adapter->rx_itr = e1000_update_itr(adapter,
2837 adapter->rx_itr,
2838 adapter->total_rx_packets,
2839 adapter->total_rx_bytes);
2840 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2841 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2842 adapter->rx_itr = low_latency;
2843
2844 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2845
2846 switch (current_itr) {
2847 /* counts and packets in update_itr are dependent on these numbers */
2848 case lowest_latency:
2849 new_itr = 70000;
2850 break;
2851 case low_latency:
2852 new_itr = 20000; /* aka hwitr = ~200 */
2853 break;
2854 case bulk_latency:
2855 new_itr = 4000;
2856 break;
2857 default:
2858 break;
2859 }
2860
2861 set_itr_now:
2862 if (new_itr != adapter->itr) {
2863 /* this attempts to bias the interrupt rate towards Bulk
2864 * by adding intermediate steps when interrupt rate is
2865 * increasing */
2866 new_itr = new_itr > adapter->itr ?
2867 min(adapter->itr + (new_itr >> 2), new_itr) :
2868 new_itr;
2869 adapter->itr = new_itr;
2870 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2871 }
2872
2873 return;
2874 }
2875
2876 #define E1000_TX_FLAGS_CSUM 0x00000001
2877 #define E1000_TX_FLAGS_VLAN 0x00000002
2878 #define E1000_TX_FLAGS_TSO 0x00000004
2879 #define E1000_TX_FLAGS_IPV4 0x00000008
2880 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2881 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2882
2883 static int
2884 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2885 struct sk_buff *skb)
2886 {
2887 struct e1000_context_desc *context_desc;
2888 struct e1000_buffer *buffer_info;
2889 unsigned int i;
2890 uint32_t cmd_length = 0;
2891 uint16_t ipcse = 0, tucse, mss;
2892 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2893 int err;
2894
2895 if (skb_is_gso(skb)) {
2896 if (skb_header_cloned(skb)) {
2897 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2898 if (err)
2899 return err;
2900 }
2901
2902 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2903 mss = skb_shinfo(skb)->gso_size;
2904 if (skb->protocol == htons(ETH_P_IP)) {
2905 struct iphdr *iph = ip_hdr(skb);
2906 iph->tot_len = 0;
2907 iph->check = 0;
2908 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2909 iph->daddr, 0,
2910 IPPROTO_TCP,
2911 0);
2912 cmd_length = E1000_TXD_CMD_IP;
2913 ipcse = skb_transport_offset(skb) - 1;
2914 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2915 ipv6_hdr(skb)->payload_len = 0;
2916 tcp_hdr(skb)->check =
2917 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2918 &ipv6_hdr(skb)->daddr,
2919 0, IPPROTO_TCP, 0);
2920 ipcse = 0;
2921 }
2922 ipcss = skb_network_offset(skb);
2923 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
2924 tucss = skb_transport_offset(skb);
2925 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
2926 tucse = 0;
2927
2928 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2929 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2930
2931 i = tx_ring->next_to_use;
2932 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2933 buffer_info = &tx_ring->buffer_info[i];
2934
2935 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2936 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2937 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2938 context_desc->upper_setup.tcp_fields.tucss = tucss;
2939 context_desc->upper_setup.tcp_fields.tucso = tucso;
2940 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2941 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2942 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2943 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2944
2945 buffer_info->time_stamp = jiffies;
2946 buffer_info->next_to_watch = i;
2947
2948 if (++i == tx_ring->count) i = 0;
2949 tx_ring->next_to_use = i;
2950
2951 return TRUE;
2952 }
2953 return FALSE;
2954 }
2955
2956 static boolean_t
2957 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2958 struct sk_buff *skb)
2959 {
2960 struct e1000_context_desc *context_desc;
2961 struct e1000_buffer *buffer_info;
2962 unsigned int i;
2963 uint8_t css;
2964
2965 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2966 css = skb_transport_offset(skb);
2967
2968 i = tx_ring->next_to_use;
2969 buffer_info = &tx_ring->buffer_info[i];
2970 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2971
2972 context_desc->lower_setup.ip_config = 0;
2973 context_desc->upper_setup.tcp_fields.tucss = css;
2974 context_desc->upper_setup.tcp_fields.tucso =
2975 css + skb->csum_offset;
2976 context_desc->upper_setup.tcp_fields.tucse = 0;
2977 context_desc->tcp_seg_setup.data = 0;
2978 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2979
2980 buffer_info->time_stamp = jiffies;
2981 buffer_info->next_to_watch = i;
2982
2983 if (unlikely(++i == tx_ring->count)) i = 0;
2984 tx_ring->next_to_use = i;
2985
2986 return TRUE;
2987 }
2988
2989 return FALSE;
2990 }
2991
2992 #define E1000_MAX_TXD_PWR 12
2993 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2994
2995 static int
2996 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2997 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2998 unsigned int nr_frags, unsigned int mss)
2999 {
3000 struct e1000_buffer *buffer_info;
3001 unsigned int len = skb->len;
3002 unsigned int offset = 0, size, count = 0, i;
3003 unsigned int f;
3004 len -= skb->data_len;
3005
3006 i = tx_ring->next_to_use;
3007
3008 while (len) {
3009 buffer_info = &tx_ring->buffer_info[i];
3010 size = min(len, max_per_txd);
3011 /* Workaround for Controller erratum --
3012 * descriptor for non-tso packet in a linear SKB that follows a
3013 * tso gets written back prematurely before the data is fully
3014 * DMA'd to the controller */
3015 if (!skb->data_len && tx_ring->last_tx_tso &&
3016 !skb_is_gso(skb)) {
3017 tx_ring->last_tx_tso = 0;
3018 size -= 4;
3019 }
3020
3021 /* Workaround for premature desc write-backs
3022 * in TSO mode. Append 4-byte sentinel desc */
3023 if (unlikely(mss && !nr_frags && size == len && size > 8))
3024 size -= 4;
3025 /* work-around for errata 10 and it applies
3026 * to all controllers in PCI-X mode
3027 * The fix is to make sure that the first descriptor of a
3028 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
3029 */
3030 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3031 (size > 2015) && count == 0))
3032 size = 2015;
3033
3034 /* Workaround for potential 82544 hang in PCI-X. Avoid
3035 * terminating buffers within evenly-aligned dwords. */
3036 if (unlikely(adapter->pcix_82544 &&
3037 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3038 size > 4))
3039 size -= 4;
3040
3041 buffer_info->length = size;
3042 buffer_info->dma =
3043 pci_map_single(adapter->pdev,
3044 skb->data + offset,
3045 size,
3046 PCI_DMA_TODEVICE);
3047 buffer_info->time_stamp = jiffies;
3048 buffer_info->next_to_watch = i;
3049
3050 len -= size;
3051 offset += size;
3052 count++;
3053 if (unlikely(++i == tx_ring->count)) i = 0;
3054 }
3055
3056 for (f = 0; f < nr_frags; f++) {
3057 struct skb_frag_struct *frag;
3058
3059 frag = &skb_shinfo(skb)->frags[f];
3060 len = frag->size;
3061 offset = frag->page_offset;
3062
3063 while (len) {
3064 buffer_info = &tx_ring->buffer_info[i];
3065 size = min(len, max_per_txd);
3066 /* Workaround for premature desc write-backs
3067 * in TSO mode. Append 4-byte sentinel desc */
3068 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
3069 size -= 4;
3070 /* Workaround for potential 82544 hang in PCI-X.
3071 * Avoid terminating buffers within evenly-aligned
3072 * dwords. */
3073 if (unlikely(adapter->pcix_82544 &&
3074 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3075 size > 4))
3076 size -= 4;
3077
3078 buffer_info->length = size;
3079 buffer_info->dma =
3080 pci_map_page(adapter->pdev,
3081 frag->page,
3082 offset,
3083 size,
3084 PCI_DMA_TODEVICE);
3085 buffer_info->time_stamp = jiffies;
3086 buffer_info->next_to_watch = i;
3087
3088 len -= size;
3089 offset += size;
3090 count++;
3091 if (unlikely(++i == tx_ring->count)) i = 0;
3092 }
3093 }
3094
3095 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3096 tx_ring->buffer_info[i].skb = skb;
3097 tx_ring->buffer_info[first].next_to_watch = i;
3098
3099 return count;
3100 }
3101
3102 static void
3103 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3104 int tx_flags, int count)
3105 {
3106 struct e1000_tx_desc *tx_desc = NULL;
3107 struct e1000_buffer *buffer_info;
3108 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3109 unsigned int i;
3110
3111 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
3112 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3113 E1000_TXD_CMD_TSE;
3114 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3115
3116 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
3117 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3118 }
3119
3120 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
3121 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3122 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3123 }
3124
3125 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
3126 txd_lower |= E1000_TXD_CMD_VLE;
3127 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3128 }
3129
3130 i = tx_ring->next_to_use;
3131
3132 while (count--) {
3133 buffer_info = &tx_ring->buffer_info[i];
3134 tx_desc = E1000_TX_DESC(*tx_ring, i);
3135 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3136 tx_desc->lower.data =
3137 cpu_to_le32(txd_lower | buffer_info->length);
3138 tx_desc->upper.data = cpu_to_le32(txd_upper);
3139 if (unlikely(++i == tx_ring->count)) i = 0;
3140 }
3141
3142 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3143
3144 /* Force memory writes to complete before letting h/w
3145 * know there are new descriptors to fetch. (Only
3146 * applicable for weak-ordered memory model archs,
3147 * such as IA-64). */
3148 wmb();
3149
3150 tx_ring->next_to_use = i;
3151 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
3152 /* we need this if more than one processor can write to our tail
3153 * at a time, it syncronizes IO on IA64/Altix systems */
3154 mmiowb();
3155 }
3156
3157 /**
3158 * 82547 workaround to avoid controller hang in half-duplex environment.
3159 * The workaround is to avoid queuing a large packet that would span
3160 * the internal Tx FIFO ring boundary by notifying the stack to resend
3161 * the packet at a later time. This gives the Tx FIFO an opportunity to
3162 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3163 * to the beginning of the Tx FIFO.
3164 **/
3165
3166 #define E1000_FIFO_HDR 0x10
3167 #define E1000_82547_PAD_LEN 0x3E0
3168
3169 static int
3170 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3171 {
3172 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3173 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3174
3175 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
3176
3177 if (adapter->link_duplex != HALF_DUPLEX)
3178 goto no_fifo_stall_required;
3179
3180 if (atomic_read(&adapter->tx_fifo_stall))
3181 return 1;
3182
3183 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3184 atomic_set(&adapter->tx_fifo_stall, 1);
3185 return 1;
3186 }
3187
3188 no_fifo_stall_required:
3189 adapter->tx_fifo_head += skb_fifo_len;
3190 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3191 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3192 return 0;
3193 }
3194
3195 #define MINIMUM_DHCP_PACKET_SIZE 282
3196 static int
3197 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3198 {
3199 struct e1000_hw *hw = &adapter->hw;
3200 uint16_t length, offset;
3201 if (vlan_tx_tag_present(skb)) {
3202 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
3203 ( adapter->hw.mng_cookie.status &
3204 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3205 return 0;
3206 }
3207 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3208 struct ethhdr *eth = (struct ethhdr *) skb->data;
3209 if ((htons(ETH_P_IP) == eth->h_proto)) {
3210 const struct iphdr *ip =
3211 (struct iphdr *)((uint8_t *)skb->data+14);
3212 if (IPPROTO_UDP == ip->protocol) {
3213 struct udphdr *udp =
3214 (struct udphdr *)((uint8_t *)ip +
3215 (ip->ihl << 2));
3216 if (ntohs(udp->dest) == 67) {
3217 offset = (uint8_t *)udp + 8 - skb->data;
3218 length = skb->len - offset;
3219
3220 return e1000_mng_write_dhcp_info(hw,
3221 (uint8_t *)udp + 8,
3222 length);
3223 }
3224 }
3225 }
3226 }
3227 return 0;
3228 }
3229
3230 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3231 {
3232 struct e1000_adapter *adapter = netdev_priv(netdev);
3233 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3234
3235 netif_stop_queue(netdev);
3236 /* Herbert's original patch had:
3237 * smp_mb__after_netif_stop_queue();
3238 * but since that doesn't exist yet, just open code it. */
3239 smp_mb();
3240
3241 /* We need to check again in a case another CPU has just
3242 * made room available. */
3243 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3244 return -EBUSY;
3245
3246 /* A reprieve! */
3247 netif_start_queue(netdev);
3248 ++adapter->restart_queue;
3249 return 0;
3250 }
3251
3252 static int e1000_maybe_stop_tx(struct net_device *netdev,
3253 struct e1000_tx_ring *tx_ring, int size)
3254 {
3255 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3256 return 0;
3257 return __e1000_maybe_stop_tx(netdev, size);
3258 }
3259
3260 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3261 static int
3262 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3263 {
3264 struct e1000_adapter *adapter = netdev_priv(netdev);
3265 struct e1000_tx_ring *tx_ring;
3266 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3267 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3268 unsigned int tx_flags = 0;
3269 unsigned int len = skb->len;
3270 unsigned long flags;
3271 unsigned int nr_frags = 0;
3272 unsigned int mss = 0;
3273 int count = 0;
3274 int tso;
3275 unsigned int f;
3276 len -= skb->data_len;
3277
3278 /* This goes back to the question of how to logically map a tx queue
3279 * to a flow. Right now, performance is impacted slightly negatively
3280 * if using multiple tx queues. If the stack breaks away from a
3281 * single qdisc implementation, we can look at this again. */
3282 tx_ring = adapter->tx_ring;
3283
3284 if (unlikely(skb->len <= 0)) {
3285 dev_kfree_skb_any(skb);
3286 return NETDEV_TX_OK;
3287 }
3288
3289 /* 82571 and newer doesn't need the workaround that limited descriptor
3290 * length to 4kB */
3291 if (adapter->hw.mac_type >= e1000_82571)
3292 max_per_txd = 8192;
3293
3294 mss = skb_shinfo(skb)->gso_size;
3295 /* The controller does a simple calculation to
3296 * make sure there is enough room in the FIFO before
3297 * initiating the DMA for each buffer. The calc is:
3298 * 4 = ceil(buffer len/mss). To make sure we don't
3299 * overrun the FIFO, adjust the max buffer len if mss
3300 * drops. */
3301 if (mss) {
3302 uint8_t hdr_len;
3303 max_per_txd = min(mss << 2, max_per_txd);
3304 max_txd_pwr = fls(max_per_txd) - 1;
3305
3306 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3307 * points to just header, pull a few bytes of payload from
3308 * frags into skb->data */
3309 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3310 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3311 switch (adapter->hw.mac_type) {
3312 unsigned int pull_size;
3313 case e1000_82544:
3314 /* Make sure we have room to chop off 4 bytes,
3315 * and that the end alignment will work out to
3316 * this hardware's requirements
3317 * NOTE: this is a TSO only workaround
3318 * if end byte alignment not correct move us
3319 * into the next dword */
3320 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
3321 break;
3322 /* fall through */
3323 case e1000_82571:
3324 case e1000_82572:
3325 case e1000_82573:
3326 case e1000_ich8lan:
3327 pull_size = min((unsigned int)4, skb->data_len);
3328 if (!__pskb_pull_tail(skb, pull_size)) {
3329 DPRINTK(DRV, ERR,
3330 "__pskb_pull_tail failed.\n");
3331 dev_kfree_skb_any(skb);
3332 return NETDEV_TX_OK;
3333 }
3334 len = skb->len - skb->data_len;
3335 break;
3336 default:
3337 /* do nothing */
3338 break;
3339 }
3340 }
3341 }
3342
3343 /* reserve a descriptor for the offload context */
3344 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3345 count++;
3346 count++;
3347
3348 /* Controller Erratum workaround */
3349 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3350 count++;
3351
3352 count += TXD_USE_COUNT(len, max_txd_pwr);
3353
3354 if (adapter->pcix_82544)
3355 count++;
3356
3357 /* work-around for errata 10 and it applies to all controllers
3358 * in PCI-X mode, so add one more descriptor to the count
3359 */
3360 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3361 (len > 2015)))
3362 count++;
3363
3364 nr_frags = skb_shinfo(skb)->nr_frags;
3365 for (f = 0; f < nr_frags; f++)
3366 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3367 max_txd_pwr);
3368 if (adapter->pcix_82544)
3369 count += nr_frags;
3370
3371
3372 if (adapter->hw.tx_pkt_filtering &&
3373 (adapter->hw.mac_type == e1000_82573))
3374 e1000_transfer_dhcp_info(adapter, skb);
3375
3376 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
3377 /* Collision - tell upper layer to requeue */
3378 return NETDEV_TX_LOCKED;
3379
3380 /* need: count + 2 desc gap to keep tail from touching
3381 * head, otherwise try next time */
3382 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3383 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3384 return NETDEV_TX_BUSY;
3385 }
3386
3387 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3388 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3389 netif_stop_queue(netdev);
3390 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3391 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3392 return NETDEV_TX_BUSY;
3393 }
3394 }
3395
3396 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3397 tx_flags |= E1000_TX_FLAGS_VLAN;
3398 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3399 }
3400
3401 first = tx_ring->next_to_use;
3402
3403 tso = e1000_tso(adapter, tx_ring, skb);
3404 if (tso < 0) {
3405 dev_kfree_skb_any(skb);
3406 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3407 return NETDEV_TX_OK;
3408 }
3409
3410 if (likely(tso)) {
3411 tx_ring->last_tx_tso = 1;
3412 tx_flags |= E1000_TX_FLAGS_TSO;
3413 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3414 tx_flags |= E1000_TX_FLAGS_CSUM;
3415
3416 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3417 * 82571 hardware supports TSO capabilities for IPv6 as well...
3418 * no longer assume, we must. */
3419 if (likely(skb->protocol == htons(ETH_P_IP)))
3420 tx_flags |= E1000_TX_FLAGS_IPV4;
3421
3422 e1000_tx_queue(adapter, tx_ring, tx_flags,
3423 e1000_tx_map(adapter, tx_ring, skb, first,
3424 max_per_txd, nr_frags, mss));
3425
3426 netdev->trans_start = jiffies;
3427
3428 /* Make sure there is space in the ring for the next send. */
3429 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3430
3431 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3432 return NETDEV_TX_OK;
3433 }
3434
3435 /**
3436 * e1000_tx_timeout - Respond to a Tx Hang
3437 * @netdev: network interface device structure
3438 **/
3439
3440 static void
3441 e1000_tx_timeout(struct net_device *netdev)
3442 {
3443 struct e1000_adapter *adapter = netdev_priv(netdev);
3444
3445 /* Do the reset outside of interrupt context */
3446 adapter->tx_timeout_count++;
3447 schedule_work(&adapter->reset_task);
3448 }
3449
3450 static void
3451 e1000_reset_task(struct work_struct *work)
3452 {
3453 struct e1000_adapter *adapter =
3454 container_of(work, struct e1000_adapter, reset_task);
3455
3456 e1000_reinit_locked(adapter);
3457 }
3458
3459 /**
3460 * e1000_get_stats - Get System Network Statistics
3461 * @netdev: network interface device structure
3462 *
3463 * Returns the address of the device statistics structure.
3464 * The statistics are actually updated from the timer callback.
3465 **/
3466
3467 static struct net_device_stats *
3468 e1000_get_stats(struct net_device *netdev)
3469 {
3470 struct e1000_adapter *adapter = netdev_priv(netdev);
3471
3472 /* only return the current stats */
3473 return &adapter->net_stats;
3474 }
3475
3476 /**
3477 * e1000_change_mtu - Change the Maximum Transfer Unit
3478 * @netdev: network interface device structure
3479 * @new_mtu: new value for maximum frame size
3480 *
3481 * Returns 0 on success, negative on failure
3482 **/
3483
3484 static int
3485 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3486 {
3487 struct e1000_adapter *adapter = netdev_priv(netdev);
3488 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3489 uint16_t eeprom_data = 0;
3490
3491 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3492 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3493 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3494 return -EINVAL;
3495 }
3496
3497 /* Adapter-specific max frame size limits. */
3498 switch (adapter->hw.mac_type) {
3499 case e1000_undefined ... e1000_82542_rev2_1:
3500 case e1000_ich8lan:
3501 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3502 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3503 return -EINVAL;
3504 }
3505 break;
3506 case e1000_82573:
3507 /* Jumbo Frames not supported if:
3508 * - this is not an 82573L device
3509 * - ASPM is enabled in any way (0x1A bits 3:2) */
3510 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3511 &eeprom_data);
3512 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3513 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3514 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3515 DPRINTK(PROBE, ERR,
3516 "Jumbo Frames not supported.\n");
3517 return -EINVAL;
3518 }
3519 break;
3520 }
3521 /* ERT will be enabled later to enable wire speed receives */
3522
3523 /* fall through to get support */
3524 case e1000_82571:
3525 case e1000_82572:
3526 case e1000_80003es2lan:
3527 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3528 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3529 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3530 return -EINVAL;
3531 }
3532 break;
3533 default:
3534 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3535 break;
3536 }
3537
3538 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3539 * means we reserve 2 more, this pushes us to allocate from the next
3540 * larger slab size
3541 * i.e. RXBUFFER_2048 --> size-4096 slab */
3542
3543 if (max_frame <= E1000_RXBUFFER_256)
3544 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3545 else if (max_frame <= E1000_RXBUFFER_512)
3546 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3547 else if (max_frame <= E1000_RXBUFFER_1024)
3548 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3549 else if (max_frame <= E1000_RXBUFFER_2048)
3550 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3551 else if (max_frame <= E1000_RXBUFFER_4096)
3552 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3553 else if (max_frame <= E1000_RXBUFFER_8192)
3554 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3555 else if (max_frame <= E1000_RXBUFFER_16384)
3556 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3557
3558 /* adjust allocation if LPE protects us, and we aren't using SBP */
3559 if (!adapter->hw.tbi_compatibility_on &&
3560 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3561 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3562 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3563
3564 netdev->mtu = new_mtu;
3565 adapter->hw.max_frame_size = max_frame;
3566
3567 if (netif_running(netdev))
3568 e1000_reinit_locked(adapter);
3569
3570 return 0;
3571 }
3572
3573 /**
3574 * e1000_update_stats - Update the board statistics counters
3575 * @adapter: board private structure
3576 **/
3577
3578 void
3579 e1000_update_stats(struct e1000_adapter *adapter)
3580 {
3581 struct e1000_hw *hw = &adapter->hw;
3582 struct pci_dev *pdev = adapter->pdev;
3583 unsigned long flags;
3584 uint16_t phy_tmp;
3585
3586 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3587
3588 /*
3589 * Prevent stats update while adapter is being reset, or if the pci
3590 * connection is down.
3591 */
3592 if (adapter->link_speed == 0)
3593 return;
3594 if (pci_channel_offline(pdev))
3595 return;
3596
3597 spin_lock_irqsave(&adapter->stats_lock, flags);
3598
3599 /* these counters are modified from e1000_adjust_tbi_stats,
3600 * called from the interrupt context, so they must only
3601 * be written while holding adapter->stats_lock
3602 */
3603
3604 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3605 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3606 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3607 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3608 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3609 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3610 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3611
3612 if (adapter->hw.mac_type != e1000_ich8lan) {
3613 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3614 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3615 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3616 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3617 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3618 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3619 }
3620
3621 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3622 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3623 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3624 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3625 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3626 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3627 adapter->stats.dc += E1000_READ_REG(hw, DC);
3628 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3629 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3630 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3631 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3632 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3633 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3634 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3635 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3636 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3637 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3638 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3639 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3640 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3641 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3642 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3643 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3644 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3645 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3646 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3647
3648 if (adapter->hw.mac_type != e1000_ich8lan) {
3649 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3650 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3651 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3652 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3653 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3654 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3655 }
3656
3657 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3658 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3659
3660 /* used for adaptive IFS */
3661
3662 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3663 adapter->stats.tpt += hw->tx_packet_delta;
3664 hw->collision_delta = E1000_READ_REG(hw, COLC);
3665 adapter->stats.colc += hw->collision_delta;
3666
3667 if (hw->mac_type >= e1000_82543) {
3668 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3669 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3670 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3671 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3672 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3673 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3674 }
3675 if (hw->mac_type > e1000_82547_rev_2) {
3676 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3677 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3678
3679 if (adapter->hw.mac_type != e1000_ich8lan) {
3680 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3681 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3682 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3683 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3684 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3685 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3686 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3687 }
3688 }
3689
3690 /* Fill out the OS statistics structure */
3691 adapter->net_stats.rx_packets = adapter->stats.gprc;
3692 adapter->net_stats.tx_packets = adapter->stats.gptc;
3693 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3694 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3695 adapter->net_stats.multicast = adapter->stats.mprc;
3696 adapter->net_stats.collisions = adapter->stats.colc;
3697
3698 /* Rx Errors */
3699
3700 /* RLEC on some newer hardware can be incorrect so build
3701 * our own version based on RUC and ROC */
3702 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3703 adapter->stats.crcerrs + adapter->stats.algnerrc +
3704 adapter->stats.ruc + adapter->stats.roc +
3705 adapter->stats.cexterr;
3706 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3707 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3708 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3709 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3710 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3711
3712 /* Tx Errors */
3713 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3714 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3715 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3716 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3717 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3718 if (adapter->hw.bad_tx_carr_stats_fd &&
3719 adapter->link_duplex == FULL_DUPLEX) {
3720 adapter->net_stats.tx_carrier_errors = 0;
3721 adapter->stats.tncrs = 0;
3722 }
3723
3724 /* Tx Dropped needs to be maintained elsewhere */
3725
3726 /* Phy Stats */
3727 if (hw->media_type == e1000_media_type_copper) {
3728 if ((adapter->link_speed == SPEED_1000) &&
3729 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3730 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3731 adapter->phy_stats.idle_errors += phy_tmp;
3732 }
3733
3734 if ((hw->mac_type <= e1000_82546) &&
3735 (hw->phy_type == e1000_phy_m88) &&
3736 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3737 adapter->phy_stats.receive_errors += phy_tmp;
3738 }
3739
3740 /* Management Stats */
3741 if (adapter->hw.has_smbus) {
3742 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
3743 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
3744 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
3745 }
3746
3747 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3748 }
3749
3750 /**
3751 * e1000_intr_msi - Interrupt Handler
3752 * @irq: interrupt number
3753 * @data: pointer to a network interface device structure
3754 **/
3755
3756 static irqreturn_t
3757 e1000_intr_msi(int irq, void *data)
3758 {
3759 struct net_device *netdev = data;
3760 struct e1000_adapter *adapter = netdev_priv(netdev);
3761 struct e1000_hw *hw = &adapter->hw;
3762 #ifndef CONFIG_E1000_NAPI
3763 int i;
3764 #endif
3765 uint32_t icr = E1000_READ_REG(hw, ICR);
3766
3767 #ifdef CONFIG_E1000_NAPI
3768 /* read ICR disables interrupts using IAM, so keep up with our
3769 * enable/disable accounting */
3770 atomic_inc(&adapter->irq_sem);
3771 #endif
3772 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3773 hw->get_link_status = 1;
3774 /* 80003ES2LAN workaround-- For packet buffer work-around on
3775 * link down event; disable receives here in the ISR and reset
3776 * adapter in watchdog */
3777 if (netif_carrier_ok(netdev) &&
3778 (adapter->hw.mac_type == e1000_80003es2lan)) {
3779 /* disable receives */
3780 uint32_t rctl = E1000_READ_REG(hw, RCTL);
3781 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3782 }
3783 /* guard against interrupt when we're going down */
3784 if (!test_bit(__E1000_DOWN, &adapter->flags))
3785 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3786 }
3787
3788 #ifdef CONFIG_E1000_NAPI
3789 if (likely(netif_rx_schedule_prep(netdev))) {
3790 adapter->total_tx_bytes = 0;
3791 adapter->total_tx_packets = 0;
3792 adapter->total_rx_bytes = 0;
3793 adapter->total_rx_packets = 0;
3794 __netif_rx_schedule(netdev);
3795 } else
3796 e1000_irq_enable(adapter);
3797 #else
3798 adapter->total_tx_bytes = 0;
3799 adapter->total_rx_bytes = 0;
3800 adapter->total_tx_packets = 0;
3801 adapter->total_rx_packets = 0;
3802
3803 for (i = 0; i < E1000_MAX_INTR; i++)
3804 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3805 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3806 break;
3807
3808 if (likely(adapter->itr_setting & 3))
3809 e1000_set_itr(adapter);
3810 #endif
3811
3812 return IRQ_HANDLED;
3813 }
3814
3815 /**
3816 * e1000_intr - Interrupt Handler
3817 * @irq: interrupt number
3818 * @data: pointer to a network interface device structure
3819 **/
3820
3821 static irqreturn_t
3822 e1000_intr(int irq, void *data)
3823 {
3824 struct net_device *netdev = data;
3825 struct e1000_adapter *adapter = netdev_priv(netdev);
3826 struct e1000_hw *hw = &adapter->hw;
3827 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3828 #ifndef CONFIG_E1000_NAPI
3829 int i;
3830 #endif
3831 if (unlikely(!icr))
3832 return IRQ_NONE; /* Not our interrupt */
3833
3834 #ifdef CONFIG_E1000_NAPI
3835 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3836 * not set, then the adapter didn't send an interrupt */
3837 if (unlikely(hw->mac_type >= e1000_82571 &&
3838 !(icr & E1000_ICR_INT_ASSERTED)))
3839 return IRQ_NONE;
3840
3841 /* Interrupt Auto-Mask...upon reading ICR,
3842 * interrupts are masked. No need for the
3843 * IMC write, but it does mean we should
3844 * account for it ASAP. */
3845 if (likely(hw->mac_type >= e1000_82571))
3846 atomic_inc(&adapter->irq_sem);
3847 #endif
3848
3849 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3850 hw->get_link_status = 1;
3851 /* 80003ES2LAN workaround--
3852 * For packet buffer work-around on link down event;
3853 * disable receives here in the ISR and
3854 * reset adapter in watchdog
3855 */
3856 if (netif_carrier_ok(netdev) &&
3857 (adapter->hw.mac_type == e1000_80003es2lan)) {
3858 /* disable receives */
3859 rctl = E1000_READ_REG(hw, RCTL);
3860 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3861 }
3862 /* guard against interrupt when we're going down */
3863 if (!test_bit(__E1000_DOWN, &adapter->flags))
3864 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3865 }
3866
3867 #ifdef CONFIG_E1000_NAPI
3868 if (unlikely(hw->mac_type < e1000_82571)) {
3869 /* disable interrupts, without the synchronize_irq bit */
3870 atomic_inc(&adapter->irq_sem);
3871 E1000_WRITE_REG(hw, IMC, ~0);
3872 E1000_WRITE_FLUSH(hw);
3873 }
3874 if (likely(netif_rx_schedule_prep(netdev))) {
3875 adapter->total_tx_bytes = 0;
3876 adapter->total_tx_packets = 0;
3877 adapter->total_rx_bytes = 0;
3878 adapter->total_rx_packets = 0;
3879 __netif_rx_schedule(netdev);
3880 } else
3881 /* this really should not happen! if it does it is basically a
3882 * bug, but not a hard error, so enable ints and continue */
3883 e1000_irq_enable(adapter);
3884 #else
3885 /* Writing IMC and IMS is needed for 82547.
3886 * Due to Hub Link bus being occupied, an interrupt
3887 * de-assertion message is not able to be sent.
3888 * When an interrupt assertion message is generated later,
3889 * two messages are re-ordered and sent out.
3890 * That causes APIC to think 82547 is in de-assertion
3891 * state, while 82547 is in assertion state, resulting
3892 * in dead lock. Writing IMC forces 82547 into
3893 * de-assertion state.
3894 */
3895 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3896 atomic_inc(&adapter->irq_sem);
3897 E1000_WRITE_REG(hw, IMC, ~0);
3898 }
3899
3900 adapter->total_tx_bytes = 0;
3901 adapter->total_rx_bytes = 0;
3902 adapter->total_tx_packets = 0;
3903 adapter->total_rx_packets = 0;
3904
3905 for (i = 0; i < E1000_MAX_INTR; i++)
3906 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3907 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3908 break;
3909
3910 if (likely(adapter->itr_setting & 3))
3911 e1000_set_itr(adapter);
3912
3913 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3914 e1000_irq_enable(adapter);
3915
3916 #endif
3917 return IRQ_HANDLED;
3918 }
3919
3920 #ifdef CONFIG_E1000_NAPI
3921 /**
3922 * e1000_clean - NAPI Rx polling callback
3923 * @adapter: board private structure
3924 **/
3925
3926 static int
3927 e1000_clean(struct net_device *poll_dev, int *budget)
3928 {
3929 struct e1000_adapter *adapter;
3930 int work_to_do = min(*budget, poll_dev->quota);
3931 int tx_cleaned = 0, work_done = 0;
3932
3933 /* Must NOT use netdev_priv macro here. */
3934 adapter = poll_dev->priv;
3935
3936 /* Keep link state information with original netdev */
3937 if (!netif_carrier_ok(poll_dev))
3938 goto quit_polling;
3939
3940 /* e1000_clean is called per-cpu. This lock protects
3941 * tx_ring[0] from being cleaned by multiple cpus
3942 * simultaneously. A failure obtaining the lock means
3943 * tx_ring[0] is currently being cleaned anyway. */
3944 if (spin_trylock(&adapter->tx_queue_lock)) {
3945 tx_cleaned = e1000_clean_tx_irq(adapter,
3946 &adapter->tx_ring[0]);
3947 spin_unlock(&adapter->tx_queue_lock);
3948 }
3949
3950 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3951 &work_done, work_to_do);
3952
3953 *budget -= work_done;
3954 poll_dev->quota -= work_done;
3955
3956 /* If no Tx and not enough Rx work done, exit the polling mode */
3957 if ((!tx_cleaned && (work_done == 0)) ||
3958 !netif_running(poll_dev)) {
3959 quit_polling:
3960 if (likely(adapter->itr_setting & 3))
3961 e1000_set_itr(adapter);
3962 netif_rx_complete(poll_dev);
3963 e1000_irq_enable(adapter);
3964 return 0;
3965 }
3966
3967 return 1;
3968 }
3969
3970 #endif
3971 /**
3972 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3973 * @adapter: board private structure
3974 **/
3975
3976 static boolean_t
3977 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3978 struct e1000_tx_ring *tx_ring)
3979 {
3980 struct net_device *netdev = adapter->netdev;
3981 struct e1000_tx_desc *tx_desc, *eop_desc;
3982 struct e1000_buffer *buffer_info;
3983 unsigned int i, eop;
3984 #ifdef CONFIG_E1000_NAPI
3985 unsigned int count = 0;
3986 #endif
3987 boolean_t cleaned = FALSE;
3988 unsigned int total_tx_bytes=0, total_tx_packets=0;
3989
3990 i = tx_ring->next_to_clean;
3991 eop = tx_ring->buffer_info[i].next_to_watch;
3992 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3993
3994 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3995 for (cleaned = FALSE; !cleaned; ) {
3996 tx_desc = E1000_TX_DESC(*tx_ring, i);
3997 buffer_info = &tx_ring->buffer_info[i];
3998 cleaned = (i == eop);
3999
4000 if (cleaned) {
4001 struct sk_buff *skb = buffer_info->skb;
4002 unsigned int segs, bytecount;
4003 segs = skb_shinfo(skb)->gso_segs ?: 1;
4004 /* multiply data chunks by size of headers */
4005 bytecount = ((segs - 1) * skb_headlen(skb)) +
4006 skb->len;
4007 total_tx_packets += segs;
4008 total_tx_bytes += bytecount;
4009 }
4010 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
4011 tx_desc->upper.data = 0;
4012
4013 if (unlikely(++i == tx_ring->count)) i = 0;
4014 }
4015
4016 eop = tx_ring->buffer_info[i].next_to_watch;
4017 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4018 #ifdef CONFIG_E1000_NAPI
4019 #define E1000_TX_WEIGHT 64
4020 /* weight of a sort for tx, to avoid endless transmit cleanup */
4021 if (count++ == E1000_TX_WEIGHT) break;
4022 #endif
4023 }
4024
4025 tx_ring->next_to_clean = i;
4026
4027 #define TX_WAKE_THRESHOLD 32
4028 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
4029 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
4030 /* Make sure that anybody stopping the queue after this
4031 * sees the new next_to_clean.
4032 */
4033 smp_mb();
4034 if (netif_queue_stopped(netdev)) {
4035 netif_wake_queue(netdev);
4036 ++adapter->restart_queue;
4037 }
4038 }
4039
4040 if (adapter->detect_tx_hung) {
4041 /* Detect a transmit hang in hardware, this serializes the
4042 * check with the clearing of time_stamp and movement of i */
4043 adapter->detect_tx_hung = FALSE;
4044 if (tx_ring->buffer_info[eop].dma &&
4045 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
4046 (adapter->tx_timeout_factor * HZ))
4047 && !(E1000_READ_REG(&adapter->hw, STATUS) &
4048 E1000_STATUS_TXOFF)) {
4049
4050 /* detected Tx unit hang */
4051 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
4052 " Tx Queue <%lu>\n"
4053 " TDH <%x>\n"
4054 " TDT <%x>\n"
4055 " next_to_use <%x>\n"
4056 " next_to_clean <%x>\n"
4057 "buffer_info[next_to_clean]\n"
4058 " time_stamp <%lx>\n"
4059 " next_to_watch <%x>\n"
4060 " jiffies <%lx>\n"
4061 " next_to_watch.status <%x>\n",
4062 (unsigned long)((tx_ring - adapter->tx_ring) /
4063 sizeof(struct e1000_tx_ring)),
4064 readl(adapter->hw.hw_addr + tx_ring->tdh),
4065 readl(adapter->hw.hw_addr + tx_ring->tdt),
4066 tx_ring->next_to_use,
4067 tx_ring->next_to_clean,
4068 tx_ring->buffer_info[eop].time_stamp,
4069 eop,
4070 jiffies,
4071 eop_desc->upper.fields.status);
4072 netif_stop_queue(netdev);
4073 }
4074 }
4075 adapter->total_tx_bytes += total_tx_bytes;
4076 adapter->total_tx_packets += total_tx_packets;
4077 return cleaned;
4078 }
4079
4080 /**
4081 * e1000_rx_checksum - Receive Checksum Offload for 82543
4082 * @adapter: board private structure
4083 * @status_err: receive descriptor status and error fields
4084 * @csum: receive descriptor csum field
4085 * @sk_buff: socket buffer with received data
4086 **/
4087
4088 static void
4089 e1000_rx_checksum(struct e1000_adapter *adapter,
4090 uint32_t status_err, uint32_t csum,
4091 struct sk_buff *skb)
4092 {
4093 uint16_t status = (uint16_t)status_err;
4094 uint8_t errors = (uint8_t)(status_err >> 24);
4095 skb->ip_summed = CHECKSUM_NONE;
4096
4097 /* 82543 or newer only */
4098 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
4099 /* Ignore Checksum bit is set */
4100 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
4101 /* TCP/UDP checksum error bit is set */
4102 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
4103 /* let the stack verify checksum errors */
4104 adapter->hw_csum_err++;
4105 return;
4106 }
4107 /* TCP/UDP Checksum has not been calculated */
4108 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
4109 if (!(status & E1000_RXD_STAT_TCPCS))
4110 return;
4111 } else {
4112 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
4113 return;
4114 }
4115 /* It must be a TCP or UDP packet with a valid checksum */
4116 if (likely(status & E1000_RXD_STAT_TCPCS)) {
4117 /* TCP checksum is good */
4118 skb->ip_summed = CHECKSUM_UNNECESSARY;
4119 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
4120 /* IP fragment with UDP payload */
4121 /* Hardware complements the payload checksum, so we undo it
4122 * and then put the value in host order for further stack use.
4123 */
4124 csum = ntohl(csum ^ 0xFFFF);
4125 skb->csum = csum;
4126 skb->ip_summed = CHECKSUM_COMPLETE;
4127 }
4128 adapter->hw_csum_good++;
4129 }
4130
4131 /**
4132 * e1000_clean_rx_irq - Send received data up the network stack; legacy
4133 * @adapter: board private structure
4134 **/
4135
4136 static boolean_t
4137 #ifdef CONFIG_E1000_NAPI
4138 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4139 struct e1000_rx_ring *rx_ring,
4140 int *work_done, int work_to_do)
4141 #else
4142 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4143 struct e1000_rx_ring *rx_ring)
4144 #endif
4145 {
4146 struct net_device *netdev = adapter->netdev;
4147 struct pci_dev *pdev = adapter->pdev;
4148 struct e1000_rx_desc *rx_desc, *next_rxd;
4149 struct e1000_buffer *buffer_info, *next_buffer;
4150 unsigned long flags;
4151 uint32_t length;
4152 uint8_t last_byte;
4153 unsigned int i;
4154 int cleaned_count = 0;
4155 boolean_t cleaned = FALSE;
4156 unsigned int total_rx_bytes=0, total_rx_packets=0;
4157
4158 i = rx_ring->next_to_clean;
4159 rx_desc = E1000_RX_DESC(*rx_ring, i);
4160 buffer_info = &rx_ring->buffer_info[i];
4161
4162 while (rx_desc->status & E1000_RXD_STAT_DD) {
4163 struct sk_buff *skb;
4164 u8 status;
4165
4166 #ifdef CONFIG_E1000_NAPI
4167 if (*work_done >= work_to_do)
4168 break;
4169 (*work_done)++;
4170 #endif
4171 status = rx_desc->status;
4172 skb = buffer_info->skb;
4173 buffer_info->skb = NULL;
4174
4175 prefetch(skb->data - NET_IP_ALIGN);
4176
4177 if (++i == rx_ring->count) i = 0;
4178 next_rxd = E1000_RX_DESC(*rx_ring, i);
4179 prefetch(next_rxd);
4180
4181 next_buffer = &rx_ring->buffer_info[i];
4182
4183 cleaned = TRUE;
4184 cleaned_count++;
4185 pci_unmap_single(pdev,
4186 buffer_info->dma,
4187 buffer_info->length,
4188 PCI_DMA_FROMDEVICE);
4189
4190 length = le16_to_cpu(rx_desc->length);
4191
4192 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4193 /* All receives must fit into a single buffer */
4194 E1000_DBG("%s: Receive packet consumed multiple"
4195 " buffers\n", netdev->name);
4196 /* recycle */
4197 buffer_info->skb = skb;
4198 goto next_desc;
4199 }
4200
4201 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4202 last_byte = *(skb->data + length - 1);
4203 if (TBI_ACCEPT(&adapter->hw, status,
4204 rx_desc->errors, length, last_byte)) {
4205 spin_lock_irqsave(&adapter->stats_lock, flags);
4206 e1000_tbi_adjust_stats(&adapter->hw,
4207 &adapter->stats,
4208 length, skb->data);
4209 spin_unlock_irqrestore(&adapter->stats_lock,
4210 flags);
4211 length--;
4212 } else {
4213 /* recycle */
4214 buffer_info->skb = skb;
4215 goto next_desc;
4216 }
4217 }
4218
4219 /* adjust length to remove Ethernet CRC, this must be
4220 * done after the TBI_ACCEPT workaround above */
4221 length -= 4;
4222
4223 /* probably a little skewed due to removing CRC */
4224 total_rx_bytes += length;
4225 total_rx_packets++;
4226
4227 /* code added for copybreak, this should improve
4228 * performance for small packets with large amounts
4229 * of reassembly being done in the stack */
4230 if (length < copybreak) {
4231 struct sk_buff *new_skb =
4232 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4233 if (new_skb) {
4234 skb_reserve(new_skb, NET_IP_ALIGN);
4235 skb_copy_to_linear_data_offset(new_skb,
4236 -NET_IP_ALIGN,
4237 (skb->data -
4238 NET_IP_ALIGN),
4239 (length +
4240 NET_IP_ALIGN));
4241 /* save the skb in buffer_info as good */
4242 buffer_info->skb = skb;
4243 skb = new_skb;
4244 }
4245 /* else just continue with the old one */
4246 }
4247 /* end copybreak code */
4248 skb_put(skb, length);
4249
4250 /* Receive Checksum Offload */
4251 e1000_rx_checksum(adapter,
4252 (uint32_t)(status) |
4253 ((uint32_t)(rx_desc->errors) << 24),
4254 le16_to_cpu(rx_desc->csum), skb);
4255
4256 skb->protocol = eth_type_trans(skb, netdev);
4257 #ifdef CONFIG_E1000_NAPI
4258 if (unlikely(adapter->vlgrp &&
4259 (status & E1000_RXD_STAT_VP))) {
4260 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4261 le16_to_cpu(rx_desc->special) &
4262 E1000_RXD_SPC_VLAN_MASK);
4263 } else {
4264 netif_receive_skb(skb);
4265 }
4266 #else /* CONFIG_E1000_NAPI */
4267 if (unlikely(adapter->vlgrp &&
4268 (status & E1000_RXD_STAT_VP))) {
4269 vlan_hwaccel_rx(skb, adapter->vlgrp,
4270 le16_to_cpu(rx_desc->special) &
4271 E1000_RXD_SPC_VLAN_MASK);
4272 } else {
4273 netif_rx(skb);
4274 }
4275 #endif /* CONFIG_E1000_NAPI */
4276 netdev->last_rx = jiffies;
4277
4278 next_desc:
4279 rx_desc->status = 0;
4280
4281 /* return some buffers to hardware, one at a time is too slow */
4282 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4283 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4284 cleaned_count = 0;
4285 }
4286
4287 /* use prefetched values */
4288 rx_desc = next_rxd;
4289 buffer_info = next_buffer;
4290 }
4291 rx_ring->next_to_clean = i;
4292
4293 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4294 if (cleaned_count)
4295 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4296
4297 adapter->total_rx_packets += total_rx_packets;
4298 adapter->total_rx_bytes += total_rx_bytes;
4299 return cleaned;
4300 }
4301
4302 /**
4303 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4304 * @adapter: board private structure
4305 **/
4306
4307 static boolean_t
4308 #ifdef CONFIG_E1000_NAPI
4309 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4310 struct e1000_rx_ring *rx_ring,
4311 int *work_done, int work_to_do)
4312 #else
4313 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4314 struct e1000_rx_ring *rx_ring)
4315 #endif
4316 {
4317 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
4318 struct net_device *netdev = adapter->netdev;
4319 struct pci_dev *pdev = adapter->pdev;
4320 struct e1000_buffer *buffer_info, *next_buffer;
4321 struct e1000_ps_page *ps_page;
4322 struct e1000_ps_page_dma *ps_page_dma;
4323 struct sk_buff *skb;
4324 unsigned int i, j;
4325 uint32_t length, staterr;
4326 int cleaned_count = 0;
4327 boolean_t cleaned = FALSE;
4328 unsigned int total_rx_bytes=0, total_rx_packets=0;
4329
4330 i = rx_ring->next_to_clean;
4331 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4332 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4333 buffer_info = &rx_ring->buffer_info[i];
4334
4335 while (staterr & E1000_RXD_STAT_DD) {
4336 ps_page = &rx_ring->ps_page[i];
4337 ps_page_dma = &rx_ring->ps_page_dma[i];
4338 #ifdef CONFIG_E1000_NAPI
4339 if (unlikely(*work_done >= work_to_do))
4340 break;
4341 (*work_done)++;
4342 #endif
4343 skb = buffer_info->skb;
4344
4345 /* in the packet split case this is header only */
4346 prefetch(skb->data - NET_IP_ALIGN);
4347
4348 if (++i == rx_ring->count) i = 0;
4349 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
4350 prefetch(next_rxd);
4351
4352 next_buffer = &rx_ring->buffer_info[i];
4353
4354 cleaned = TRUE;
4355 cleaned_count++;
4356 pci_unmap_single(pdev, buffer_info->dma,
4357 buffer_info->length,
4358 PCI_DMA_FROMDEVICE);
4359
4360 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
4361 E1000_DBG("%s: Packet Split buffers didn't pick up"
4362 " the full packet\n", netdev->name);
4363 dev_kfree_skb_irq(skb);
4364 goto next_desc;
4365 }
4366
4367 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
4368 dev_kfree_skb_irq(skb);
4369 goto next_desc;
4370 }
4371
4372 length = le16_to_cpu(rx_desc->wb.middle.length0);
4373
4374 if (unlikely(!length)) {
4375 E1000_DBG("%s: Last part of the packet spanning"
4376 " multiple descriptors\n", netdev->name);
4377 dev_kfree_skb_irq(skb);
4378 goto next_desc;
4379 }
4380
4381 /* Good Receive */
4382 skb_put(skb, length);
4383
4384 {
4385 /* this looks ugly, but it seems compiler issues make it
4386 more efficient than reusing j */
4387 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4388
4389 /* page alloc/put takes too long and effects small packet
4390 * throughput, so unsplit small packets and save the alloc/put*/
4391 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
4392 u8 *vaddr;
4393 /* there is no documentation about how to call
4394 * kmap_atomic, so we can't hold the mapping
4395 * very long */
4396 pci_dma_sync_single_for_cpu(pdev,
4397 ps_page_dma->ps_page_dma[0],
4398 PAGE_SIZE,
4399 PCI_DMA_FROMDEVICE);
4400 vaddr = kmap_atomic(ps_page->ps_page[0],
4401 KM_SKB_DATA_SOFTIRQ);
4402 memcpy(skb_tail_pointer(skb), vaddr, l1);
4403 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4404 pci_dma_sync_single_for_device(pdev,
4405 ps_page_dma->ps_page_dma[0],
4406 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4407 /* remove the CRC */
4408 l1 -= 4;
4409 skb_put(skb, l1);
4410 goto copydone;
4411 } /* if */
4412 }
4413
4414 for (j = 0; j < adapter->rx_ps_pages; j++) {
4415 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4416 break;
4417 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4418 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4419 ps_page_dma->ps_page_dma[j] = 0;
4420 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4421 length);
4422 ps_page->ps_page[j] = NULL;
4423 skb->len += length;
4424 skb->data_len += length;
4425 skb->truesize += length;
4426 }
4427
4428 /* strip the ethernet crc, problem is we're using pages now so
4429 * this whole operation can get a little cpu intensive */
4430 pskb_trim(skb, skb->len - 4);
4431
4432 copydone:
4433 total_rx_bytes += skb->len;
4434 total_rx_packets++;
4435
4436 e1000_rx_checksum(adapter, staterr,
4437 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4438 skb->protocol = eth_type_trans(skb, netdev);
4439
4440 if (likely(rx_desc->wb.upper.header_status &
4441 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4442 adapter->rx_hdr_split++;
4443 #ifdef CONFIG_E1000_NAPI
4444 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4445 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4446 le16_to_cpu(rx_desc->wb.middle.vlan) &
4447 E1000_RXD_SPC_VLAN_MASK);
4448 } else {
4449 netif_receive_skb(skb);
4450 }
4451 #else /* CONFIG_E1000_NAPI */
4452 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4453 vlan_hwaccel_rx(skb, adapter->vlgrp,
4454 le16_to_cpu(rx_desc->wb.middle.vlan) &
4455 E1000_RXD_SPC_VLAN_MASK);
4456 } else {
4457 netif_rx(skb);
4458 }
4459 #endif /* CONFIG_E1000_NAPI */
4460 netdev->last_rx = jiffies;
4461
4462 next_desc:
4463 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4464 buffer_info->skb = NULL;
4465
4466 /* return some buffers to hardware, one at a time is too slow */
4467 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4468 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4469 cleaned_count = 0;
4470 }
4471
4472 /* use prefetched values */
4473 rx_desc = next_rxd;
4474 buffer_info = next_buffer;
4475
4476 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4477 }
4478 rx_ring->next_to_clean = i;
4479
4480 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4481 if (cleaned_count)
4482 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4483
4484 adapter->total_rx_packets += total_rx_packets;
4485 adapter->total_rx_bytes += total_rx_bytes;
4486 return cleaned;
4487 }
4488
4489 /**
4490 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4491 * @adapter: address of board private structure
4492 **/
4493
4494 static void
4495 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4496 struct e1000_rx_ring *rx_ring,
4497 int cleaned_count)
4498 {
4499 struct net_device *netdev = adapter->netdev;
4500 struct pci_dev *pdev = adapter->pdev;
4501 struct e1000_rx_desc *rx_desc;
4502 struct e1000_buffer *buffer_info;
4503 struct sk_buff *skb;
4504 unsigned int i;
4505 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4506
4507 i = rx_ring->next_to_use;
4508 buffer_info = &rx_ring->buffer_info[i];
4509
4510 while (cleaned_count--) {
4511 skb = buffer_info->skb;
4512 if (skb) {
4513 skb_trim(skb, 0);
4514 goto map_skb;
4515 }
4516
4517 skb = netdev_alloc_skb(netdev, bufsz);
4518 if (unlikely(!skb)) {
4519 /* Better luck next round */
4520 adapter->alloc_rx_buff_failed++;
4521 break;
4522 }
4523
4524 /* Fix for errata 23, can't cross 64kB boundary */
4525 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4526 struct sk_buff *oldskb = skb;
4527 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4528 "at %p\n", bufsz, skb->data);
4529 /* Try again, without freeing the previous */
4530 skb = netdev_alloc_skb(netdev, bufsz);
4531 /* Failed allocation, critical failure */
4532 if (!skb) {
4533 dev_kfree_skb(oldskb);
4534 break;
4535 }
4536
4537 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4538 /* give up */
4539 dev_kfree_skb(skb);
4540 dev_kfree_skb(oldskb);
4541 break; /* while !buffer_info->skb */
4542 }
4543
4544 /* Use new allocation */
4545 dev_kfree_skb(oldskb);
4546 }
4547 /* Make buffer alignment 2 beyond a 16 byte boundary
4548 * this will result in a 16 byte aligned IP header after
4549 * the 14 byte MAC header is removed
4550 */
4551 skb_reserve(skb, NET_IP_ALIGN);
4552
4553 buffer_info->skb = skb;
4554 buffer_info->length = adapter->rx_buffer_len;
4555 map_skb:
4556 buffer_info->dma = pci_map_single(pdev,
4557 skb->data,
4558 adapter->rx_buffer_len,
4559 PCI_DMA_FROMDEVICE);
4560
4561 /* Fix for errata 23, can't cross 64kB boundary */
4562 if (!e1000_check_64k_bound(adapter,
4563 (void *)(unsigned long)buffer_info->dma,
4564 adapter->rx_buffer_len)) {
4565 DPRINTK(RX_ERR, ERR,
4566 "dma align check failed: %u bytes at %p\n",
4567 adapter->rx_buffer_len,
4568 (void *)(unsigned long)buffer_info->dma);
4569 dev_kfree_skb(skb);
4570 buffer_info->skb = NULL;
4571
4572 pci_unmap_single(pdev, buffer_info->dma,
4573 adapter->rx_buffer_len,
4574 PCI_DMA_FROMDEVICE);
4575
4576 break; /* while !buffer_info->skb */
4577 }
4578 rx_desc = E1000_RX_DESC(*rx_ring, i);
4579 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4580
4581 if (unlikely(++i == rx_ring->count))
4582 i = 0;
4583 buffer_info = &rx_ring->buffer_info[i];
4584 }
4585
4586 if (likely(rx_ring->next_to_use != i)) {
4587 rx_ring->next_to_use = i;
4588 if (unlikely(i-- == 0))
4589 i = (rx_ring->count - 1);
4590
4591 /* Force memory writes to complete before letting h/w
4592 * know there are new descriptors to fetch. (Only
4593 * applicable for weak-ordered memory model archs,
4594 * such as IA-64). */
4595 wmb();
4596 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4597 }
4598 }
4599
4600 /**
4601 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4602 * @adapter: address of board private structure
4603 **/
4604
4605 static void
4606 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4607 struct e1000_rx_ring *rx_ring,
4608 int cleaned_count)
4609 {
4610 struct net_device *netdev = adapter->netdev;
4611 struct pci_dev *pdev = adapter->pdev;
4612 union e1000_rx_desc_packet_split *rx_desc;
4613 struct e1000_buffer *buffer_info;
4614 struct e1000_ps_page *ps_page;
4615 struct e1000_ps_page_dma *ps_page_dma;
4616 struct sk_buff *skb;
4617 unsigned int i, j;
4618
4619 i = rx_ring->next_to_use;
4620 buffer_info = &rx_ring->buffer_info[i];
4621 ps_page = &rx_ring->ps_page[i];
4622 ps_page_dma = &rx_ring->ps_page_dma[i];
4623
4624 while (cleaned_count--) {
4625 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4626
4627 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4628 if (j < adapter->rx_ps_pages) {
4629 if (likely(!ps_page->ps_page[j])) {
4630 ps_page->ps_page[j] =
4631 alloc_page(GFP_ATOMIC);
4632 if (unlikely(!ps_page->ps_page[j])) {
4633 adapter->alloc_rx_buff_failed++;
4634 goto no_buffers;
4635 }
4636 ps_page_dma->ps_page_dma[j] =
4637 pci_map_page(pdev,
4638 ps_page->ps_page[j],
4639 0, PAGE_SIZE,
4640 PCI_DMA_FROMDEVICE);
4641 }
4642 /* Refresh the desc even if buffer_addrs didn't
4643 * change because each write-back erases
4644 * this info.
4645 */
4646 rx_desc->read.buffer_addr[j+1] =
4647 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4648 } else
4649 rx_desc->read.buffer_addr[j+1] = ~0;
4650 }
4651
4652 skb = netdev_alloc_skb(netdev,
4653 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4654
4655 if (unlikely(!skb)) {
4656 adapter->alloc_rx_buff_failed++;
4657 break;
4658 }
4659
4660 /* Make buffer alignment 2 beyond a 16 byte boundary
4661 * this will result in a 16 byte aligned IP header after
4662 * the 14 byte MAC header is removed
4663 */
4664 skb_reserve(skb, NET_IP_ALIGN);
4665
4666 buffer_info->skb = skb;
4667 buffer_info->length = adapter->rx_ps_bsize0;
4668 buffer_info->dma = pci_map_single(pdev, skb->data,
4669 adapter->rx_ps_bsize0,
4670 PCI_DMA_FROMDEVICE);
4671
4672 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4673
4674 if (unlikely(++i == rx_ring->count)) i = 0;
4675 buffer_info = &rx_ring->buffer_info[i];
4676 ps_page = &rx_ring->ps_page[i];
4677 ps_page_dma = &rx_ring->ps_page_dma[i];
4678 }
4679
4680 no_buffers:
4681 if (likely(rx_ring->next_to_use != i)) {
4682 rx_ring->next_to_use = i;
4683 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4684
4685 /* Force memory writes to complete before letting h/w
4686 * know there are new descriptors to fetch. (Only
4687 * applicable for weak-ordered memory model archs,
4688 * such as IA-64). */
4689 wmb();
4690 /* Hardware increments by 16 bytes, but packet split
4691 * descriptors are 32 bytes...so we increment tail
4692 * twice as much.
4693 */
4694 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4695 }
4696 }
4697
4698 /**
4699 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4700 * @adapter:
4701 **/
4702
4703 static void
4704 e1000_smartspeed(struct e1000_adapter *adapter)
4705 {
4706 uint16_t phy_status;
4707 uint16_t phy_ctrl;
4708
4709 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4710 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4711 return;
4712
4713 if (adapter->smartspeed == 0) {
4714 /* If Master/Slave config fault is asserted twice,
4715 * we assume back-to-back */
4716 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4717 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4718 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4719 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4720 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4721 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4722 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4723 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4724 phy_ctrl);
4725 adapter->smartspeed++;
4726 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4727 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4728 &phy_ctrl)) {
4729 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4730 MII_CR_RESTART_AUTO_NEG);
4731 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4732 phy_ctrl);
4733 }
4734 }
4735 return;
4736 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4737 /* If still no link, perhaps using 2/3 pair cable */
4738 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4739 phy_ctrl |= CR_1000T_MS_ENABLE;
4740 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4741 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4742 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4743 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4744 MII_CR_RESTART_AUTO_NEG);
4745 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4746 }
4747 }
4748 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4749 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4750 adapter->smartspeed = 0;
4751 }
4752
4753 /**
4754 * e1000_ioctl -
4755 * @netdev:
4756 * @ifreq:
4757 * @cmd:
4758 **/
4759
4760 static int
4761 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4762 {
4763 switch (cmd) {
4764 case SIOCGMIIPHY:
4765 case SIOCGMIIREG:
4766 case SIOCSMIIREG:
4767 return e1000_mii_ioctl(netdev, ifr, cmd);
4768 default:
4769 return -EOPNOTSUPP;
4770 }
4771 }
4772
4773 /**
4774 * e1000_mii_ioctl -
4775 * @netdev:
4776 * @ifreq:
4777 * @cmd:
4778 **/
4779
4780 static int
4781 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4782 {
4783 struct e1000_adapter *adapter = netdev_priv(netdev);
4784 struct mii_ioctl_data *data = if_mii(ifr);
4785 int retval;
4786 uint16_t mii_reg;
4787 uint16_t spddplx;
4788 unsigned long flags;
4789
4790 if (adapter->hw.media_type != e1000_media_type_copper)
4791 return -EOPNOTSUPP;
4792
4793 switch (cmd) {
4794 case SIOCGMIIPHY:
4795 data->phy_id = adapter->hw.phy_addr;
4796 break;
4797 case SIOCGMIIREG:
4798 if (!capable(CAP_NET_ADMIN))
4799 return -EPERM;
4800 spin_lock_irqsave(&adapter->stats_lock, flags);
4801 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4802 &data->val_out)) {
4803 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4804 return -EIO;
4805 }
4806 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4807 break;
4808 case SIOCSMIIREG:
4809 if (!capable(CAP_NET_ADMIN))
4810 return -EPERM;
4811 if (data->reg_num & ~(0x1F))
4812 return -EFAULT;
4813 mii_reg = data->val_in;
4814 spin_lock_irqsave(&adapter->stats_lock, flags);
4815 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4816 mii_reg)) {
4817 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4818 return -EIO;
4819 }
4820 if (adapter->hw.media_type == e1000_media_type_copper) {
4821 switch (data->reg_num) {
4822 case PHY_CTRL:
4823 if (mii_reg & MII_CR_POWER_DOWN)
4824 break;
4825 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4826 adapter->hw.autoneg = 1;
4827 adapter->hw.autoneg_advertised = 0x2F;
4828 } else {
4829 if (mii_reg & 0x40)
4830 spddplx = SPEED_1000;
4831 else if (mii_reg & 0x2000)
4832 spddplx = SPEED_100;
4833 else
4834 spddplx = SPEED_10;
4835 spddplx += (mii_reg & 0x100)
4836 ? DUPLEX_FULL :
4837 DUPLEX_HALF;
4838 retval = e1000_set_spd_dplx(adapter,
4839 spddplx);
4840 if (retval) {
4841 spin_unlock_irqrestore(
4842 &adapter->stats_lock,
4843 flags);
4844 return retval;
4845 }
4846 }
4847 if (netif_running(adapter->netdev))
4848 e1000_reinit_locked(adapter);
4849 else
4850 e1000_reset(adapter);
4851 break;
4852 case M88E1000_PHY_SPEC_CTRL:
4853 case M88E1000_EXT_PHY_SPEC_CTRL:
4854 if (e1000_phy_reset(&adapter->hw)) {
4855 spin_unlock_irqrestore(
4856 &adapter->stats_lock, flags);
4857 return -EIO;
4858 }
4859 break;
4860 }
4861 } else {
4862 switch (data->reg_num) {
4863 case PHY_CTRL:
4864 if (mii_reg & MII_CR_POWER_DOWN)
4865 break;
4866 if (netif_running(adapter->netdev))
4867 e1000_reinit_locked(adapter);
4868 else
4869 e1000_reset(adapter);
4870 break;
4871 }
4872 }
4873 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4874 break;
4875 default:
4876 return -EOPNOTSUPP;
4877 }
4878 return E1000_SUCCESS;
4879 }
4880
4881 void
4882 e1000_pci_set_mwi(struct e1000_hw *hw)
4883 {
4884 struct e1000_adapter *adapter = hw->back;
4885 int ret_val = pci_set_mwi(adapter->pdev);
4886
4887 if (ret_val)
4888 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4889 }
4890
4891 void
4892 e1000_pci_clear_mwi(struct e1000_hw *hw)
4893 {
4894 struct e1000_adapter *adapter = hw->back;
4895
4896 pci_clear_mwi(adapter->pdev);
4897 }
4898
4899 void
4900 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4901 {
4902 struct e1000_adapter *adapter = hw->back;
4903
4904 pci_read_config_word(adapter->pdev, reg, value);
4905 }
4906
4907 void
4908 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4909 {
4910 struct e1000_adapter *adapter = hw->back;
4911
4912 pci_write_config_word(adapter->pdev, reg, *value);
4913 }
4914
4915 int32_t
4916 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4917 {
4918 struct e1000_adapter *adapter = hw->back;
4919 uint16_t cap_offset;
4920
4921 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4922 if (!cap_offset)
4923 return -E1000_ERR_CONFIG;
4924
4925 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4926
4927 return E1000_SUCCESS;
4928 }
4929
4930 void
4931 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4932 {
4933 outl(value, port);
4934 }
4935
4936 static void
4937 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4938 {
4939 struct e1000_adapter *adapter = netdev_priv(netdev);
4940 uint32_t ctrl, rctl;
4941
4942 e1000_irq_disable(adapter);
4943 adapter->vlgrp = grp;
4944
4945 if (grp) {
4946 /* enable VLAN tag insert/strip */
4947 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4948 ctrl |= E1000_CTRL_VME;
4949 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4950
4951 if (adapter->hw.mac_type != e1000_ich8lan) {
4952 /* enable VLAN receive filtering */
4953 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4954 rctl |= E1000_RCTL_VFE;
4955 rctl &= ~E1000_RCTL_CFIEN;
4956 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4957 e1000_update_mng_vlan(adapter);
4958 }
4959 } else {
4960 /* disable VLAN tag insert/strip */
4961 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4962 ctrl &= ~E1000_CTRL_VME;
4963 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4964
4965 if (adapter->hw.mac_type != e1000_ich8lan) {
4966 /* disable VLAN filtering */
4967 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4968 rctl &= ~E1000_RCTL_VFE;
4969 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4970 if (adapter->mng_vlan_id !=
4971 (uint16_t)E1000_MNG_VLAN_NONE) {
4972 e1000_vlan_rx_kill_vid(netdev,
4973 adapter->mng_vlan_id);
4974 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4975 }
4976 }
4977 }
4978
4979 e1000_irq_enable(adapter);
4980 }
4981
4982 static void
4983 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4984 {
4985 struct e1000_adapter *adapter = netdev_priv(netdev);
4986 uint32_t vfta, index;
4987
4988 if ((adapter->hw.mng_cookie.status &
4989 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4990 (vid == adapter->mng_vlan_id))
4991 return;
4992 /* add VID to filter table */
4993 index = (vid >> 5) & 0x7F;
4994 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4995 vfta |= (1 << (vid & 0x1F));
4996 e1000_write_vfta(&adapter->hw, index, vfta);
4997 }
4998
4999 static void
5000 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
5001 {
5002 struct e1000_adapter *adapter = netdev_priv(netdev);
5003 uint32_t vfta, index;
5004
5005 e1000_irq_disable(adapter);
5006 vlan_group_set_device(adapter->vlgrp, vid, NULL);
5007 e1000_irq_enable(adapter);
5008
5009 if ((adapter->hw.mng_cookie.status &
5010 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5011 (vid == adapter->mng_vlan_id)) {
5012 /* release control to f/w */
5013 e1000_release_hw_control(adapter);
5014 return;
5015 }
5016
5017 /* remove VID from filter table */
5018 index = (vid >> 5) & 0x7F;
5019 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5020 vfta &= ~(1 << (vid & 0x1F));
5021 e1000_write_vfta(&adapter->hw, index, vfta);
5022 }
5023
5024 static void
5025 e1000_restore_vlan(struct e1000_adapter *adapter)
5026 {
5027 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
5028
5029 if (adapter->vlgrp) {
5030 uint16_t vid;
5031 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5032 if (!vlan_group_get_device(adapter->vlgrp, vid))
5033 continue;
5034 e1000_vlan_rx_add_vid(adapter->netdev, vid);
5035 }
5036 }
5037 }
5038
5039 int
5040 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
5041 {
5042 adapter->hw.autoneg = 0;
5043
5044 /* Fiber NICs only allow 1000 gbps Full duplex */
5045 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
5046 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
5047 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5048 return -EINVAL;
5049 }
5050
5051 switch (spddplx) {
5052 case SPEED_10 + DUPLEX_HALF:
5053 adapter->hw.forced_speed_duplex = e1000_10_half;
5054 break;
5055 case SPEED_10 + DUPLEX_FULL:
5056 adapter->hw.forced_speed_duplex = e1000_10_full;
5057 break;
5058 case SPEED_100 + DUPLEX_HALF:
5059 adapter->hw.forced_speed_duplex = e1000_100_half;
5060 break;
5061 case SPEED_100 + DUPLEX_FULL:
5062 adapter->hw.forced_speed_duplex = e1000_100_full;
5063 break;
5064 case SPEED_1000 + DUPLEX_FULL:
5065 adapter->hw.autoneg = 1;
5066 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
5067 break;
5068 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5069 default:
5070 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5071 return -EINVAL;
5072 }
5073 return 0;
5074 }
5075
5076 static int
5077 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5078 {
5079 struct net_device *netdev = pci_get_drvdata(pdev);
5080 struct e1000_adapter *adapter = netdev_priv(netdev);
5081 uint32_t ctrl, ctrl_ext, rctl, status;
5082 uint32_t wufc = adapter->wol;
5083 #ifdef CONFIG_PM
5084 int retval = 0;
5085 #endif
5086
5087 netif_device_detach(netdev);
5088
5089 if (netif_running(netdev)) {
5090 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
5091 e1000_down(adapter);
5092 }
5093
5094 #ifdef CONFIG_PM
5095 retval = pci_save_state(pdev);
5096 if (retval)
5097 return retval;
5098 #endif
5099
5100 status = E1000_READ_REG(&adapter->hw, STATUS);
5101 if (status & E1000_STATUS_LU)
5102 wufc &= ~E1000_WUFC_LNKC;
5103
5104 if (wufc) {
5105 e1000_setup_rctl(adapter);
5106 e1000_set_multi(netdev);
5107
5108 /* turn on all-multi mode if wake on multicast is enabled */
5109 if (wufc & E1000_WUFC_MC) {
5110 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5111 rctl |= E1000_RCTL_MPE;
5112 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5113 }
5114
5115 if (adapter->hw.mac_type >= e1000_82540) {
5116 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5117 /* advertise wake from D3Cold */
5118 #define E1000_CTRL_ADVD3WUC 0x00100000
5119 /* phy power management enable */
5120 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5121 ctrl |= E1000_CTRL_ADVD3WUC |
5122 E1000_CTRL_EN_PHY_PWR_MGMT;
5123 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5124 }
5125
5126 if (adapter->hw.media_type == e1000_media_type_fiber ||
5127 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5128 /* keep the laser running in D3 */
5129 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5130 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5131 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5132 }
5133
5134 /* Allow time for pending master requests to run */
5135 e1000_disable_pciex_master(&adapter->hw);
5136
5137 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5138 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
5139 pci_enable_wake(pdev, PCI_D3hot, 1);
5140 pci_enable_wake(pdev, PCI_D3cold, 1);
5141 } else {
5142 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5143 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
5144 pci_enable_wake(pdev, PCI_D3hot, 0);
5145 pci_enable_wake(pdev, PCI_D3cold, 0);
5146 }
5147
5148 e1000_release_manageability(adapter);
5149
5150 /* make sure adapter isn't asleep if manageability is enabled */
5151 if (adapter->en_mng_pt) {
5152 pci_enable_wake(pdev, PCI_D3hot, 1);
5153 pci_enable_wake(pdev, PCI_D3cold, 1);
5154 }
5155
5156 if (adapter->hw.phy_type == e1000_phy_igp_3)
5157 e1000_phy_powerdown_workaround(&adapter->hw);
5158
5159 if (netif_running(netdev))
5160 e1000_free_irq(adapter);
5161
5162 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5163 * would have already happened in close and is redundant. */
5164 e1000_release_hw_control(adapter);
5165
5166 pci_disable_device(pdev);
5167
5168 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5169
5170 return 0;
5171 }
5172
5173 #ifdef CONFIG_PM
5174 static int
5175 e1000_resume(struct pci_dev *pdev)
5176 {
5177 struct net_device *netdev = pci_get_drvdata(pdev);
5178 struct e1000_adapter *adapter = netdev_priv(netdev);
5179 uint32_t err;
5180
5181 pci_set_power_state(pdev, PCI_D0);
5182 pci_restore_state(pdev);
5183 if ((err = pci_enable_device(pdev))) {
5184 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5185 return err;
5186 }
5187 pci_set_master(pdev);
5188
5189 pci_enable_wake(pdev, PCI_D3hot, 0);
5190 pci_enable_wake(pdev, PCI_D3cold, 0);
5191
5192 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5193 return err;
5194
5195 e1000_power_up_phy(adapter);
5196 e1000_reset(adapter);
5197 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5198
5199 e1000_init_manageability(adapter);
5200
5201 if (netif_running(netdev))
5202 e1000_up(adapter);
5203
5204 netif_device_attach(netdev);
5205
5206 /* If the controller is 82573 and f/w is AMT, do not set
5207 * DRV_LOAD until the interface is up. For all other cases,
5208 * let the f/w know that the h/w is now under the control
5209 * of the driver. */
5210 if (adapter->hw.mac_type != e1000_82573 ||
5211 !e1000_check_mng_mode(&adapter->hw))
5212 e1000_get_hw_control(adapter);
5213
5214 return 0;
5215 }
5216 #endif
5217
5218 static void e1000_shutdown(struct pci_dev *pdev)
5219 {
5220 e1000_suspend(pdev, PMSG_SUSPEND);
5221 }
5222
5223 #ifdef CONFIG_NET_POLL_CONTROLLER
5224 /*
5225 * Polling 'interrupt' - used by things like netconsole to send skbs
5226 * without having to re-enable interrupts. It's not called while
5227 * the interrupt routine is executing.
5228 */
5229 static void
5230 e1000_netpoll(struct net_device *netdev)
5231 {
5232 struct e1000_adapter *adapter = netdev_priv(netdev);
5233
5234 disable_irq(adapter->pdev->irq);
5235 e1000_intr(adapter->pdev->irq, netdev);
5236 e1000_clean_tx_irq(adapter, adapter->tx_ring);
5237 #ifndef CONFIG_E1000_NAPI
5238 adapter->clean_rx(adapter, adapter->rx_ring);
5239 #endif
5240 enable_irq(adapter->pdev->irq);
5241 }
5242 #endif
5243
5244 /**
5245 * e1000_io_error_detected - called when PCI error is detected
5246 * @pdev: Pointer to PCI device
5247 * @state: The current pci conneection state
5248 *
5249 * This function is called after a PCI bus error affecting
5250 * this device has been detected.
5251 */
5252 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5253 {
5254 struct net_device *netdev = pci_get_drvdata(pdev);
5255 struct e1000_adapter *adapter = netdev->priv;
5256
5257 netif_device_detach(netdev);
5258
5259 if (netif_running(netdev))
5260 e1000_down(adapter);
5261 pci_disable_device(pdev);
5262
5263 /* Request a slot slot reset. */
5264 return PCI_ERS_RESULT_NEED_RESET;
5265 }
5266
5267 /**
5268 * e1000_io_slot_reset - called after the pci bus has been reset.
5269 * @pdev: Pointer to PCI device
5270 *
5271 * Restart the card from scratch, as if from a cold-boot. Implementation
5272 * resembles the first-half of the e1000_resume routine.
5273 */
5274 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5275 {
5276 struct net_device *netdev = pci_get_drvdata(pdev);
5277 struct e1000_adapter *adapter = netdev->priv;
5278
5279 if (pci_enable_device(pdev)) {
5280 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5281 return PCI_ERS_RESULT_DISCONNECT;
5282 }
5283 pci_set_master(pdev);
5284
5285 pci_enable_wake(pdev, PCI_D3hot, 0);
5286 pci_enable_wake(pdev, PCI_D3cold, 0);
5287
5288 e1000_reset(adapter);
5289 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5290
5291 return PCI_ERS_RESULT_RECOVERED;
5292 }
5293
5294 /**
5295 * e1000_io_resume - called when traffic can start flowing again.
5296 * @pdev: Pointer to PCI device
5297 *
5298 * This callback is called when the error recovery driver tells us that
5299 * its OK to resume normal operation. Implementation resembles the
5300 * second-half of the e1000_resume routine.
5301 */
5302 static void e1000_io_resume(struct pci_dev *pdev)
5303 {
5304 struct net_device *netdev = pci_get_drvdata(pdev);
5305 struct e1000_adapter *adapter = netdev->priv;
5306
5307 e1000_init_manageability(adapter);
5308
5309 if (netif_running(netdev)) {
5310 if (e1000_up(adapter)) {
5311 printk("e1000: can't bring device back up after reset\n");
5312 return;
5313 }
5314 }
5315
5316 netif_device_attach(netdev);
5317
5318 /* If the controller is 82573 and f/w is AMT, do not set
5319 * DRV_LOAD until the interface is up. For all other cases,
5320 * let the f/w know that the h/w is now under the control
5321 * of the driver. */
5322 if (adapter->hw.mac_type != e1000_82573 ||
5323 !e1000_check_mng_mode(&adapter->hw))
5324 e1000_get_hw_control(adapter);
5325
5326 }
5327
5328 /* e1000_main.c */
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