2 * ARM implementation of KVM hooks
4 * Copyright Christoffer Dall 2009-2010
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
11 #include "qemu/osdep.h"
12 #include <sys/ioctl.h>
14 #include <linux/kvm.h>
16 #include "qemu-common.h"
17 #include "qemu/timer.h"
18 #include "qemu/error-report.h"
19 #include "qemu/main-loop.h"
20 #include "qom/object.h"
21 #include "qapi/error.h"
22 #include "sysemu/sysemu.h"
23 #include "sysemu/kvm.h"
24 #include "sysemu/kvm_int.h"
28 #include "internals.h"
29 #include "hw/pci/pci.h"
30 #include "exec/memattrs.h"
31 #include "exec/address-spaces.h"
32 #include "hw/boards.h"
36 const KVMCapabilityInfo kvm_arch_required_capabilities
[] = {
40 static bool cap_has_mp_state
;
41 static bool cap_has_inject_serror_esr
;
43 static ARMHostCPUFeatures arm_host_cpu_features
;
45 int kvm_arm_vcpu_init(CPUState
*cs
)
47 ARMCPU
*cpu
= ARM_CPU(cs
);
48 struct kvm_vcpu_init init
;
50 init
.target
= cpu
->kvm_target
;
51 memcpy(init
.features
, cpu
->kvm_init_features
, sizeof(init
.features
));
53 return kvm_vcpu_ioctl(cs
, KVM_ARM_VCPU_INIT
, &init
);
56 int kvm_arm_vcpu_finalize(CPUState
*cs
, int feature
)
58 return kvm_vcpu_ioctl(cs
, KVM_ARM_VCPU_FINALIZE
, &feature
);
61 void kvm_arm_init_serror_injection(CPUState
*cs
)
63 cap_has_inject_serror_esr
= kvm_check_extension(cs
->kvm_state
,
64 KVM_CAP_ARM_INJECT_SERROR_ESR
);
67 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try
,
69 struct kvm_vcpu_init
*init
)
71 int ret
= 0, kvmfd
= -1, vmfd
= -1, cpufd
= -1;
73 kvmfd
= qemu_open("/dev/kvm", O_RDWR
);
77 vmfd
= ioctl(kvmfd
, KVM_CREATE_VM
, 0);
81 cpufd
= ioctl(vmfd
, KVM_CREATE_VCPU
, 0);
87 /* Caller doesn't want the VCPU to be initialized, so skip it */
91 if (init
->target
== -1) {
92 struct kvm_vcpu_init preferred
;
94 ret
= ioctl(vmfd
, KVM_ARM_PREFERRED_TARGET
, &preferred
);
96 init
->target
= preferred
.target
;
100 ret
= ioctl(cpufd
, KVM_ARM_VCPU_INIT
, init
);
104 } else if (cpus_to_try
) {
105 /* Old kernel which doesn't know about the
106 * PREFERRED_TARGET ioctl: we know it will only support
107 * creating one kind of guest CPU which is its preferred
110 struct kvm_vcpu_init
try;
112 while (*cpus_to_try
!= QEMU_KVM_ARM_TARGET_NONE
) {
113 try.target
= *cpus_to_try
++;
114 memcpy(try.features
, init
->features
, sizeof(init
->features
));
115 ret
= ioctl(cpufd
, KVM_ARM_VCPU_INIT
, &try);
123 init
->target
= try.target
;
125 /* Treat a NULL cpus_to_try argument the same as an empty
126 * list, which means we will fail the call since this must
127 * be an old kernel which doesn't support PREFERRED_TARGET.
153 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray
)
157 for (i
= 2; i
>= 0; i
--) {
162 void kvm_arm_set_cpu_features_from_host(ARMCPU
*cpu
)
164 CPUARMState
*env
= &cpu
->env
;
166 if (!arm_host_cpu_features
.dtb_compatible
) {
167 if (!kvm_enabled() ||
168 !kvm_arm_get_host_cpu_features(&arm_host_cpu_features
)) {
169 /* We can't report this error yet, so flag that we need to
170 * in arm_cpu_realizefn().
172 cpu
->kvm_target
= QEMU_KVM_ARM_TARGET_NONE
;
173 cpu
->host_cpu_probe_failed
= true;
178 cpu
->kvm_target
= arm_host_cpu_features
.target
;
179 cpu
->dtb_compatible
= arm_host_cpu_features
.dtb_compatible
;
180 cpu
->isar
= arm_host_cpu_features
.isar
;
181 env
->features
= arm_host_cpu_features
.features
;
184 static bool kvm_no_adjvtime_get(Object
*obj
, Error
**errp
)
186 return !ARM_CPU(obj
)->kvm_adjvtime
;
189 static void kvm_no_adjvtime_set(Object
*obj
, bool value
, Error
**errp
)
191 ARM_CPU(obj
)->kvm_adjvtime
= !value
;
194 /* KVM VCPU properties should be prefixed with "kvm-". */
195 void kvm_arm_add_vcpu_properties(Object
*obj
)
197 ARMCPU
*cpu
= ARM_CPU(obj
);
198 CPUARMState
*env
= &cpu
->env
;
200 if (arm_feature(env
, ARM_FEATURE_GENERIC_TIMER
)) {
201 cpu
->kvm_adjvtime
= true;
202 object_property_add_bool(obj
, "kvm-no-adjvtime", kvm_no_adjvtime_get
,
203 kvm_no_adjvtime_set
);
204 object_property_set_description(obj
, "kvm-no-adjvtime",
205 "Set on to disable the adjustment of "
206 "the virtual counter. VM stopped time "
211 bool kvm_arm_pmu_supported(void)
213 return kvm_check_extension(kvm_state
, KVM_CAP_ARM_PMU_V3
);
216 int kvm_arm_get_max_vm_ipa_size(MachineState
*ms
)
218 KVMState
*s
= KVM_STATE(ms
->accelerator
);
221 ret
= kvm_check_extension(s
, KVM_CAP_ARM_VM_IPA_SIZE
);
222 return ret
> 0 ? ret
: 40;
225 int kvm_arch_init(MachineState
*ms
, KVMState
*s
)
228 /* For ARM interrupt delivery is always asynchronous,
229 * whether we are using an in-kernel VGIC or not.
231 kvm_async_interrupts_allowed
= true;
234 * PSCI wakes up secondary cores, so we always need to
235 * have vCPUs waiting in kernel space
237 kvm_halt_in_kernel_allowed
= true;
239 cap_has_mp_state
= kvm_check_extension(s
, KVM_CAP_MP_STATE
);
241 if (ms
->smp
.cpus
> 256 &&
242 !kvm_check_extension(s
, KVM_CAP_ARM_IRQ_LINE_LAYOUT_2
)) {
243 error_report("Using more than 256 vcpus requires a host kernel "
244 "with KVM_CAP_ARM_IRQ_LINE_LAYOUT_2");
251 unsigned long kvm_arch_vcpu_id(CPUState
*cpu
)
253 return cpu
->cpu_index
;
256 /* We track all the KVM devices which need their memory addresses
257 * passing to the kernel in a list of these structures.
258 * When board init is complete we run through the list and
259 * tell the kernel the base addresses of the memory regions.
260 * We use a MemoryListener to track mapping and unmapping of
261 * the regions during board creation, so the board models don't
262 * need to do anything special for the KVM case.
264 * Sometimes the address must be OR'ed with some other fields
265 * (for example for KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION).
266 * @kda_addr_ormask aims at storing the value of those fields.
268 typedef struct KVMDevice
{
269 struct kvm_arm_device_addr kda
;
270 struct kvm_device_attr kdattr
;
271 uint64_t kda_addr_ormask
;
273 QSLIST_ENTRY(KVMDevice
) entries
;
277 static QSLIST_HEAD(, KVMDevice
) kvm_devices_head
;
279 static void kvm_arm_devlistener_add(MemoryListener
*listener
,
280 MemoryRegionSection
*section
)
284 QSLIST_FOREACH(kd
, &kvm_devices_head
, entries
) {
285 if (section
->mr
== kd
->mr
) {
286 kd
->kda
.addr
= section
->offset_within_address_space
;
291 static void kvm_arm_devlistener_del(MemoryListener
*listener
,
292 MemoryRegionSection
*section
)
296 QSLIST_FOREACH(kd
, &kvm_devices_head
, entries
) {
297 if (section
->mr
== kd
->mr
) {
303 static MemoryListener devlistener
= {
304 .region_add
= kvm_arm_devlistener_add
,
305 .region_del
= kvm_arm_devlistener_del
,
308 static void kvm_arm_set_device_addr(KVMDevice
*kd
)
310 struct kvm_device_attr
*attr
= &kd
->kdattr
;
313 /* If the device control API is available and we have a device fd on the
314 * KVMDevice struct, let's use the newer API
316 if (kd
->dev_fd
>= 0) {
317 uint64_t addr
= kd
->kda
.addr
;
319 addr
|= kd
->kda_addr_ormask
;
320 attr
->addr
= (uintptr_t)&addr
;
321 ret
= kvm_device_ioctl(kd
->dev_fd
, KVM_SET_DEVICE_ATTR
, attr
);
323 ret
= kvm_vm_ioctl(kvm_state
, KVM_ARM_SET_DEVICE_ADDR
, &kd
->kda
);
327 fprintf(stderr
, "Failed to set device address: %s\n",
333 static void kvm_arm_machine_init_done(Notifier
*notifier
, void *data
)
337 QSLIST_FOREACH_SAFE(kd
, &kvm_devices_head
, entries
, tkd
) {
338 if (kd
->kda
.addr
!= -1) {
339 kvm_arm_set_device_addr(kd
);
341 memory_region_unref(kd
->mr
);
342 QSLIST_REMOVE_HEAD(&kvm_devices_head
, entries
);
345 memory_listener_unregister(&devlistener
);
348 static Notifier notify
= {
349 .notify
= kvm_arm_machine_init_done
,
352 void kvm_arm_register_device(MemoryRegion
*mr
, uint64_t devid
, uint64_t group
,
353 uint64_t attr
, int dev_fd
, uint64_t addr_ormask
)
357 if (!kvm_irqchip_in_kernel()) {
361 if (QSLIST_EMPTY(&kvm_devices_head
)) {
362 memory_listener_register(&devlistener
, &address_space_memory
);
363 qemu_add_machine_init_done_notifier(¬ify
);
365 kd
= g_new0(KVMDevice
, 1);
369 kd
->kdattr
.flags
= 0;
370 kd
->kdattr
.group
= group
;
371 kd
->kdattr
.attr
= attr
;
373 kd
->kda_addr_ormask
= addr_ormask
;
374 QSLIST_INSERT_HEAD(&kvm_devices_head
, kd
, entries
);
375 memory_region_ref(kd
->mr
);
378 static int compare_u64(const void *a
, const void *b
)
380 if (*(uint64_t *)a
> *(uint64_t *)b
) {
383 if (*(uint64_t *)a
< *(uint64_t *)b
) {
390 * cpreg_values are sorted in ascending order by KVM register ID
391 * (see kvm_arm_init_cpreg_list). This allows us to cheaply find
392 * the storage for a KVM register by ID with a binary search.
394 static uint64_t *kvm_arm_get_cpreg_ptr(ARMCPU
*cpu
, uint64_t regidx
)
398 res
= bsearch(®idx
, cpu
->cpreg_indexes
, cpu
->cpreg_array_len
,
399 sizeof(uint64_t), compare_u64
);
402 return &cpu
->cpreg_values
[res
- cpu
->cpreg_indexes
];
405 /* Initialize the ARMCPU cpreg list according to the kernel's
406 * definition of what CPU registers it knows about (and throw away
407 * the previous TCG-created cpreg list).
409 int kvm_arm_init_cpreg_list(ARMCPU
*cpu
)
411 struct kvm_reg_list rl
;
412 struct kvm_reg_list
*rlp
;
413 int i
, ret
, arraylen
;
414 CPUState
*cs
= CPU(cpu
);
417 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_REG_LIST
, &rl
);
421 rlp
= g_malloc(sizeof(struct kvm_reg_list
) + rl
.n
* sizeof(uint64_t));
423 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_REG_LIST
, rlp
);
427 /* Sort the list we get back from the kernel, since cpreg_tuples
428 * must be in strictly ascending order.
430 qsort(&rlp
->reg
, rlp
->n
, sizeof(rlp
->reg
[0]), compare_u64
);
432 for (i
= 0, arraylen
= 0; i
< rlp
->n
; i
++) {
433 if (!kvm_arm_reg_syncs_via_cpreg_list(rlp
->reg
[i
])) {
436 switch (rlp
->reg
[i
] & KVM_REG_SIZE_MASK
) {
437 case KVM_REG_SIZE_U32
:
438 case KVM_REG_SIZE_U64
:
441 fprintf(stderr
, "Can't handle size of register in kernel list\n");
449 cpu
->cpreg_indexes
= g_renew(uint64_t, cpu
->cpreg_indexes
, arraylen
);
450 cpu
->cpreg_values
= g_renew(uint64_t, cpu
->cpreg_values
, arraylen
);
451 cpu
->cpreg_vmstate_indexes
= g_renew(uint64_t, cpu
->cpreg_vmstate_indexes
,
453 cpu
->cpreg_vmstate_values
= g_renew(uint64_t, cpu
->cpreg_vmstate_values
,
455 cpu
->cpreg_array_len
= arraylen
;
456 cpu
->cpreg_vmstate_array_len
= arraylen
;
458 for (i
= 0, arraylen
= 0; i
< rlp
->n
; i
++) {
459 uint64_t regidx
= rlp
->reg
[i
];
460 if (!kvm_arm_reg_syncs_via_cpreg_list(regidx
)) {
463 cpu
->cpreg_indexes
[arraylen
] = regidx
;
466 assert(cpu
->cpreg_array_len
== arraylen
);
468 if (!write_kvmstate_to_list(cpu
)) {
469 /* Shouldn't happen unless kernel is inconsistent about
470 * what registers exist.
472 fprintf(stderr
, "Initial read of kernel register state failed\n");
482 bool write_kvmstate_to_list(ARMCPU
*cpu
)
484 CPUState
*cs
= CPU(cpu
);
488 for (i
= 0; i
< cpu
->cpreg_array_len
; i
++) {
489 struct kvm_one_reg r
;
490 uint64_t regidx
= cpu
->cpreg_indexes
[i
];
496 switch (regidx
& KVM_REG_SIZE_MASK
) {
497 case KVM_REG_SIZE_U32
:
498 r
.addr
= (uintptr_t)&v32
;
499 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, &r
);
501 cpu
->cpreg_values
[i
] = v32
;
504 case KVM_REG_SIZE_U64
:
505 r
.addr
= (uintptr_t)(cpu
->cpreg_values
+ i
);
506 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, &r
);
518 bool write_list_to_kvmstate(ARMCPU
*cpu
, int level
)
520 CPUState
*cs
= CPU(cpu
);
524 for (i
= 0; i
< cpu
->cpreg_array_len
; i
++) {
525 struct kvm_one_reg r
;
526 uint64_t regidx
= cpu
->cpreg_indexes
[i
];
530 if (kvm_arm_cpreg_level(regidx
) > level
) {
535 switch (regidx
& KVM_REG_SIZE_MASK
) {
536 case KVM_REG_SIZE_U32
:
537 v32
= cpu
->cpreg_values
[i
];
538 r
.addr
= (uintptr_t)&v32
;
540 case KVM_REG_SIZE_U64
:
541 r
.addr
= (uintptr_t)(cpu
->cpreg_values
+ i
);
546 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, &r
);
548 /* We might fail for "unknown register" and also for
549 * "you tried to set a register which is constant with
550 * a different value from what it actually contains".
558 void kvm_arm_cpu_pre_save(ARMCPU
*cpu
)
560 /* KVM virtual time adjustment */
561 if (cpu
->kvm_vtime_dirty
) {
562 *kvm_arm_get_cpreg_ptr(cpu
, KVM_REG_ARM_TIMER_CNT
) = cpu
->kvm_vtime
;
566 void kvm_arm_cpu_post_load(ARMCPU
*cpu
)
568 /* KVM virtual time adjustment */
569 if (cpu
->kvm_adjvtime
) {
570 cpu
->kvm_vtime
= *kvm_arm_get_cpreg_ptr(cpu
, KVM_REG_ARM_TIMER_CNT
);
571 cpu
->kvm_vtime_dirty
= true;
575 void kvm_arm_reset_vcpu(ARMCPU
*cpu
)
579 /* Re-init VCPU so that all registers are set to
580 * their respective reset values.
582 ret
= kvm_arm_vcpu_init(CPU(cpu
));
584 fprintf(stderr
, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret
));
587 if (!write_kvmstate_to_list(cpu
)) {
588 fprintf(stderr
, "write_kvmstate_to_list failed\n");
592 * Sync the reset values also into the CPUState. This is necessary
593 * because the next thing we do will be a kvm_arch_put_registers()
594 * which will update the list values from the CPUState before copying
595 * the list values back to KVM. It's OK to ignore failure returns here
596 * for the same reason we do so in kvm_arch_get_registers().
598 write_list_to_cpustate(cpu
);
602 * Update KVM's MP_STATE based on what QEMU thinks it is
604 int kvm_arm_sync_mpstate_to_kvm(ARMCPU
*cpu
)
606 if (cap_has_mp_state
) {
607 struct kvm_mp_state mp_state
= {
608 .mp_state
= (cpu
->power_state
== PSCI_OFF
) ?
609 KVM_MP_STATE_STOPPED
: KVM_MP_STATE_RUNNABLE
611 int ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_SET_MP_STATE
, &mp_state
);
613 fprintf(stderr
, "%s: failed to set MP_STATE %d/%s\n",
614 __func__
, ret
, strerror(-ret
));
623 * Sync the KVM MP_STATE into QEMU
625 int kvm_arm_sync_mpstate_to_qemu(ARMCPU
*cpu
)
627 if (cap_has_mp_state
) {
628 struct kvm_mp_state mp_state
;
629 int ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_GET_MP_STATE
, &mp_state
);
631 fprintf(stderr
, "%s: failed to get MP_STATE %d/%s\n",
632 __func__
, ret
, strerror(-ret
));
635 cpu
->power_state
= (mp_state
.mp_state
== KVM_MP_STATE_STOPPED
) ?
642 void kvm_arm_get_virtual_time(CPUState
*cs
)
644 ARMCPU
*cpu
= ARM_CPU(cs
);
645 struct kvm_one_reg reg
= {
646 .id
= KVM_REG_ARM_TIMER_CNT
,
647 .addr
= (uintptr_t)&cpu
->kvm_vtime
,
651 if (cpu
->kvm_vtime_dirty
) {
655 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, ®
);
657 error_report("Failed to get KVM_REG_ARM_TIMER_CNT");
661 cpu
->kvm_vtime_dirty
= true;
664 void kvm_arm_put_virtual_time(CPUState
*cs
)
666 ARMCPU
*cpu
= ARM_CPU(cs
);
667 struct kvm_one_reg reg
= {
668 .id
= KVM_REG_ARM_TIMER_CNT
,
669 .addr
= (uintptr_t)&cpu
->kvm_vtime
,
673 if (!cpu
->kvm_vtime_dirty
) {
677 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, ®
);
679 error_report("Failed to set KVM_REG_ARM_TIMER_CNT");
683 cpu
->kvm_vtime_dirty
= false;
686 int kvm_put_vcpu_events(ARMCPU
*cpu
)
688 CPUARMState
*env
= &cpu
->env
;
689 struct kvm_vcpu_events events
;
692 if (!kvm_has_vcpu_events()) {
696 memset(&events
, 0, sizeof(events
));
697 events
.exception
.serror_pending
= env
->serror
.pending
;
699 /* Inject SError to guest with specified syndrome if host kernel
700 * supports it, otherwise inject SError without syndrome.
702 if (cap_has_inject_serror_esr
) {
703 events
.exception
.serror_has_esr
= env
->serror
.has_esr
;
704 events
.exception
.serror_esr
= env
->serror
.esr
;
707 ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_SET_VCPU_EVENTS
, &events
);
709 error_report("failed to put vcpu events");
715 int kvm_get_vcpu_events(ARMCPU
*cpu
)
717 CPUARMState
*env
= &cpu
->env
;
718 struct kvm_vcpu_events events
;
721 if (!kvm_has_vcpu_events()) {
725 memset(&events
, 0, sizeof(events
));
726 ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_GET_VCPU_EVENTS
, &events
);
728 error_report("failed to get vcpu events");
732 env
->serror
.pending
= events
.exception
.serror_pending
;
733 env
->serror
.has_esr
= events
.exception
.serror_has_esr
;
734 env
->serror
.esr
= events
.exception
.serror_esr
;
739 void kvm_arch_pre_run(CPUState
*cs
, struct kvm_run
*run
)
743 MemTxAttrs
kvm_arch_post_run(CPUState
*cs
, struct kvm_run
*run
)
746 uint32_t switched_level
;
748 if (kvm_irqchip_in_kernel()) {
750 * We only need to sync timer states with user-space interrupt
751 * controllers, so return early and save cycles if we don't.
753 return MEMTXATTRS_UNSPECIFIED
;
758 /* Synchronize our shadowed in-kernel device irq lines with the kvm ones */
759 if (run
->s
.regs
.device_irq_level
!= cpu
->device_irq_level
) {
760 switched_level
= cpu
->device_irq_level
^ run
->s
.regs
.device_irq_level
;
762 qemu_mutex_lock_iothread();
764 if (switched_level
& KVM_ARM_DEV_EL1_VTIMER
) {
765 qemu_set_irq(cpu
->gt_timer_outputs
[GTIMER_VIRT
],
766 !!(run
->s
.regs
.device_irq_level
&
767 KVM_ARM_DEV_EL1_VTIMER
));
768 switched_level
&= ~KVM_ARM_DEV_EL1_VTIMER
;
771 if (switched_level
& KVM_ARM_DEV_EL1_PTIMER
) {
772 qemu_set_irq(cpu
->gt_timer_outputs
[GTIMER_PHYS
],
773 !!(run
->s
.regs
.device_irq_level
&
774 KVM_ARM_DEV_EL1_PTIMER
));
775 switched_level
&= ~KVM_ARM_DEV_EL1_PTIMER
;
778 if (switched_level
& KVM_ARM_DEV_PMU
) {
779 qemu_set_irq(cpu
->pmu_interrupt
,
780 !!(run
->s
.regs
.device_irq_level
& KVM_ARM_DEV_PMU
));
781 switched_level
&= ~KVM_ARM_DEV_PMU
;
784 if (switched_level
) {
785 qemu_log_mask(LOG_UNIMP
, "%s: unhandled in-kernel device IRQ %x\n",
786 __func__
, switched_level
);
789 /* We also mark unknown levels as processed to not waste cycles */
790 cpu
->device_irq_level
= run
->s
.regs
.device_irq_level
;
791 qemu_mutex_unlock_iothread();
794 return MEMTXATTRS_UNSPECIFIED
;
797 void kvm_arm_vm_state_change(void *opaque
, int running
, RunState state
)
799 CPUState
*cs
= opaque
;
800 ARMCPU
*cpu
= ARM_CPU(cs
);
803 if (cpu
->kvm_adjvtime
) {
804 kvm_arm_put_virtual_time(cs
);
807 if (cpu
->kvm_adjvtime
) {
808 kvm_arm_get_virtual_time(cs
);
813 int kvm_arch_handle_exit(CPUState
*cs
, struct kvm_run
*run
)
817 switch (run
->exit_reason
) {
819 if (kvm_arm_handle_debug(cs
, &run
->debug
.arch
)) {
821 } /* otherwise return to guest */
824 qemu_log_mask(LOG_UNIMP
, "%s: un-handled exit reason %d\n",
825 __func__
, run
->exit_reason
);
831 bool kvm_arch_stop_on_emulation_error(CPUState
*cs
)
836 int kvm_arch_process_async_events(CPUState
*cs
)
841 /* The #ifdef protections are until 32bit headers are imported and can
842 * be removed once both 32 and 64 bit reach feature parity.
844 void kvm_arch_update_guest_debug(CPUState
*cs
, struct kvm_guest_debug
*dbg
)
846 #ifdef KVM_GUESTDBG_USE_SW_BP
847 if (kvm_sw_breakpoints_active(cs
)) {
848 dbg
->control
|= KVM_GUESTDBG_ENABLE
| KVM_GUESTDBG_USE_SW_BP
;
851 #ifdef KVM_GUESTDBG_USE_HW
852 if (kvm_arm_hw_debug_active(cs
)) {
853 dbg
->control
|= KVM_GUESTDBG_ENABLE
| KVM_GUESTDBG_USE_HW
;
854 kvm_arm_copy_hw_debug_data(&dbg
->arch
);
859 void kvm_arch_init_irq_routing(KVMState
*s
)
863 int kvm_arch_irqchip_create(KVMState
*s
)
865 if (kvm_kernel_irqchip_split()) {
866 perror("-machine kernel_irqchip=split is not supported on ARM.");
870 /* If we can create the VGIC using the newer device control API, we
871 * let the device do this when it initializes itself, otherwise we
872 * fall back to the old API */
873 return kvm_check_extension(s
, KVM_CAP_DEVICE_CTRL
);
876 int kvm_arm_vgic_probe(void)
880 if (kvm_create_device(kvm_state
,
881 KVM_DEV_TYPE_ARM_VGIC_V3
, true) == 0) {
882 val
|= KVM_ARM_VGIC_V3
;
884 if (kvm_create_device(kvm_state
,
885 KVM_DEV_TYPE_ARM_VGIC_V2
, true) == 0) {
886 val
|= KVM_ARM_VGIC_V2
;
891 int kvm_arm_set_irq(int cpu
, int irqtype
, int irq
, int level
)
893 int kvm_irq
= (irqtype
<< KVM_ARM_IRQ_TYPE_SHIFT
) | irq
;
894 int cpu_idx1
= cpu
% 256;
895 int cpu_idx2
= cpu
/ 256;
897 kvm_irq
|= (cpu_idx1
<< KVM_ARM_IRQ_VCPU_SHIFT
) |
898 (cpu_idx2
<< KVM_ARM_IRQ_VCPU2_SHIFT
);
900 return kvm_set_irq(kvm_state
, kvm_irq
, !!level
);
903 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry
*route
,
904 uint64_t address
, uint32_t data
, PCIDevice
*dev
)
906 AddressSpace
*as
= pci_device_iommu_address_space(dev
);
907 hwaddr xlat
, len
, doorbell_gpa
;
908 MemoryRegionSection mrs
;
912 if (as
== &address_space_memory
) {
916 /* MSI doorbell address is translated by an IOMMU */
919 mr
= address_space_translate(as
, address
, &xlat
, &len
, true,
920 MEMTXATTRS_UNSPECIFIED
);
924 mrs
= memory_region_find(mr
, xlat
, 1);
929 doorbell_gpa
= mrs
.offset_within_address_space
;
930 memory_region_unref(mrs
.mr
);
932 route
->u
.msi
.address_lo
= doorbell_gpa
;
933 route
->u
.msi
.address_hi
= doorbell_gpa
>> 32;
935 trace_kvm_arm_fixup_msi_route(address
, doorbell_gpa
);
944 int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry
*route
,
945 int vector
, PCIDevice
*dev
)
950 int kvm_arch_release_virq_post(int virq
)
955 int kvm_arch_msi_data_to_gsi(uint32_t data
)
957 return (data
- 32) & 0xffff;