2 * This declarations of the PIC12F615 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:03 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC12F615_H__
26 #define __PIC12F615_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define GPIO_ADDR 0x0005
42 #define PORTA_ADDR 0x0005
43 #define PCLATH_ADDR 0x000A
44 #define INTCON_ADDR 0x000B
45 #define PIR1_ADDR 0x000C
46 #define TMR1_ADDR 0x000E
47 #define TMR1L_ADDR 0x000E
48 #define TMR1H_ADDR 0x000F
49 #define T1CON_ADDR 0x0010
50 #define TMR2_ADDR 0x0011
51 #define T2CON_ADDR 0x0012
52 #define CCPR1_ADDR 0x0013
53 #define CCPR1L_ADDR 0x0013
54 #define CCPR1H_ADDR 0x0014
55 #define CCP1CON_ADDR 0x0015
56 #define PWM1CON_ADDR 0x0016
57 #define ECCPAS_ADDR 0x0017
58 #define VRCON_ADDR 0x0019
59 #define CMCON0_ADDR 0x001A
60 #define CMCON1_ADDR 0x001C
61 #define ADRESH_ADDR 0x001E
62 #define ADCON0_ADDR 0x001F
63 #define OPTION_REG_ADDR 0x0081
64 #define TRISA_ADDR 0x0085
65 #define TRISIO_ADDR 0x0085
66 #define PIE1_ADDR 0x008C
67 #define PCON_ADDR 0x008E
68 #define OSCTUNE_ADDR 0x0090
69 #define PR2_ADDR 0x0092
70 #define APFCON_ADDR 0x0093
71 #define WPU_ADDR 0x0095
72 #define WPUA_ADDR 0x0095
73 #define IOC_ADDR 0x0096
74 #define IOCA_ADDR 0x0096
75 #define ADRESL_ADDR 0x009E
76 #define ANSEL_ADDR 0x009F
78 #endif // #ifndef NO_ADDR_DEFINES
80 //==============================================================================
82 // Register Definitions
84 //==============================================================================
86 extern __at(0x0000) __sfr INDF
;
87 extern __at(0x0001) __sfr TMR0
;
88 extern __at(0x0002) __sfr PCL
;
90 //==============================================================================
93 extern __at(0x0003) __sfr STATUS
;
117 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
128 //==============================================================================
130 extern __at(0x0004) __sfr FSR
;
132 //==============================================================================
135 extern __at(0x0005) __sfr GPIO
;
194 extern __at(0x0005) volatile __GPIObits_t GPIObits
;
215 //==============================================================================
218 //==============================================================================
221 extern __at(0x0005) __sfr PORTA
;
280 extern __at(0x0005) volatile __PORTAbits_t PORTAbits
;
282 #define _PORTA_GP0 0x01
283 #define _PORTA_GPIO0 0x01
284 #define _PORTA_RA0 0x01
285 #define _PORTA_GP1 0x02
286 #define _PORTA_GPIO1 0x02
287 #define _PORTA_RA1 0x02
288 #define _PORTA_GP2 0x04
289 #define _PORTA_GPIO2 0x04
290 #define _PORTA_RA2 0x04
291 #define _PORTA_GP3 0x08
292 #define _PORTA_GPIO3 0x08
293 #define _PORTA_RA3 0x08
294 #define _PORTA_GP4 0x10
295 #define _PORTA_GPIO4 0x10
296 #define _PORTA_RA4 0x10
297 #define _PORTA_GP5 0x20
298 #define _PORTA_GPIO5 0x20
299 #define _PORTA_RA5 0x20
301 //==============================================================================
303 extern __at(0x000A) __sfr PCLATH
;
305 //==============================================================================
308 extern __at(0x000B) __sfr INTCON
;
337 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
350 //==============================================================================
353 //==============================================================================
356 extern __at(0x000C) __sfr PIR1
;
385 extern __at(0x000C) volatile __PIR1bits_t PIR1bits
;
397 //==============================================================================
399 extern __at(0x000E) __sfr TMR1
;
400 extern __at(0x000E) __sfr TMR1L
;
401 extern __at(0x000F) __sfr TMR1H
;
403 //==============================================================================
406 extern __at(0x0010) __sfr T1CON
;
414 unsigned NOT_T1SYNC
: 1;
415 unsigned T1OSCEN
: 1;
416 unsigned T1CKPS0
: 1;
417 unsigned T1CKPS1
: 1;
430 extern __at(0x0010) volatile __T1CONbits_t T1CONbits
;
434 #define _NOT_T1SYNC 0x04
435 #define _T1OSCEN 0x08
436 #define _T1CKPS0 0x10
437 #define _T1CKPS1 0x20
441 //==============================================================================
443 extern __at(0x0011) __sfr TMR2
;
445 //==============================================================================
448 extern __at(0x0012) __sfr T2CON
;
454 unsigned T2CKPS0
: 1;
455 unsigned T2CKPS1
: 1;
457 unsigned TOUTPS0
: 1;
458 unsigned TOUTPS1
: 1;
459 unsigned TOUTPS2
: 1;
460 unsigned TOUTPS3
: 1;
490 extern __at(0x0012) volatile __T2CONbits_t T2CONbits
;
492 #define _T2CKPS0 0x01
493 #define _T2CKPS1 0x02
496 #define _TOUTPS0 0x08
497 #define _TOUTPS1 0x10
498 #define _TOUTPS2 0x20
499 #define _TOUTPS3 0x40
501 //==============================================================================
503 extern __at(0x0013) __sfr CCPR1
;
504 extern __at(0x0013) __sfr CCPR1L
;
505 extern __at(0x0014) __sfr CCPR1H
;
507 //==============================================================================
510 extern __at(0x0015) __sfr CCP1CON
;
540 extern __at(0x0015) volatile __CCP1CONbits_t CCP1CONbits
;
550 //==============================================================================
553 //==============================================================================
556 extern __at(0x0016) __sfr PWM1CON
;
579 extern __at(0x0016) volatile __PWM1CONbits_t PWM1CONbits
;
590 //==============================================================================
593 //==============================================================================
596 extern __at(0x0017) __sfr ECCPAS
;
606 unsigned ECCPAS0
: 1;
607 unsigned ECCPAS1
: 1;
608 unsigned ECCPAS2
: 1;
609 unsigned ECCPASE
: 1;
633 extern __at(0x0017) volatile __ECCPASbits_t ECCPASbits
;
639 #define _ECCPAS0 0x10
640 #define _ECCPAS1 0x20
641 #define _ECCPAS2 0x40
642 #define _ECCPASE 0x80
644 //==============================================================================
647 //==============================================================================
650 extern __at(0x0019) __sfr VRCON
;
697 extern __at(0x0019) volatile __VRCONbits_t VRCONbits
;
710 //==============================================================================
713 //==============================================================================
716 extern __at(0x001A) __sfr CMCON0
;
757 extern __at(0x001A) volatile __CMCON0bits_t CMCON0bits
;
773 //==============================================================================
776 //==============================================================================
779 extern __at(0x001C) __sfr CMCON1
;
808 extern __at(0x001C) volatile __CMCON1bits_t CMCON1bits
;
817 //==============================================================================
819 extern __at(0x001E) __sfr ADRESH
;
821 //==============================================================================
824 extern __at(0x001F) __sfr ADCON0
;
831 unsigned GO_NOT_DONE
: 1;
855 unsigned NOT_DONE
: 1;
867 unsigned GO_DONE
: 1;
884 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits
;
887 #define _GO_NOT_DONE 0x02
889 #define _NOT_DONE 0x02
890 #define _GO_DONE 0x02
897 //==============================================================================
900 //==============================================================================
903 extern __at(0x0081) __sfr OPTION_REG
;
916 unsigned NOT_GPPU
: 1;
924 } __OPTION_REGbits_t
;
926 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits
;
935 #define _NOT_GPPU 0x80
937 //==============================================================================
940 //==============================================================================
943 extern __at(0x0085) __sfr TRISA
;
949 unsigned TRISIO0
: 1;
950 unsigned TRISIO1
: 1;
951 unsigned TRISIO2
: 1;
952 unsigned TRISIO3
: 1;
953 unsigned TRISIO4
: 1;
954 unsigned TRISIO5
: 1;
966 extern __at(0x0085) volatile __TRISAbits_t TRISAbits
;
968 #define _TRISIO0 0x01
969 #define _TRISIO1 0x02
970 #define _TRISIO2 0x04
971 #define _TRISIO3 0x08
972 #define _TRISIO4 0x10
973 #define _TRISIO5 0x20
975 //==============================================================================
978 //==============================================================================
981 extern __at(0x0085) __sfr TRISIO
;
987 unsigned TRISIO0
: 1;
988 unsigned TRISIO1
: 1;
989 unsigned TRISIO2
: 1;
990 unsigned TRISIO3
: 1;
991 unsigned TRISIO4
: 1;
992 unsigned TRISIO5
: 1;
1004 extern __at(0x0085) volatile __TRISIObits_t TRISIObits
;
1006 #define _TRISIO_TRISIO0 0x01
1007 #define _TRISIO_TRISIO1 0x02
1008 #define _TRISIO_TRISIO2 0x04
1009 #define _TRISIO_TRISIO3 0x08
1010 #define _TRISIO_TRISIO4 0x10
1011 #define _TRISIO_TRISIO5 0x20
1013 //==============================================================================
1016 //==============================================================================
1019 extern __at(0x008C) __sfr PIE1
;
1025 unsigned TMR1IE
: 1;
1026 unsigned TMR2IE
: 1;
1030 unsigned ECCPIE
: 1;
1042 unsigned CCP1IE
: 1;
1048 extern __at(0x008C) volatile __PIE1bits_t PIE1bits
;
1050 #define _TMR1IE 0x01
1052 #define _TMR2IE 0x02
1056 #define _ECCPIE 0x20
1057 #define _CCP1IE 0x20
1060 //==============================================================================
1063 //==============================================================================
1066 extern __at(0x008E) __sfr PCON
;
1072 unsigned NOT_BOR
: 1;
1073 unsigned NOT_POR
: 1;
1084 unsigned NOT_BOD
: 1;
1095 extern __at(0x008E) volatile __PCONbits_t PCONbits
;
1097 #define _NOT_BOR 0x01
1098 #define _NOT_BOD 0x01
1099 #define _NOT_POR 0x02
1101 //==============================================================================
1104 //==============================================================================
1107 extern __at(0x0090) __sfr OSCTUNE
;
1130 extern __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits
;
1138 //==============================================================================
1140 extern __at(0x0092) __sfr PR2
;
1142 //==============================================================================
1145 extern __at(0x0093) __sfr APFCON
;
1149 unsigned P1ASEL
: 1;
1150 unsigned P1BSEL
: 1;
1153 unsigned T1GSEL
: 1;
1159 extern __at(0x0093) volatile __APFCONbits_t APFCONbits
;
1161 #define _P1ASEL 0x01
1162 #define _P1BSEL 0x02
1163 #define _T1GSEL 0x10
1165 //==============================================================================
1168 //==============================================================================
1171 extern __at(0x0095) __sfr WPU
;
1200 extern __at(0x0095) volatile __WPUbits_t WPUbits
;
1213 //==============================================================================
1216 //==============================================================================
1219 extern __at(0x0095) __sfr WPUA
;
1248 extern __at(0x0095) volatile __WPUAbits_t WPUAbits
;
1250 #define _WPUA_WPUA0 0x01
1251 #define _WPUA_WPU0 0x01
1252 #define _WPUA_WPUA1 0x02
1253 #define _WPUA_WPU1 0x02
1254 #define _WPUA_WPUA2 0x04
1255 #define _WPUA_WPU2 0x04
1256 #define _WPUA_WPUA4 0x10
1257 #define _WPUA_WPU4 0x10
1258 #define _WPUA_WPUA5 0x20
1259 #define _WPUA_WPU5 0x20
1261 //==============================================================================
1264 //==============================================================================
1267 extern __at(0x0096) __sfr IOC
;
1308 extern __at(0x0096) volatile __IOCbits_t IOCbits
;
1323 //==============================================================================
1326 //==============================================================================
1329 extern __at(0x0096) __sfr IOCA
;
1370 extern __at(0x0096) volatile __IOCAbits_t IOCAbits
;
1372 #define _IOCA_IOC0 0x01
1373 #define _IOCA_IOCA0 0x01
1374 #define _IOCA_IOC1 0x02
1375 #define _IOCA_IOCA1 0x02
1376 #define _IOCA_IOC2 0x04
1377 #define _IOCA_IOCA2 0x04
1378 #define _IOCA_IOC3 0x08
1379 #define _IOCA_IOCA3 0x08
1380 #define _IOCA_IOC4 0x10
1381 #define _IOCA_IOCA4 0x10
1382 #define _IOCA_IOC5 0x20
1383 #define _IOCA_IOCA5 0x20
1385 //==============================================================================
1387 extern __at(0x009E) __sfr ADRESL
;
1389 //==============================================================================
1392 extern __at(0x009F) __sfr ANSEL
;
1422 extern __at(0x009F) volatile __ANSELbits_t ANSELbits
;
1432 //==============================================================================
1435 //==============================================================================
1437 // Configuration Bits
1439 //==============================================================================
1441 #define _CONFIG 0x2007
1443 //----------------------------- CONFIG Options -------------------------------
1445 #define _FOSC_LP 0x3FF8 // LP oscillator: Low-power crystal on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN.
1446 #define _LP_OSC 0x3FF8 // LP oscillator: Low-power crystal on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN.
1447 #define _FOSC_XT 0x3FF9 // XT oscillator: Crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN.
1448 #define _XT_OSC 0x3FF9 // XT oscillator: Crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN.
1449 #define _FOSC_HS 0x3FFA // HS oscillator: High-speed crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN.
1450 #define _HS_OSC 0x3FFA // HS oscillator: High-speed crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN.
1451 #define _FOSC_EC 0x3FFB // EC: I/O function on GP4/OSC2/CLKOUT pin, CLKIN on GP5/OSC1/CLKIN.
1452 #define _EC_OSC 0x3FFB // EC: I/O function on GP4/OSC2/CLKOUT pin, CLKIN on GP5/OSC1/CLKIN.
1453 #define _FOSC_INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN.
1454 #define _INTRC_OSC_NOCLKOUT 0x3FFC // INTOSCIO oscillator: I/O function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN.
1455 #define _INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN.
1456 #define _FOSC_INTOSCCLK 0x3FFD // INTOSC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN.
1457 #define _INTRC_OSC_CLKOUT 0x3FFD // INTOSC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN.
1458 #define _INTOSC 0x3FFD // INTOSC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN.
1459 #define _FOSC_EXTRCIO 0x3FFE // RCIO oscillator: I/O function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN.
1460 #define _EXTRC_OSC_NOCLKOUT 0x3FFE // RCIO oscillator: I/O function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN.
1461 #define _EXTRCIO 0x3FFE // RCIO oscillator: I/O function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN.
1462 #define _FOSC_EXTRCCLK 0x3FFF // RC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN.
1463 #define _EXTRC_OSC_CLKOUT 0x3FFF // RC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN.
1464 #define _EXTRC 0x3FFF // RC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN.
1465 #define _WDTE_OFF 0x3FF7 // WDT disabled and can be enabled by SWDTEN bit of the WDTCON register.
1466 #define _WDT_OFF 0x3FF7 // WDT disabled and can be enabled by SWDTEN bit of the WDTCON register.
1467 #define _WDTE_ON 0x3FFF // WDT enabled.
1468 #define _WDT_ON 0x3FFF // WDT enabled.
1469 #define _PWRTE_ON 0x3FEF // PWRT enabled.
1470 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
1471 #define _MCLRE_OFF 0x3FDF // MCLR pin function is digital input, MCLR internally tied to VDD.
1472 #define _MCLRE_ON 0x3FFF // MCLR pin function is MCLR.
1473 #define _CP_ON 0x3FBF // Program memory code protection is enabled.
1474 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
1475 #define _IOSCFS_4MHZ 0x3F7F // 4 MHz.
1476 #define _IOSCFS4 0x3F7F // 4 MHz.
1477 #define _IOSCFS_8MHZ 0x3FFF // 8 MHz.
1478 #define _IOSCFS8 0x3FFF // 8 MHz.
1479 #define _BOREN_OFF 0x3CFF // BOR disabled.
1480 #define _BOR_OFF 0x3CFF // BOR disabled.
1481 #define _BOREN_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1482 #define _BOR_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1483 #define _BOREN_ON 0x3FFF // BOR enabled.
1484 #define _BOR_ON 0x3FFF // BOR enabled.
1486 //==============================================================================
1488 #define _DEVID1 0x2006
1490 #define _IDLOC0 0x2000
1491 #define _IDLOC1 0x2001
1492 #define _IDLOC2 0x2002
1493 #define _IDLOC3 0x2003
1495 //==============================================================================
1497 #ifndef NO_BIT_DEFINES
1499 #define ADON ADCON0bits.ADON // bit 0
1500 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
1501 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
1502 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits
1503 #define GO_DONE ADCON0bits.GO_DONE // bit 1, shadows bit in ADCON0bits
1504 #define CHS0 ADCON0bits.CHS0 // bit 2
1505 #define CHS1 ADCON0bits.CHS1 // bit 3
1506 #define CHS2 ADCON0bits.CHS2 // bit 4
1507 #define VCFG ADCON0bits.VCFG // bit 6
1508 #define ADFM ADCON0bits.ADFM // bit 7
1510 #define AN0 ANSELbits.AN0 // bit 0
1511 #define AN1 ANSELbits.AN1 // bit 1
1512 #define AN2 ANSELbits.AN2 // bit 2
1513 #define AN3 ANSELbits.AN3 // bit 3
1514 #define ADCS0 ANSELbits.ADCS0 // bit 4
1515 #define ADCS1 ANSELbits.ADCS1 // bit 5
1516 #define ADCS2 ANSELbits.ADCS2 // bit 6
1518 #define P1ASEL APFCONbits.P1ASEL // bit 0
1519 #define P1BSEL APFCONbits.P1BSEL // bit 1
1520 #define T1GSEL APFCONbits.T1GSEL // bit 4
1522 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
1523 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
1524 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
1525 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
1526 #define DC1B0 CCP1CONbits.DC1B0 // bit 4
1527 #define DC1B1 CCP1CONbits.DC1B1 // bit 5
1528 #define P1M CCP1CONbits.P1M // bit 7
1530 #define C1CH CMCON0bits.C1CH // bit 0, shadows bit in CMCON0bits
1531 #define C1CH0 CMCON0bits.C1CH0 // bit 0, shadows bit in CMCON0bits
1532 #define CMCH CMCON0bits.CMCH // bit 0, shadows bit in CMCON0bits
1533 #define C1R CMCON0bits.C1R // bit 2, shadows bit in CMCON0bits
1534 #define CMR CMCON0bits.CMR // bit 2, shadows bit in CMCON0bits
1535 #define C1POL CMCON0bits.C1POL // bit 4, shadows bit in CMCON0bits
1536 #define CMPOL CMCON0bits.CMPOL // bit 4, shadows bit in CMCON0bits
1537 #define C1OE CMCON0bits.C1OE // bit 5, shadows bit in CMCON0bits
1538 #define CMOE CMCON0bits.CMOE // bit 5, shadows bit in CMCON0bits
1539 #define C1OUT CMCON0bits.C1OUT // bit 6, shadows bit in CMCON0bits
1540 #define COUT CMCON0bits.COUT // bit 6, shadows bit in CMCON0bits
1541 #define C1ON CMCON0bits.C1ON // bit 7, shadows bit in CMCON0bits
1542 #define CMON CMCON0bits.CMON // bit 7, shadows bit in CMCON0bits
1544 #define C1SYNC CMCON1bits.C1SYNC // bit 0, shadows bit in CMCON1bits
1545 #define CMSYNC CMCON1bits.CMSYNC // bit 0, shadows bit in CMCON1bits
1546 #define T1GSS CMCON1bits.T1GSS // bit 1
1547 #define C1HYS CMCON1bits.C1HYS // bit 3, shadows bit in CMCON1bits
1548 #define CMHYS CMCON1bits.CMHYS // bit 3, shadows bit in CMCON1bits
1549 #define T1ACS CMCON1bits.T1ACS // bit 4
1551 #define PSSBD0 ECCPASbits.PSSBD0 // bit 0
1552 #define PSSBD1 ECCPASbits.PSSBD1 // bit 1
1553 #define PSSAC0 ECCPASbits.PSSAC0 // bit 2
1554 #define PSSAC1 ECCPASbits.PSSAC1 // bit 3
1555 #define ECCPAS0 ECCPASbits.ECCPAS0 // bit 4
1556 #define ECCPAS1 ECCPASbits.ECCPAS1 // bit 5
1557 #define ECCPAS2 ECCPASbits.ECCPAS2 // bit 6
1558 #define ECCPASE ECCPASbits.ECCPASE // bit 7
1560 #define GP0 GPIObits.GP0 // bit 0, shadows bit in GPIObits
1561 #define GPIO0 GPIObits.GPIO0 // bit 0, shadows bit in GPIObits
1562 #define RA0 GPIObits.RA0 // bit 0, shadows bit in GPIObits
1563 #define GP1 GPIObits.GP1 // bit 1, shadows bit in GPIObits
1564 #define GPIO1 GPIObits.GPIO1 // bit 1, shadows bit in GPIObits
1565 #define RA1 GPIObits.RA1 // bit 1, shadows bit in GPIObits
1566 #define GP2 GPIObits.GP2 // bit 2, shadows bit in GPIObits
1567 #define GPIO2 GPIObits.GPIO2 // bit 2, shadows bit in GPIObits
1568 #define RA2 GPIObits.RA2 // bit 2, shadows bit in GPIObits
1569 #define GP3 GPIObits.GP3 // bit 3, shadows bit in GPIObits
1570 #define GPIO3 GPIObits.GPIO3 // bit 3, shadows bit in GPIObits
1571 #define RA3 GPIObits.RA3 // bit 3, shadows bit in GPIObits
1572 #define GP4 GPIObits.GP4 // bit 4, shadows bit in GPIObits
1573 #define GPIO4 GPIObits.GPIO4 // bit 4, shadows bit in GPIObits
1574 #define RA4 GPIObits.RA4 // bit 4, shadows bit in GPIObits
1575 #define GP5 GPIObits.GP5 // bit 5, shadows bit in GPIObits
1576 #define GPIO5 GPIObits.GPIO5 // bit 5, shadows bit in GPIObits
1577 #define RA5 GPIObits.RA5 // bit 5, shadows bit in GPIObits
1579 #define GPIF INTCONbits.GPIF // bit 0
1580 #define INTF INTCONbits.INTF // bit 1
1581 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
1582 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
1583 #define GPIE INTCONbits.GPIE // bit 3
1584 #define INTE INTCONbits.INTE // bit 4
1585 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
1586 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
1587 #define PEIE INTCONbits.PEIE // bit 6
1588 #define GIE INTCONbits.GIE // bit 7
1590 #define IOC0 IOCbits.IOC0 // bit 0, shadows bit in IOCbits
1591 #define IOCA0 IOCbits.IOCA0 // bit 0, shadows bit in IOCbits
1592 #define IOC1 IOCbits.IOC1 // bit 1, shadows bit in IOCbits
1593 #define IOCA1 IOCbits.IOCA1 // bit 1, shadows bit in IOCbits
1594 #define IOC2 IOCbits.IOC2 // bit 2, shadows bit in IOCbits
1595 #define IOCA2 IOCbits.IOCA2 // bit 2, shadows bit in IOCbits
1596 #define IOC3 IOCbits.IOC3 // bit 3, shadows bit in IOCbits
1597 #define IOCA3 IOCbits.IOCA3 // bit 3, shadows bit in IOCbits
1598 #define IOC4 IOCbits.IOC4 // bit 4, shadows bit in IOCbits
1599 #define IOCA4 IOCbits.IOCA4 // bit 4, shadows bit in IOCbits
1600 #define IOC5 IOCbits.IOC5 // bit 5, shadows bit in IOCbits
1601 #define IOCA5 IOCbits.IOCA5 // bit 5, shadows bit in IOCbits
1603 #define PS0 OPTION_REGbits.PS0 // bit 0
1604 #define PS1 OPTION_REGbits.PS1 // bit 1
1605 #define PS2 OPTION_REGbits.PS2 // bit 2
1606 #define PSA OPTION_REGbits.PSA // bit 3
1607 #define T0SE OPTION_REGbits.T0SE // bit 4
1608 #define T0CS OPTION_REGbits.T0CS // bit 5
1609 #define INTEDG OPTION_REGbits.INTEDG // bit 6
1610 #define NOT_GPPU OPTION_REGbits.NOT_GPPU // bit 7
1612 #define TUN0 OSCTUNEbits.TUN0 // bit 0
1613 #define TUN1 OSCTUNEbits.TUN1 // bit 1
1614 #define TUN2 OSCTUNEbits.TUN2 // bit 2
1615 #define TUN3 OSCTUNEbits.TUN3 // bit 3
1616 #define TUN4 OSCTUNEbits.TUN4 // bit 4
1618 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits
1619 #define NOT_BOD PCONbits.NOT_BOD // bit 0, shadows bit in PCONbits
1620 #define NOT_POR PCONbits.NOT_POR // bit 1
1622 #define TMR1IE PIE1bits.TMR1IE // bit 0, shadows bit in PIE1bits
1623 #define T1IE PIE1bits.T1IE // bit 0, shadows bit in PIE1bits
1624 #define TMR2IE PIE1bits.TMR2IE // bit 1, shadows bit in PIE1bits
1625 #define T2IE PIE1bits.T2IE // bit 1, shadows bit in PIE1bits
1626 #define C1IE PIE1bits.C1IE // bit 3, shadows bit in PIE1bits
1627 #define CMIE PIE1bits.CMIE // bit 3, shadows bit in PIE1bits
1628 #define ECCPIE PIE1bits.ECCPIE // bit 5, shadows bit in PIE1bits
1629 #define CCP1IE PIE1bits.CCP1IE // bit 5, shadows bit in PIE1bits
1630 #define ADIE PIE1bits.ADIE // bit 6
1632 #define TMR1IF PIR1bits.TMR1IF // bit 0, shadows bit in PIR1bits
1633 #define T1IF PIR1bits.T1IF // bit 0, shadows bit in PIR1bits
1634 #define TMR2IF PIR1bits.TMR2IF // bit 1, shadows bit in PIR1bits
1635 #define T2IF PIR1bits.T2IF // bit 1, shadows bit in PIR1bits
1636 #define C1IF PIR1bits.C1IF // bit 3, shadows bit in PIR1bits
1637 #define CMIF PIR1bits.CMIF // bit 3, shadows bit in PIR1bits
1638 #define ECCPIF PIR1bits.ECCPIF // bit 5, shadows bit in PIR1bits
1639 #define CCP1IF PIR1bits.CCP1IF // bit 5, shadows bit in PIR1bits
1640 #define ADIF PIR1bits.ADIF // bit 6
1642 #define PDC0 PWM1CONbits.PDC0 // bit 0
1643 #define PDC1 PWM1CONbits.PDC1 // bit 1
1644 #define PDC2 PWM1CONbits.PDC2 // bit 2
1645 #define PDC3 PWM1CONbits.PDC3 // bit 3
1646 #define PDC4 PWM1CONbits.PDC4 // bit 4
1647 #define PDC5 PWM1CONbits.PDC5 // bit 5
1648 #define PDC6 PWM1CONbits.PDC6 // bit 6
1649 #define PRSEN PWM1CONbits.PRSEN // bit 7
1651 #define C STATUSbits.C // bit 0
1652 #define DC STATUSbits.DC // bit 1
1653 #define Z STATUSbits.Z // bit 2
1654 #define NOT_PD STATUSbits.NOT_PD // bit 3
1655 #define NOT_TO STATUSbits.NOT_TO // bit 4
1656 #define RP0 STATUSbits.RP0 // bit 5
1657 #define RP1 STATUSbits.RP1 // bit 6
1658 #define IRP STATUSbits.IRP // bit 7
1660 #define TMR1ON T1CONbits.TMR1ON // bit 0
1661 #define TMR1CS T1CONbits.TMR1CS // bit 1
1662 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
1663 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
1664 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
1665 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
1666 #define TMR1GE T1CONbits.TMR1GE // bit 6
1667 #define T1GINV T1CONbits.T1GINV // bit 7
1669 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
1670 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
1671 #define TMR2ON T2CONbits.TMR2ON // bit 2, shadows bit in T2CONbits
1672 #define T2ON T2CONbits.T2ON // bit 2, shadows bit in T2CONbits
1673 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
1674 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
1675 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
1676 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
1678 #define TRISIO0 TRISAbits.TRISIO0 // bit 0
1679 #define TRISIO1 TRISAbits.TRISIO1 // bit 1
1680 #define TRISIO2 TRISAbits.TRISIO2 // bit 2
1681 #define TRISIO3 TRISAbits.TRISIO3 // bit 3
1682 #define TRISIO4 TRISAbits.TRISIO4 // bit 4
1683 #define TRISIO5 TRISAbits.TRISIO5 // bit 5
1685 #define VR0 VRCONbits.VR0 // bit 0
1686 #define VR1 VRCONbits.VR1 // bit 1
1687 #define VR2 VRCONbits.VR2 // bit 2
1688 #define VR3 VRCONbits.VR3 // bit 3
1689 #define FBREN VRCONbits.FBREN // bit 4, shadows bit in VRCONbits
1690 #define VP6EN VRCONbits.VP6EN // bit 4, shadows bit in VRCONbits
1691 #define FVREN VRCONbits.FVREN // bit 4, shadows bit in VRCONbits
1692 #define VRR VRCONbits.VRR // bit 5
1693 #define C1VREN VRCONbits.C1VREN // bit 7, shadows bit in VRCONbits
1694 #define CMVREN VRCONbits.CMVREN // bit 7, shadows bit in VRCONbits
1696 #define WPUA0 WPUbits.WPUA0 // bit 0, shadows bit in WPUbits
1697 #define WPU0 WPUbits.WPU0 // bit 0, shadows bit in WPUbits
1698 #define WPUA1 WPUbits.WPUA1 // bit 1, shadows bit in WPUbits
1699 #define WPU1 WPUbits.WPU1 // bit 1, shadows bit in WPUbits
1700 #define WPUA2 WPUbits.WPUA2 // bit 2, shadows bit in WPUbits
1701 #define WPU2 WPUbits.WPU2 // bit 2, shadows bit in WPUbits
1702 #define WPUA4 WPUbits.WPUA4 // bit 4, shadows bit in WPUbits
1703 #define WPU4 WPUbits.WPU4 // bit 4, shadows bit in WPUbits
1704 #define WPUA5 WPUbits.WPUA5 // bit 5, shadows bit in WPUbits
1705 #define WPU5 WPUbits.WPU5 // bit 5, shadows bit in WPUbits
1707 #endif // #ifndef NO_BIT_DEFINES
1709 #endif // #ifndef __PIC12F615_H__