2 * This declarations of the PIC16C62 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:01 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16C62_H__
26 #define __PIC16C62_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTB_ADDR 0x0006
43 #define PORTC_ADDR 0x0007
44 #define PCLATH_ADDR 0x000A
45 #define INTCON_ADDR 0x000B
46 #define PIR1_ADDR 0x000C
47 #define TMR1L_ADDR 0x000E
48 #define TMR1H_ADDR 0x000F
49 #define T1CON_ADDR 0x0010
50 #define TMR2_ADDR 0x0011
51 #define T2CON_ADDR 0x0012
52 #define SSPBUF_ADDR 0x0013
53 #define SSPCON_ADDR 0x0014
54 #define CCPR1L_ADDR 0x0015
55 #define CCPR1H_ADDR 0x0016
56 #define CCP1CON_ADDR 0x0017
57 #define OPTION_REG_ADDR 0x0081
58 #define TRISA_ADDR 0x0085
59 #define TRISB_ADDR 0x0086
60 #define TRISC_ADDR 0x0087
61 #define PIE1_ADDR 0x008C
62 #define PCON_ADDR 0x008E
63 #define PR2_ADDR 0x0092
64 #define SSPADD_ADDR 0x0093
65 #define SSPSTAT_ADDR 0x0094
67 #endif // #ifndef NO_ADDR_DEFINES
69 //==============================================================================
71 // Register Definitions
73 //==============================================================================
75 extern __at(0x0000) __sfr INDF
;
76 extern __at(0x0001) __sfr TMR0
;
77 extern __at(0x0002) __sfr PCL
;
79 //==============================================================================
82 extern __at(0x0003) __sfr STATUS
;
106 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
117 //==============================================================================
119 extern __at(0x0004) __sfr FSR
;
120 extern __at(0x0005) __sfr PORTA
;
121 extern __at(0x0006) __sfr PORTB
;
122 extern __at(0x0007) __sfr PORTC
;
123 extern __at(0x000A) __sfr PCLATH
;
125 //==============================================================================
128 extern __at(0x000B) __sfr INTCON
;
142 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
153 //==============================================================================
156 //==============================================================================
159 extern __at(0x000C) __sfr PIR1
;
173 extern __at(0x000C) volatile __PIR1bits_t PIR1bits
;
180 //==============================================================================
182 extern __at(0x000E) __sfr TMR1L
;
183 extern __at(0x000F) __sfr TMR1H
;
185 //==============================================================================
188 extern __at(0x0010) __sfr T1CON
;
196 unsigned NOT_T1SYNC
: 1;
197 unsigned T1OSCEN
: 1;
198 unsigned T1CKPS0
: 1;
199 unsigned T1CKPS1
: 1;
212 extern __at(0x0010) volatile __T1CONbits_t T1CONbits
;
216 #define _NOT_T1SYNC 0x04
217 #define _T1OSCEN 0x08
218 #define _T1CKPS0 0x10
219 #define _T1CKPS1 0x20
221 //==============================================================================
223 extern __at(0x0011) __sfr TMR2
;
225 //==============================================================================
228 extern __at(0x0012) __sfr T2CON
;
234 unsigned T2CKPS0
: 1;
235 unsigned T2CKPS1
: 1;
237 unsigned TOUTPS0
: 1;
238 unsigned TOUTPS1
: 1;
239 unsigned TOUTPS2
: 1;
240 unsigned TOUTPS3
: 1;
258 extern __at(0x0012) volatile __T2CONbits_t T2CONbits
;
260 #define _T2CKPS0 0x01
261 #define _T2CKPS1 0x02
263 #define _TOUTPS0 0x08
264 #define _TOUTPS1 0x10
265 #define _TOUTPS2 0x20
266 #define _TOUTPS3 0x40
268 //==============================================================================
270 extern __at(0x0013) __sfr SSPBUF
;
272 //==============================================================================
275 extern __at(0x0014) __sfr SSPCON
;
298 extern __at(0x0014) volatile __SSPCONbits_t SSPCONbits
;
309 //==============================================================================
311 extern __at(0x0015) __sfr CCPR1L
;
312 extern __at(0x0016) __sfr CCPR1H
;
314 //==============================================================================
317 extern __at(0x0017) __sfr CCP1CON
;
340 extern __at(0x0017) volatile __CCP1CONbits_t CCP1CONbits
;
349 //==============================================================================
352 //==============================================================================
355 extern __at(0x0081) __sfr OPTION_REG
;
368 unsigned NOT_RBPU
: 1;
376 } __OPTION_REGbits_t
;
378 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits
;
387 #define _NOT_RBPU 0x80
389 //==============================================================================
391 extern __at(0x0085) __sfr TRISA
;
392 extern __at(0x0086) __sfr TRISB
;
393 extern __at(0x0087) __sfr TRISC
;
395 //==============================================================================
398 extern __at(0x008C) __sfr PIE1
;
412 extern __at(0x008C) volatile __PIE1bits_t PIE1bits
;
419 //==============================================================================
422 //==============================================================================
425 extern __at(0x008E) __sfr PCON
;
430 unsigned NOT_POR
: 1;
439 extern __at(0x008E) volatile __PCONbits_t PCONbits
;
441 #define _NOT_POR 0x02
443 //==============================================================================
445 extern __at(0x0092) __sfr PR2
;
446 extern __at(0x0093) __sfr SSPADD
;
448 //==============================================================================
451 extern __at(0x0094) __sfr SSPSTAT
;
471 unsigned I2C_READ
: 1;
472 unsigned I2C_START
: 1;
473 unsigned I2C_STOP
: 1;
474 unsigned I2C_DATA
: 1;
495 unsigned NOT_WRITE
: 1;
498 unsigned NOT_ADDRESS
: 1;
519 unsigned READ_WRITE
: 1;
522 unsigned DATA_ADDRESS
: 1;
528 extern __at(0x0094) volatile __SSPSTATbits_t SSPSTATbits
;
533 #define _I2C_READ 0x04
535 #define _NOT_WRITE 0x04
537 #define _READ_WRITE 0x04
539 #define _I2C_START 0x08
541 #define _I2C_STOP 0x10
543 #define _I2C_DATA 0x20
545 #define _NOT_ADDRESS 0x20
547 #define _DATA_ADDRESS 0x20
549 //==============================================================================
552 //==============================================================================
554 // Configuration Bits
556 //==============================================================================
558 #define _CONFIG1 0x2007
560 //----------------------------- CONFIG1 Options -------------------------------
562 #define _CP_ALL 0x3F8F
563 #define _CP_75 0x3F9F
564 #define _CP_50 0x3FAF
565 #define _CP_OFF 0x3FBF
566 #define _PWRTE_ON 0x3FBF
567 #define _PWRTE_OFF 0x3FB7
568 #define _WDT_ON 0x3FBF
569 #define _WDT_OFF 0x3FBB
570 #define _LP_OSC 0x3FBC
571 #define _XT_OSC 0x3FBD
572 #define _HS_OSC 0x3FBE
573 #define _RC_OSC 0x3FBF
575 //==============================================================================
577 //==============================================================================
579 #ifndef NO_BIT_DEFINES
581 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
582 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
583 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
584 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
585 #define CCP1Y CCP1CONbits.CCP1Y // bit 4
586 #define CCP1X CCP1CONbits.CCP1X // bit 5
588 #define RBIF INTCONbits.RBIF // bit 0
589 #define INTF INTCONbits.INTF // bit 1
590 #define T0IF INTCONbits.T0IF // bit 2
591 #define RBIE INTCONbits.RBIE // bit 3
592 #define INTE INTCONbits.INTE // bit 4
593 #define T0IE INTCONbits.T0IE // bit 5
594 #define PEIE INTCONbits.PEIE // bit 6
595 #define GIE INTCONbits.GIE // bit 7
597 #define PS0 OPTION_REGbits.PS0 // bit 0
598 #define PS1 OPTION_REGbits.PS1 // bit 1
599 #define PS2 OPTION_REGbits.PS2 // bit 2
600 #define PSA OPTION_REGbits.PSA // bit 3
601 #define T0SE OPTION_REGbits.T0SE // bit 4
602 #define T0CS OPTION_REGbits.T0CS // bit 5
603 #define INTEDG OPTION_REGbits.INTEDG // bit 6
604 #define NOT_RBPU OPTION_REGbits.NOT_RBPU // bit 7
606 #define NOT_POR PCONbits.NOT_POR // bit 1
608 #define TMR1IE PIE1bits.TMR1IE // bit 0
609 #define TMR2IE PIE1bits.TMR2IE // bit 1
610 #define CCP1IE PIE1bits.CCP1IE // bit 2
611 #define SSPIE PIE1bits.SSPIE // bit 3
613 #define TMR1IF PIR1bits.TMR1IF // bit 0
614 #define TMR2IF PIR1bits.TMR2IF // bit 1
615 #define CCP1IF PIR1bits.CCP1IF // bit 2
616 #define SSPIF PIR1bits.SSPIF // bit 3
618 #define SSPM0 SSPCONbits.SSPM0 // bit 0
619 #define SSPM1 SSPCONbits.SSPM1 // bit 1
620 #define SSPM2 SSPCONbits.SSPM2 // bit 2
621 #define SSPM3 SSPCONbits.SSPM3 // bit 3
622 #define CKP SSPCONbits.CKP // bit 4
623 #define SSPEN SSPCONbits.SSPEN // bit 5
624 #define SSPOV SSPCONbits.SSPOV // bit 6
625 #define WCOL SSPCONbits.WCOL // bit 7
627 #define BF SSPSTATbits.BF // bit 0
628 #define UA SSPSTATbits.UA // bit 1
629 #define R SSPSTATbits.R // bit 2, shadows bit in SSPSTATbits
630 #define I2C_READ SSPSTATbits.I2C_READ // bit 2, shadows bit in SSPSTATbits
631 #define NOT_W SSPSTATbits.NOT_W // bit 2, shadows bit in SSPSTATbits
632 #define NOT_WRITE SSPSTATbits.NOT_WRITE // bit 2, shadows bit in SSPSTATbits
633 #define R_W SSPSTATbits.R_W // bit 2, shadows bit in SSPSTATbits
634 #define READ_WRITE SSPSTATbits.READ_WRITE // bit 2, shadows bit in SSPSTATbits
635 #define S SSPSTATbits.S // bit 3, shadows bit in SSPSTATbits
636 #define I2C_START SSPSTATbits.I2C_START // bit 3, shadows bit in SSPSTATbits
637 #define P SSPSTATbits.P // bit 4, shadows bit in SSPSTATbits
638 #define I2C_STOP SSPSTATbits.I2C_STOP // bit 4, shadows bit in SSPSTATbits
639 #define D SSPSTATbits.D // bit 5, shadows bit in SSPSTATbits
640 #define I2C_DATA SSPSTATbits.I2C_DATA // bit 5, shadows bit in SSPSTATbits
641 #define NOT_A SSPSTATbits.NOT_A // bit 5, shadows bit in SSPSTATbits
642 #define NOT_ADDRESS SSPSTATbits.NOT_ADDRESS // bit 5, shadows bit in SSPSTATbits
643 #define D_A SSPSTATbits.D_A // bit 5, shadows bit in SSPSTATbits
644 #define DATA_ADDRESS SSPSTATbits.DATA_ADDRESS // bit 5, shadows bit in SSPSTATbits
646 #define C STATUSbits.C // bit 0
647 #define DC STATUSbits.DC // bit 1
648 #define Z STATUSbits.Z // bit 2
649 #define NOT_PD STATUSbits.NOT_PD // bit 3
650 #define NOT_TO STATUSbits.NOT_TO // bit 4
651 #define RP0 STATUSbits.RP0 // bit 5
652 #define RP1 STATUSbits.RP1 // bit 6
653 #define IRP STATUSbits.IRP // bit 7
655 #define TMR1ON T1CONbits.TMR1ON // bit 0
656 #define TMR1CS T1CONbits.TMR1CS // bit 1
657 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
658 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
659 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
660 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
662 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
663 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
664 #define TMR2ON T2CONbits.TMR2ON // bit 2
665 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
666 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
667 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
668 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
670 #endif // #ifndef NO_BIT_DEFINES
672 #endif // #ifndef __PIC16C62_H__