2 * This declarations of the PIC16F872 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:59 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16F872_H__
26 #define __PIC16F872_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTB_ADDR 0x0006
43 #define PORTC_ADDR 0x0007
44 #define PCLATH_ADDR 0x000A
45 #define INTCON_ADDR 0x000B
46 #define PIR1_ADDR 0x000C
47 #define PIR2_ADDR 0x000D
48 #define TMR1_ADDR 0x000E
49 #define TMR1L_ADDR 0x000E
50 #define TMR1H_ADDR 0x000F
51 #define T1CON_ADDR 0x0010
52 #define TMR2_ADDR 0x0011
53 #define T2CON_ADDR 0x0012
54 #define SSPBUF_ADDR 0x0013
55 #define SSPCON_ADDR 0x0014
56 #define CCPR1_ADDR 0x0015
57 #define CCPR1L_ADDR 0x0015
58 #define CCPR1H_ADDR 0x0016
59 #define CCP1CON_ADDR 0x0017
60 #define ADRESH_ADDR 0x001E
61 #define ADCON0_ADDR 0x001F
62 #define OPTION_REG_ADDR 0x0081
63 #define TRISA_ADDR 0x0085
64 #define TRISB_ADDR 0x0086
65 #define TRISC_ADDR 0x0087
66 #define PIE1_ADDR 0x008C
67 #define PIE2_ADDR 0x008D
68 #define PCON_ADDR 0x008E
69 #define SSPCON2_ADDR 0x0091
70 #define PR2_ADDR 0x0092
71 #define SSPADD_ADDR 0x0093
72 #define SSPSTAT_ADDR 0x0094
73 #define ADRESL_ADDR 0x009E
74 #define ADCON1_ADDR 0x009F
75 #define EEDATA_ADDR 0x010C
76 #define EEADR_ADDR 0x010D
77 #define EEDATH_ADDR 0x010E
78 #define EEADRH_ADDR 0x010F
79 #define EECON1_ADDR 0x018C
80 #define EECON2_ADDR 0x018D
82 #endif // #ifndef NO_ADDR_DEFINES
84 //==============================================================================
86 // Register Definitions
88 //==============================================================================
90 extern __at(0x0000) __sfr INDF
;
91 extern __at(0x0001) __sfr TMR0
;
92 extern __at(0x0002) __sfr PCL
;
94 //==============================================================================
97 extern __at(0x0003) __sfr STATUS
;
121 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
132 //==============================================================================
134 extern __at(0x0004) __sfr FSR
;
136 //==============================================================================
139 extern __at(0x0005) __sfr PORTA
;
162 extern __at(0x0005) volatile __PORTAbits_t PORTAbits
;
171 //==============================================================================
174 //==============================================================================
177 extern __at(0x0006) __sfr PORTB
;
191 extern __at(0x0006) volatile __PORTBbits_t PORTBbits
;
202 //==============================================================================
205 //==============================================================================
208 extern __at(0x0007) __sfr PORTC
;
222 extern __at(0x0007) volatile __PORTCbits_t PORTCbits
;
233 //==============================================================================
235 extern __at(0x000A) __sfr PCLATH
;
237 //==============================================================================
240 extern __at(0x000B) __sfr INTCON
;
269 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
282 //==============================================================================
285 //==============================================================================
288 extern __at(0x000C) __sfr PIR1
;
302 extern __at(0x000C) volatile __PIR1bits_t PIR1bits
;
310 //==============================================================================
313 //==============================================================================
316 extern __at(0x000D) __sfr PIR2
;
330 extern __at(0x000D) volatile __PIR2bits_t PIR2bits
;
335 //==============================================================================
337 extern __at(0x000E) __sfr TMR1
;
338 extern __at(0x000E) __sfr TMR1L
;
339 extern __at(0x000F) __sfr TMR1H
;
341 //==============================================================================
344 extern __at(0x0010) __sfr T1CON
;
352 unsigned NOT_T1SYNC
: 1;
353 unsigned T1OSCEN
: 1;
354 unsigned T1CKPS0
: 1;
355 unsigned T1CKPS1
: 1;
364 unsigned T1INSYNC
: 1;
392 extern __at(0x0010) volatile __T1CONbits_t T1CONbits
;
396 #define _NOT_T1SYNC 0x04
397 #define _T1INSYNC 0x04
399 #define _T1OSCEN 0x08
400 #define _T1CKPS0 0x10
401 #define _T1CKPS1 0x20
403 //==============================================================================
405 extern __at(0x0011) __sfr TMR2
;
407 //==============================================================================
410 extern __at(0x0012) __sfr T2CON
;
416 unsigned T2CKPS0
: 1;
417 unsigned T2CKPS1
: 1;
419 unsigned TOUTPS0
: 1;
420 unsigned TOUTPS1
: 1;
421 unsigned TOUTPS2
: 1;
422 unsigned TOUTPS3
: 1;
440 extern __at(0x0012) volatile __T2CONbits_t T2CONbits
;
442 #define _T2CKPS0 0x01
443 #define _T2CKPS1 0x02
445 #define _TOUTPS0 0x08
446 #define _TOUTPS1 0x10
447 #define _TOUTPS2 0x20
448 #define _TOUTPS3 0x40
450 //==============================================================================
452 extern __at(0x0013) __sfr SSPBUF
;
454 //==============================================================================
457 extern __at(0x0014) __sfr SSPCON
;
480 extern __at(0x0014) volatile __SSPCONbits_t SSPCONbits
;
491 //==============================================================================
493 extern __at(0x0015) __sfr CCPR1
;
494 extern __at(0x0015) __sfr CCPR1L
;
495 extern __at(0x0016) __sfr CCPR1H
;
497 //==============================================================================
500 extern __at(0x0017) __sfr CCP1CON
;
523 extern __at(0x0017) volatile __CCP1CONbits_t CCP1CONbits
;
532 //==============================================================================
534 extern __at(0x001E) __sfr ADRESH
;
536 //==============================================================================
539 extern __at(0x001F) __sfr ADCON0
;
547 unsigned GO_NOT_DONE
: 1;
571 unsigned NOT_DONE
: 1;
583 unsigned GO_DONE
: 1;
605 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits
;
608 #define _GO_NOT_DONE 0x04
610 #define _NOT_DONE 0x04
611 #define _GO_DONE 0x04
618 //==============================================================================
621 //==============================================================================
624 extern __at(0x0081) __sfr OPTION_REG
;
637 unsigned NOT_RBPU
: 1;
645 } __OPTION_REGbits_t
;
647 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits
;
656 #define _NOT_RBPU 0x80
658 //==============================================================================
661 //==============================================================================
664 extern __at(0x0085) __sfr TRISA
;
687 extern __at(0x0085) volatile __TRISAbits_t TRISAbits
;
696 //==============================================================================
699 //==============================================================================
702 extern __at(0x0086) __sfr TRISB
;
716 extern __at(0x0086) volatile __TRISBbits_t TRISBbits
;
727 //==============================================================================
730 //==============================================================================
733 extern __at(0x0087) __sfr TRISC
;
747 extern __at(0x0087) volatile __TRISCbits_t TRISCbits
;
758 //==============================================================================
761 //==============================================================================
764 extern __at(0x008C) __sfr PIE1
;
778 extern __at(0x008C) volatile __PIE1bits_t PIE1bits
;
786 //==============================================================================
789 //==============================================================================
792 extern __at(0x008D) __sfr PIE2
;
806 extern __at(0x008D) volatile __PIE2bits_t PIE2bits
;
811 //==============================================================================
814 //==============================================================================
817 extern __at(0x008E) __sfr PCON
;
823 unsigned NOT_BOR
: 1;
824 unsigned NOT_POR
: 1;
846 extern __at(0x008E) volatile __PCONbits_t PCONbits
;
848 #define _NOT_BOR 0x01
850 #define _NOT_POR 0x02
852 //==============================================================================
855 //==============================================================================
858 extern __at(0x0091) __sfr SSPCON2
;
868 unsigned ACKSTAT
: 1;
872 extern __at(0x0091) volatile __SSPCON2bits_t SSPCON2bits
;
880 #define _ACKSTAT 0x40
883 //==============================================================================
885 extern __at(0x0092) __sfr PR2
;
886 extern __at(0x0093) __sfr SSPADD
;
888 //==============================================================================
891 extern __at(0x0094) __sfr SSPSTAT
;
899 unsigned R_NOT_W
: 1;
902 unsigned D_NOT_A
: 1;
912 unsigned I2C_START
: 1;
913 unsigned I2C_STOP
: 1;
923 unsigned I2C_READ
: 1;
926 unsigned I2C_DATA
: 1;
947 unsigned NOT_WRITE
: 1;
950 unsigned NOT_ADDRESS
: 1;
971 unsigned READ_WRITE
: 1;
974 unsigned DATA_ADDRESS
: 1;
980 extern __at(0x0094) volatile __SSPSTATbits_t SSPSTATbits
;
984 #define _R_NOT_W 0x04
986 #define _I2C_READ 0x04
988 #define _NOT_WRITE 0x04
990 #define _READ_WRITE 0x04
992 #define _I2C_START 0x08
994 #define _I2C_STOP 0x10
995 #define _D_NOT_A 0x20
997 #define _I2C_DATA 0x20
999 #define _NOT_ADDRESS 0x20
1001 #define _DATA_ADDRESS 0x20
1005 //==============================================================================
1007 extern __at(0x009E) __sfr ADRESL
;
1009 //==============================================================================
1012 extern __at(0x009F) __sfr ADCON1
;
1035 extern __at(0x009F) volatile __ADCON1bits_t ADCON1bits
;
1043 //==============================================================================
1045 extern __at(0x010C) __sfr EEDATA
;
1046 extern __at(0x010D) __sfr EEADR
;
1047 extern __at(0x010E) __sfr EEDATH
;
1048 extern __at(0x010F) __sfr EEADRH
;
1050 //==============================================================================
1053 extern __at(0x018C) __sfr EECON1
;
1067 extern __at(0x018C) volatile __EECON1bits_t EECON1bits
;
1075 //==============================================================================
1077 extern __at(0x018D) __sfr EECON2
;
1079 //==============================================================================
1081 // Configuration Bits
1083 //==============================================================================
1085 #define _CONFIG 0x2007
1087 //----------------------------- CONFIG Options -------------------------------
1089 #define _FOSC_LP 0x3FFC // LP oscillator.
1090 #define _LP_OSC 0x3FFC // LP oscillator.
1091 #define _FOSC_XT 0x3FFD // XT oscillator.
1092 #define _XT_OSC 0x3FFD // XT oscillator.
1093 #define _FOSC_HS 0x3FFE // HS oscillator.
1094 #define _HS_OSC 0x3FFE // HS oscillator.
1095 #define _FOSC_EXTRC 0x3FFF // RC oscillator.
1096 #define _RC_OSC 0x3FFF // RC oscillator.
1097 #define _WDTE_OFF 0x3FFB // WDT disabled.
1098 #define _WDT_OFF 0x3FFB // WDT disabled.
1099 #define _WDTE_ON 0x3FFF // WDT enabled.
1100 #define _WDT_ON 0x3FFF // WDT enabled.
1101 #define _PWRTE_ON 0x3FF7 // PWRT enabled.
1102 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
1103 #define _CP_ON 0x0FCF // All memory code protected.
1104 #define _CP_ALL 0x0FCF // All memory code protected.
1105 #define _CP_OFF 0x3FFF // Code protection off.
1106 #define _BOREN_OFF 0x3FBF // BOR disabled.
1107 #define _BODEN_OFF 0x3FBF // BOR disabled.
1108 #define _BOREN_ON 0x3FFF // BOR enabled.
1109 #define _BODEN_ON 0x3FFF // BOR enabled.
1110 #define _LVP_OFF 0x3F7F // RB3 is digital I/O, HV on MCLR must be used for programming.
1111 #define _LVP_ON 0x3FFF // RB3/PGM pin has PGM function; low-voltage programming enabled.
1112 #define _CPD_ON 0x3EFF // Data EEPROM memory code-protected.
1113 #define _CPD_OFF 0x3FFF // Code Protection off.
1114 #define _WRT_OFF 0x3DFF // Unprotected program memory may not be written to by EECON control.
1115 #define _WRT_ENABLE_OFF 0x3DFF // Unprotected program memory may not be written to by EECON control.
1116 #define _WRT_ALL 0x3FFF // Unprotected program memory may be written to by EECON control.
1117 #define _WRT_ENABLE_ON 0x3FFF // Unprotected program memory may be written to by EECON control.
1118 #define _DEBUG_ON 0x37FF // In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger.
1119 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins.
1121 //==============================================================================
1123 #define _DEVID1 0x2006
1125 #define _IDLOC0 0x2000
1126 #define _IDLOC1 0x2001
1127 #define _IDLOC2 0x2002
1128 #define _IDLOC3 0x2003
1130 //==============================================================================
1132 #ifndef NO_BIT_DEFINES
1134 #define ADON ADCON0bits.ADON // bit 0
1135 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 2, shadows bit in ADCON0bits
1136 #define GO ADCON0bits.GO // bit 2, shadows bit in ADCON0bits
1137 #define NOT_DONE ADCON0bits.NOT_DONE // bit 2, shadows bit in ADCON0bits
1138 #define GO_DONE ADCON0bits.GO_DONE // bit 2, shadows bit in ADCON0bits
1139 #define CHS0 ADCON0bits.CHS0 // bit 3
1140 #define CHS1 ADCON0bits.CHS1 // bit 4
1141 #define CHS2 ADCON0bits.CHS2 // bit 5
1142 #define ADCS0 ADCON0bits.ADCS0 // bit 6
1143 #define ADCS1 ADCON0bits.ADCS1 // bit 7
1145 #define PCFG0 ADCON1bits.PCFG0 // bit 0
1146 #define PCFG1 ADCON1bits.PCFG1 // bit 1
1147 #define PCFG2 ADCON1bits.PCFG2 // bit 2
1148 #define PCFG3 ADCON1bits.PCFG3 // bit 3
1149 #define ADFM ADCON1bits.ADFM // bit 7
1151 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
1152 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
1153 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
1154 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
1155 #define CCP1Y CCP1CONbits.CCP1Y // bit 4
1156 #define CCP1X CCP1CONbits.CCP1X // bit 5
1158 #define RD EECON1bits.RD // bit 0
1159 #define WR EECON1bits.WR // bit 1
1160 #define WREN EECON1bits.WREN // bit 2
1161 #define WRERR EECON1bits.WRERR // bit 3
1162 #define EEPGD EECON1bits.EEPGD // bit 7
1164 #define RBIF INTCONbits.RBIF // bit 0
1165 #define INTF INTCONbits.INTF // bit 1
1166 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
1167 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
1168 #define RBIE INTCONbits.RBIE // bit 3
1169 #define INTE INTCONbits.INTE // bit 4
1170 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
1171 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
1172 #define PEIE INTCONbits.PEIE // bit 6
1173 #define GIE INTCONbits.GIE // bit 7
1175 #define PS0 OPTION_REGbits.PS0 // bit 0
1176 #define PS1 OPTION_REGbits.PS1 // bit 1
1177 #define PS2 OPTION_REGbits.PS2 // bit 2
1178 #define PSA OPTION_REGbits.PSA // bit 3
1179 #define T0SE OPTION_REGbits.T0SE // bit 4
1180 #define T0CS OPTION_REGbits.T0CS // bit 5
1181 #define INTEDG OPTION_REGbits.INTEDG // bit 6
1182 #define NOT_RBPU OPTION_REGbits.NOT_RBPU // bit 7
1184 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits
1185 #define NOT_BO PCONbits.NOT_BO // bit 0, shadows bit in PCONbits
1186 #define NOT_POR PCONbits.NOT_POR // bit 1
1188 #define TMR1IE PIE1bits.TMR1IE // bit 0
1189 #define TMR2IE PIE1bits.TMR2IE // bit 1
1190 #define CCP1IE PIE1bits.CCP1IE // bit 2
1191 #define SSPIE PIE1bits.SSPIE // bit 3
1192 #define ADIE PIE1bits.ADIE // bit 6
1194 #define BCLIE PIE2bits.BCLIE // bit 3
1195 #define EEIE PIE2bits.EEIE // bit 4
1197 #define TMR1IF PIR1bits.TMR1IF // bit 0
1198 #define TMR2IF PIR1bits.TMR2IF // bit 1
1199 #define CCP1IF PIR1bits.CCP1IF // bit 2
1200 #define SSPIF PIR1bits.SSPIF // bit 3
1201 #define ADIF PIR1bits.ADIF // bit 6
1203 #define BCLIF PIR2bits.BCLIF // bit 3
1204 #define EEIF PIR2bits.EEIF // bit 4
1206 #define RA0 PORTAbits.RA0 // bit 0
1207 #define RA1 PORTAbits.RA1 // bit 1
1208 #define RA2 PORTAbits.RA2 // bit 2
1209 #define RA3 PORTAbits.RA3 // bit 3
1210 #define RA4 PORTAbits.RA4 // bit 4
1211 #define RA5 PORTAbits.RA5 // bit 5
1213 #define RB0 PORTBbits.RB0 // bit 0
1214 #define RB1 PORTBbits.RB1 // bit 1
1215 #define RB2 PORTBbits.RB2 // bit 2
1216 #define RB3 PORTBbits.RB3 // bit 3
1217 #define RB4 PORTBbits.RB4 // bit 4
1218 #define RB5 PORTBbits.RB5 // bit 5
1219 #define RB6 PORTBbits.RB6 // bit 6
1220 #define RB7 PORTBbits.RB7 // bit 7
1222 #define RC0 PORTCbits.RC0 // bit 0
1223 #define RC1 PORTCbits.RC1 // bit 1
1224 #define RC2 PORTCbits.RC2 // bit 2
1225 #define RC3 PORTCbits.RC3 // bit 3
1226 #define RC4 PORTCbits.RC4 // bit 4
1227 #define RC5 PORTCbits.RC5 // bit 5
1228 #define RC6 PORTCbits.RC6 // bit 6
1229 #define RC7 PORTCbits.RC7 // bit 7
1231 #define SSPM0 SSPCONbits.SSPM0 // bit 0
1232 #define SSPM1 SSPCONbits.SSPM1 // bit 1
1233 #define SSPM2 SSPCONbits.SSPM2 // bit 2
1234 #define SSPM3 SSPCONbits.SSPM3 // bit 3
1235 #define CKP SSPCONbits.CKP // bit 4
1236 #define SSPEN SSPCONbits.SSPEN // bit 5
1237 #define SSPOV SSPCONbits.SSPOV // bit 6
1238 #define WCOL SSPCONbits.WCOL // bit 7
1240 #define SEN SSPCON2bits.SEN // bit 0
1241 #define RSEN SSPCON2bits.RSEN // bit 1
1242 #define PEN SSPCON2bits.PEN // bit 2
1243 #define RCEN SSPCON2bits.RCEN // bit 3
1244 #define ACKEN SSPCON2bits.ACKEN // bit 4
1245 #define ACKDT SSPCON2bits.ACKDT // bit 5
1246 #define ACKSTAT SSPCON2bits.ACKSTAT // bit 6
1247 #define GCEN SSPCON2bits.GCEN // bit 7
1249 #define BF SSPSTATbits.BF // bit 0
1250 #define UA SSPSTATbits.UA // bit 1
1251 #define R_NOT_W SSPSTATbits.R_NOT_W // bit 2, shadows bit in SSPSTATbits
1252 #define R SSPSTATbits.R // bit 2, shadows bit in SSPSTATbits
1253 #define I2C_READ SSPSTATbits.I2C_READ // bit 2, shadows bit in SSPSTATbits
1254 #define NOT_W SSPSTATbits.NOT_W // bit 2, shadows bit in SSPSTATbits
1255 #define NOT_WRITE SSPSTATbits.NOT_WRITE // bit 2, shadows bit in SSPSTATbits
1256 #define R_W SSPSTATbits.R_W // bit 2, shadows bit in SSPSTATbits
1257 #define READ_WRITE SSPSTATbits.READ_WRITE // bit 2, shadows bit in SSPSTATbits
1258 #define S SSPSTATbits.S // bit 3, shadows bit in SSPSTATbits
1259 #define I2C_START SSPSTATbits.I2C_START // bit 3, shadows bit in SSPSTATbits
1260 #define P SSPSTATbits.P // bit 4, shadows bit in SSPSTATbits
1261 #define I2C_STOP SSPSTATbits.I2C_STOP // bit 4, shadows bit in SSPSTATbits
1262 #define D_NOT_A SSPSTATbits.D_NOT_A // bit 5, shadows bit in SSPSTATbits
1263 #define D SSPSTATbits.D // bit 5, shadows bit in SSPSTATbits
1264 #define I2C_DATA SSPSTATbits.I2C_DATA // bit 5, shadows bit in SSPSTATbits
1265 #define NOT_A SSPSTATbits.NOT_A // bit 5, shadows bit in SSPSTATbits
1266 #define NOT_ADDRESS SSPSTATbits.NOT_ADDRESS // bit 5, shadows bit in SSPSTATbits
1267 #define D_A SSPSTATbits.D_A // bit 5, shadows bit in SSPSTATbits
1268 #define DATA_ADDRESS SSPSTATbits.DATA_ADDRESS // bit 5, shadows bit in SSPSTATbits
1269 #define CKE SSPSTATbits.CKE // bit 6
1270 #define SMP SSPSTATbits.SMP // bit 7
1272 #define C STATUSbits.C // bit 0
1273 #define DC STATUSbits.DC // bit 1
1274 #define Z STATUSbits.Z // bit 2
1275 #define NOT_PD STATUSbits.NOT_PD // bit 3
1276 #define NOT_TO STATUSbits.NOT_TO // bit 4
1277 #define RP0 STATUSbits.RP0 // bit 5
1278 #define RP1 STATUSbits.RP1 // bit 6
1279 #define IRP STATUSbits.IRP // bit 7
1281 #define TMR1ON T1CONbits.TMR1ON // bit 0
1282 #define TMR1CS T1CONbits.TMR1CS // bit 1
1283 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2, shadows bit in T1CONbits
1284 #define T1INSYNC T1CONbits.T1INSYNC // bit 2, shadows bit in T1CONbits
1285 #define T1SYNC T1CONbits.T1SYNC // bit 2, shadows bit in T1CONbits
1286 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
1287 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
1288 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
1290 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
1291 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
1292 #define TMR2ON T2CONbits.TMR2ON // bit 2
1293 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
1294 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
1295 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
1296 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
1298 #define TRISA0 TRISAbits.TRISA0 // bit 0
1299 #define TRISA1 TRISAbits.TRISA1 // bit 1
1300 #define TRISA2 TRISAbits.TRISA2 // bit 2
1301 #define TRISA3 TRISAbits.TRISA3 // bit 3
1302 #define TRISA4 TRISAbits.TRISA4 // bit 4
1303 #define TRISA5 TRISAbits.TRISA5 // bit 5
1305 #define TRISB0 TRISBbits.TRISB0 // bit 0
1306 #define TRISB1 TRISBbits.TRISB1 // bit 1
1307 #define TRISB2 TRISBbits.TRISB2 // bit 2
1308 #define TRISB3 TRISBbits.TRISB3 // bit 3
1309 #define TRISB4 TRISBbits.TRISB4 // bit 4
1310 #define TRISB5 TRISBbits.TRISB5 // bit 5
1311 #define TRISB6 TRISBbits.TRISB6 // bit 6
1312 #define TRISB7 TRISBbits.TRISB7 // bit 7
1314 #define TRISC0 TRISCbits.TRISC0 // bit 0
1315 #define TRISC1 TRISCbits.TRISC1 // bit 1
1316 #define TRISC2 TRISCbits.TRISC2 // bit 2
1317 #define TRISC3 TRISCbits.TRISC3 // bit 3
1318 #define TRISC4 TRISCbits.TRISC4 // bit 4
1319 #define TRISC5 TRISCbits.TRISC5 // bit 5
1320 #define TRISC6 TRISCbits.TRISC6 // bit 6
1321 #define TRISC7 TRISCbits.TRISC7 // bit 7
1323 #endif // #ifndef NO_BIT_DEFINES
1325 #endif // #ifndef __PIC16F872_H__