arch/common/ata.device/ata.h

   1 #ifndef _ATA_H
   2 #define _ATA_H
   3
   4 /*
   5     Copyright © 2004-2007, The AROS Development Team. All rights reserved
   6     $Id$
   7
   8     Desc: ata.device main private include file
   9     Lang: English
  10 */
  11 /*
  12  * CHANGELOG:
  13  * DATE        NAME                ENTRY
  14  * ----------  ------------------  -------------------------------------------------------------------
  15  * 2008-01-25  T. Wiszkowski       Rebuilt, rearranged and partially fixed 60% of the code here
  16  *                                 Enabled implementation to scan for other PCI IDE controllers
  17  *                                 Implemented ATAPI Packet Support for both read and write
  18  *                                 Corrected ATAPI DMA handling
  19  *                                 Fixed major IDE enumeration bugs severely handicapping transfers with more than one controller
  20  *                                 Compacted source and implemented major ATA support procedure
  21  *                                 Improved DMA and Interrupt management
  22  *                                 Removed obsolete code
  23  * 2008-03-23  T. Wiszkowski       Corrected DMA PRD issue (x86_64 systems)
  24  * 2008-03-30  T. Wiszkowski       Added workaround for interrupt collision handling; fixed SATA in LEGACY mode.
  25  *                                 nForce and Intel SATA chipsets should now be operational.
  26  * 2008-03-31  M. Schulz           We do have asm/io.h include for ages... No need to define io functions here anymore.
  27  *                                 Redefined ata_in and ata_out. On x86-like systems they use inb/outb directly. On other systems
  28  *                                 they use pci_inb and pci_outb.
  29  * 2008-04-05  T. Wiszkowski       Improved IRQ management
  30  * 2008-04-07  T. Wiszkowski       Changed bus timeout mechanism
  31  */
  32
  33 #include <exec/types.h>
  34 #include <exec/devices.h>
  35 #include <exec/semaphores.h>
  36 #include <exec/execbase.h>
  37 #include <exec/libraries.h>
  38 #include <exec/ports.h>
  39 #include <utility/utility.h>
  40 #include <exec/io.h>
  41 #include <exec/errors.h>
  42 #include <devices/trackdisk.h>
  43 #include <devices/scsidisk.h>
  44 #include <devices/newstyle.h>
  45 #include <devices/timer.h>
  46 #include <aros/bootloader.h>
  47 #include "include/cd.h"
  48 #include "include/scsicmds.h"
  49
  50 #include <hidd/irq.h>
  51 #include <asm/io.h>
  52
  53 #include LC_LIBDEFS_FILE
  54
  55 #define MAX_UNIT    2
  56 #define STACK_SIZE  16384
  57 #define TASK_PRI    10
  58
  59 /*
  60     Don't blame me for information redundance here!
  61
  62     Please note, that all structures here are more or less chained together.
  63     The aim is, every single function in ata.device, no matter whether it takes
  64     ata_Unit or ata_Bus or God knows what else, would have access to ata device
  65     base and through it, to all other device structures.
  66
  67     I just wanted to avoid passing ataBase everywhere. :-D
  68 */
  69
  70 /* structure forward declarations */
  71 struct ata_Unit;
  72 struct ata_Bus;
  73
  74 /*
  75  * this **might** cause problems with PPC64, which **might** expect both to be 64bit.
  76  */
  77 struct PRDEntry {
  78     ULONG   prde_Address;
  79     ULONG   prde_Length;
  80 };
  81
  82 #define PRDE_EOT    0x8000
  83 #define PRD_MAX     514
  84
  85 /* ata.device base */
  86 struct ataBase
  87 {
  88     /*
  89      * Device structure - used to manage devices by exec guts^h^h^hoods
  90      */
  91     struct Device           ata_Device;
  92
  93     /*
  94      * master task pointer
  95      */
  96     struct Task            *ata_Daemon;
  97
  98     /*
  99      * list of all buses - we may have more than just 4
 100      */
 101     struct MinList          ata_Buses;
 102
 103     /*
 104      * flags
 105      */
 106     UBYTE                   ata_32bit;
 107     UBYTE                   ata_NoDMA;
 108
 109     /*
 110      * memory pool
 111      */
 112     APTR                    ata_MemPool;
 113 };
 114
 115 /*
 116     The single IDE bus (channel)
 117 */
 118 struct ata_Bus
 119 {
 120     struct MinNode          ab_Node;    /* exec node */
 121     struct ataBase          *ab_Base;   /* device self */
 122     struct SignalSemaphore  ab_Lock;    /* Semaphore locking IO access */
 123
 124     ULONG                   ab_Port;    /* IO port used */
 125     ULONG                   ab_Alt;     /* alternate io port */
 126     UBYTE                   ab_Irq;     /* IRQ used */
 127     UBYTE                   ab_Dev[2];  /* Master/Slave type, see below */
 128     UBYTE                   ab_Flags;   /* Bus flags similar to unit flags */
 129     BYTE                    ab_SleepySignal; /* Signal used to wake the task up, when it's waiting */
 130                                              /* for data requests/DMA */
 131     UBYTE                   ab_BusNum;  /* bus id - used to calculate device id */
 132     BOOL                    ab_Waiting;
 133     LONG                    ab_Timeout; /* in seconds; please note that resolution is low (1sec) */
 134
 135     struct ata_Unit         *ab_Units[MAX_UNIT];    /* Units on the bus */
 136
 137     HIDDT_IRQ_Handler       *ab_IntHandler;
 138     ULONG                   ab_IntCnt;
 139
 140     struct Task             *ab_Task;       /* Bus task handling all not-immediate transactions */
 141     struct MsgPort          *ab_MsgPort;    /* Task's message port */
 142     struct PRDEntry         *ab_PRD;
 143 };
 144
 145 /* Device types */
 146 #define DEV_NONE        0x00
 147 #define DEV_UNKNOWN     0x01
 148 #define DEV_ATA         0x02
 149 #define DEV_SATA        0x03
 150 #define DEV_ATAPI       0x80
 151 #define DEV_SATAPI      0x81
 152
 153 /*
 154     DriveIdent structure as returned by ATA_IDENTIFY_[DEVICE|ATAPI]
 155 */
 156 struct DriveIdent {
 157     UWORD       id_General;             // 0
 158     UWORD       id_OldCylinders;        // 1
 159     UWORD       id_SpecificConfig;      // 2
 160     UWORD       id_OldHeads;            // 3
 161     UWORD       pad1[2];                // 4-5
 162     UWORD       id_OldSectors;          // 6
 163     UWORD       pad2[3];                // 7-9
 164     UBYTE       id_SerialNumber[20];    // 10-19
 165     UWORD       pad3[3];                // 20-22
 166     UBYTE       id_FirmwareRev[8];      // 23-26
 167     UBYTE       id_Model[40];           // 27-46
 168     UWORD       id_RWMultipleSize;      // 47
 169     UWORD       pad4;                   // 48
 170     UWORD       id_Capabilities;        // 49
 171     UWORD       id_OldCaps;             // 50
 172     UWORD       id_OldPIO;              // 51
 173     UWORD       pad5;                   // 52
 174     UWORD       id_ConfigAvailable;     // 53
 175     UWORD       id_OldLCylinders;       // 54
 176     UWORD       id_OldLHeads;           // 55
 177     UWORD       id_OldLSectors;         // 56
 178     UWORD       pad6[2];                // 57-58
 179     UWORD       id_RWMultipleTrans;     // 59
 180     ULONG       id_LBASectors;          // 60-61
 181     UWORD       pad7;                   // 62
 182     UWORD       id_MWDMASupport;        // 63
 183     UWORD       id_PIOSupport;          // 64
 184     UWORD       id_MWDMA_MinCycleTime;  // 65
 185     UWORD       id_MWDMA_DefCycleTime;  // 66
 186     UWORD       id_PIO_MinCycleTime;    // 67
 187     UWORD       id_PIO_MinCycleTImeIORDY; // 68
 188     UWORD       pad8[6];                // 69-74
 189     UWORD       id_QueueDepth;          // 75
 190     UWORD       pad9[4];                // 76-79
 191     UWORD       id_ATAVersion;          // 80
 192     UWORD       id_ATARevision;         // 81
 193     UWORD       id_Commands1;           // 82
 194     UWORD       id_Commands2;           // 83
 195     UWORD       id_Commands3;           // 84
 196     UWORD       id_Commands4;           // 85
 197     UWORD       id_Commands5;           // 86
 198     UWORD       id_Commands6;           // 87
 199     UWORD       id_UDMASupport;         // 88
 200     UWORD       id_SecurityEraseTime;   // 89
 201     UWORD       id_EnchSecurityEraseTime; // 90
 202     UWORD       id_CurrentAdvowerMode;  // 91
 203     UWORD       id_MasterPwdRevision;   // 92
 204     UWORD       id_HWResetResult;       // 93
 205     UWORD       id_AcousticManagement;  // 94
 206     UWORD       id_StreamMinimunReqSize; // 95
 207     UWORD       id_StreamingTimeDMA;    // 96
 208     UWORD       id_StreamingLatency;    // 97
 209     ULONG       id_StreamingGranularity; // 98-99
 210     UQUAD       id_LBA48Sectors;        // 100-103
 211     UWORD       id_StreamingTimePIO;    // 104
 212     UWORD       pad10;                  // 105
 213     UWORD       id_PhysSectorSize;      // 106
 214     UWORD       pad11;                  // 107
 215     UQUAD       id_UniqueIDi[2];        // 108-115
 216     UWORD       pad12;                  // 116
 217     ULONG       id_WordsPerLogicalSector; // 117-118
 218     UWORD       pad13[8];               // 119-126
 219     UWORD       id_RemMediaStatusNotificationFeatures; // 127
 220     UWORD       id_SecurityStatus;      // 128
 221     UWORD       pad14[127];
 222 } __attribute__((packed));
 223
 224 typedef struct
 225 {
 226    UBYTE command;       // current ATA command
 227    UBYTE feature;       // FF to indicate no feature
 228    UBYTE secmul;        // for read multiple - multiplier. default 1
 229    UBYTE pad;
 230    UQUAD blk;
 231    ULONG sectors;
 232    APTR  buffer;
 233    ULONG length;
 234    ULONG actual;
 235
 236    enum
 237    {
 238       CM_NoData,
 239       CM_PIORead,
 240       CM_PIOWrite,
 241       CM_DMARead,
 242       CM_DMAWrite
 243    } method;
 244    enum
 245    {
 246       CT_NoBlock,
 247       CT_LBA28,
 248       CT_LBA48,
 249    } type;
 250 } ata_CommandBlock;
 251
 252 /*
 253     Unit structure describing given device on the bus. It contains all the
 254     necessary information unit/device may need.
 255 */
 256 struct ata_Unit
 257 {
 258     struct Unit         au_Unit;   /* exec's unit */
 259     struct DriveIdent  *au_Drive;  /* Drive Ident after IDENTIFY command */
 260     struct ata_Bus     *au_Bus;    /* Bus on which this unit is */
 261
 262     ULONG               au_DMAPort;
 263     ULONG               au_XferModes;   /* available transfer modes */
 264
 265     ULONG               au_Capacity;    /* Highest sector accessible through LBA28 */
 266     UQUAD               au_Capacity48;  /* Highest sector accessible through LBA48 */
 267     ULONG               au_Cylinders;
 268     UBYTE               au_Heads;
 269     UBYTE               au_Sectors;
 270     UBYTE               au_Model[41];
 271     UBYTE               au_FirmwareRev[9];
 272     UBYTE               au_SerialNumber[21];
 273
 274     /*
 275         Here are stored pointers to functions responsible for handling this
 276         device. They are set during device initialization and point to most
 277         effective functions for this particular unit. Read/Write may be done
 278         in PIO mode reading single sectors, using PIO with multiword or DMA.
 279     */
 280     ULONG               (*au_Read32)(struct ata_Unit *, ULONG, ULONG, APTR, ULONG *);
 281     ULONG               (*au_Write32)(struct ata_Unit *, ULONG, ULONG, APTR, ULONG *);
 282     ULONG               (*au_Read64)(struct ata_Unit *, UQUAD, ULONG, APTR, ULONG *);
 283     ULONG               (*au_Write64)(struct ata_Unit *, UQUAD, ULONG, APTR, ULONG *);
 284     ULONG               (*au_Eject)(struct ata_Unit *);
 285     ULONG               (*au_DirectSCSI)(struct ata_Unit *, struct SCSICmd*);
 286     ULONG               (*au_Identify)(struct ata_Unit *);
 287
 288     VOID                (*au_ins)(APTR, UWORD, ULONG);
 289     VOID                (*au_outs)(APTR, UWORD, ULONG);
 290
 291     /* If a HW driver is used with this unit, it may store its data here */
 292     APTR                au_DriverData;
 293
 294     ULONG               au_UnitNum;     /* Unit number as coded by device */
 295     ULONG               au_Flags;       /* Unit flags, see below */
 296     ULONG               au_ChangeNum;   /* Number of disc changes */
 297     ULONG               au_NumLoop;     /* Maximal busy wait delay for unit */
 298
 299     struct Interrupt   *au_RemoveInt;  /* Raise this interrupt on a disc change */
 300     struct List         au_SoftList;    /* Raise even more interrupts from this list on disc change */
 301
 302     UBYTE               au_RDBSector;           /* Geee. Do I really need it? */
 303     UBYTE               au_SectorShift;         /* Sector shift. 9 here is 512 bytes sector */
 304     UBYTE               au_DevMask;             /* device mask used to simplify device number coding */
 305     UBYTE               au_SenseKey;            /* Sense key from ATAPI devices */
 306     UBYTE               au_DevType;
 307
 308 };
 309
 310 typedef enum
 311 {
 312    AB_XFER_PIO0 = 0,
 313    AB_XFER_PIO1,
 314    AB_XFER_PIO2,
 315    AB_XFER_PIO3,
 316    AB_XFER_PIO4,
 317    AB_XFER_PIO5,
 318    AB_XFER_PIO6,
 319    AB_XFER_PIO7,
 320
 321    AB_XFER_MDMA0,
 322    AB_XFER_MDMA1,
 323    AB_XFER_MDMA2,
 324    AB_XFER_MDMA3,
 325    AB_XFER_MDMA4,
 326    AB_XFER_MDMA5,
 327    AB_XFER_MDMA6,
 328    AB_XFER_MDMA7,
 329
 330    AB_XFER_UDMA0,
 331    AB_XFER_UDMA1,
 332    AB_XFER_UDMA2,
 333    AB_XFER_UDMA3,
 334    AB_XFER_UDMA4,
 335    AB_XFER_UDMA5,
 336    AB_XFER_UDMA6,
 337    AB_XFER_UDMA7,
 338
 339    AB_XFER_48BIT,
 340    AB_XFER_RWMULTI,
 341    AB_XFER_PACKET,
 342    AB_XFER_LBA,
 343    AB_XFER_DMA,
 344
 345 } ata_XferMode;
 346
 347 #define AF_XFER_PIO(x)  (1<<(AB_XFER_PIO0+(x)))
 348 #define AF_XFER_MDMA(x) (1<<(AB_XFER_MDMA0+(x)))
 349 #define AF_XFER_UDMA(x) (1<<(AB_XFER_UDMA0+(x)))
 350 #define AF_XFER_48BIT   (1<<(AB_XFER_48BIT))
 351 #define AF_XFER_RWMULTI (1<<(AB_XFER_RWMULTI))
 352 #define AF_XFER_PACKET  (1<<(AB_XFER_PACKET))
 353 #define AF_XFER_LBA     (1<<(AB_XFER_LBA))
 354 #define AF_XFER_DMA     (1<<(AB_XFER_DMA))
 355
 356 /* Unit internal flags */
 357 #define AB_DiscPresent          30
 358 #define AB_DiscPresenceUnknown  29
 359 #define AB_Removable            28
 360 #define AB_Used                 27
 361 #define AB_SlowDevice           26
 362
 363 #define AF_DiscPresent          (1 << AB_DiscPresent)
 364 #define AF_DiscPresenceUnknown  (1 << AB_DiscPresenceUnknown)
 365 #define AF_Removable            (1 << AB_Removable)
 366 #define AF_Used                 (1 << AB_Used)
 367 #define AF_SlowDevice           (1 << AB_SlowDevice)
 368
 369 /* ATA/ATAPI registers */
 370 #define ata_Error           1
 371 #define ata_Feature         1
 372 #define ata_Count           2
 373 #define ata_LBALow          3
 374 #define ata_LBAMid          4
 375 #define ata_LBAHigh         5
 376 #define ata_DevHead         6
 377 #define ata_Status          7
 378 #define ata_Command         7
 379 #define ata_AltStatus       0x2
 380 #define ata_AltControl      0x2
 381
 382 #if defined(__i386__) || defined(__x86_64__)
 383 #define ata_out(val, offset, port)  outb((val), (offset)+(port))
 384 #define ata_in(offset, port)        inb((offset)+(port))
 385 #define ata_outl(val, offset, port) outl((val), (offset)+(port))
 386 #else
 387 #define ata_out(val, offset, port)  pci_outb((val), (offset)+(port))
 388 #define ata_in(offset, port)        pci_inb((offset)+(port))
 389 #define ata_outl(val, offset, port) pci_outl_le((val), (offset)+(port))
 390 #endif
 391
 392 #define atapi_Error         1
 393 #define atapi_Features      1
 394 #define atapi_Reason        2
 395 #define atapi_ByteCntL      4
 396 #define atapi_ByteCntH      5
 397 #define atapi_DevSel        6
 398 #define atapi_Status        7
 399 #define atapi_Command       7
 400
 401 /* Atapi status bits */
 402 #define ATAB_SLAVE          4
 403 #define ATAB_LBA            6
 404 #define ATAB_ATAPI          7
 405 #define ATAB_DATAREQ        3
 406 #define ATAB_ERROR          0
 407 #define ATAB_BUSY           7
 408
 409 #define ATAF_SLAVE          0x10
 410 #define ATAF_LBA            0x40
 411 #define ATAF_ATAPI          0x80
 412 #define ATAF_DATAREQ        0x08
 413 #define ATAF_ERROR          0x01
 414 #define ATAF_BUSY           0x80
 415
 416 #define ATAPIF_CHECK        0x01
 417
 418 /* ATA/ATAPI commands */
 419 #define ATA_SET_FEATURES    0xef
 420 #define ATA_SET_MULTIPLE    0xc6
 421 #define ATA_DEVICE_RESET    0x08
 422 #define ATA_IDENTIFY_DEVICE 0xec
 423 #define ATA_IDENTIFY_ATAPI  0xa1
 424 #define ATA_NOP             0x00
 425 #define ATA_PACKET          0xa0
 426 #define ATA_READ_DMA        0xc8
 427 #define ATA_READ_DMA64      0x25
 428 #define ATA_READ            0x20
 429 #define ATA_READ64          0x24
 430 #define ATA_READ_MULTIPLE   0xc4
 431 #define ATA_READ_MULTIPLE64 0x29
 432 #define ATA_WRITE_DMA       0xca
 433 #define ATA_WRITE_DMA64     0x35
 434 #define ATA_WRITE           0x30
 435 #define ATA_WRITE64         0x34
 436 #define ATA_WRITE_MULTIPLE  0xc5
 437 #define ATA_WRITE_MULTIPLE64 0x39
 438 #define ATA_MEDIA_EJECT     0xed
 439
 440 #define ATAPIF_MASK         0x03
 441 #define ATAPIF_COMMAND      0x01
 442 #define ATAPIF_READ         0x02
 443 #define ATAPIF_WRITE        0x00
 444
 445 /* SFF-8038i DMA registers */
 446 #define dma_Command         0x00
 447 #define dma_Status          0x02
 448 #define dma_PRD             0x04
 449
 450 /* DMA command register */
 451 #define DMA_READ            0x00    /* PCI *READS* from memory to drive */
 452 #define DMA_WRITE           0x08    /* PCI *WRITES* to memory from drive */
 453 #define DMA_START           0x01    /* DMA Start/Stop */
 454
 455 #define DMAB_Active         0
 456 #define DMAB_Error          1
 457 #define DMAB_Interrupt      2
 458 #define DMAB_Simplex        7
 459
 460 #define DMAF_Active         (1 << DMAB_Active)
 461 #define DMAF_Error          (1 << DMAB_Error)
 462 #define DMAF_Interrupt      (1 << DMAB_Interrupt)
 463 #define DMAF_Simplex        (1 << DMAB_Simplex)
 464
 465 #define Unit(io) ((struct ata_Unit *)(io)->io_Unit)
 466 #define IOStdReq(io) ((struct IOStdReq *)io)
 467
 468 /* Function prototypes */
 469
 470 void ata_usleep(struct timerequest *, ULONG);
 471 void ata_ResetBus(struct timerequest *, struct ata_Bus *);
 472 void ata_ScanBus(struct ata_Bus *);
 473
 474 int atapi_SendPacket(struct ata_Unit *, APTR, LONG, BOOL*, BOOL);
 475 int atapi_TestUnitOK(struct ata_Unit *);
 476
 477 ULONG atapi_Identify(struct ata_Unit*);
 478 ULONG ata_Identify(struct ata_Unit*);
 479
 480 ULONG atapi_DirectSCSI(struct ata_Unit*, struct SCSICmd *);
 481 ULONG atapi_RequestSense(struct ata_Unit* unit, UBYTE* sense, ULONG senselen);
 482
 483 int ata_InitBusTask(struct ata_Bus *);
 484 int ata_InitDaemonTask(LIBBASETYPEPTR);
 485 void ata_HandleIRQ(struct ata_Bus *bus);
 486 UBYTE ata_ReadStatus(struct ata_Bus *bus);
 487
 488 VOID dma_SetupPRD(struct ata_Unit *, APTR, ULONG, BOOL);
 489 VOID dma_SetupPRDSize(struct ata_Unit *, APTR, ULONG, BOOL);
 490 VOID dma_StartDMA(struct ata_Unit *);
 491 VOID dma_StopDMA(struct ata_Unit *);
 492
 493 BOOL ata_setup_unit(struct ata_Bus *bus, UBYTE u);
 494 BOOL ata_init_unit(struct ata_Bus *bus, UBYTE u);
 495 BOOL AddVolume(ULONG StartCyl, ULONG EndCyl, struct ata_Unit *unit);
 496
 497 #define ATAPI_SS_EJECT  0x02
 498 #define ATAPI_SS_LOAD   0x03
 499
 500 struct atapi_StartStop
 501 {
 502     UBYTE   command;
 503     UBYTE   immediate;
 504     UBYTE   pad1[2];
 505     UBYTE   flags;
 506     UBYTE   pad2[7];
 507 };
 508
 509 #if 0
 510 /*
 511     Arch specific things to access IO space of drive. Shouldn't be here. Really.
 512 */
 513 static inline ULONG inl(UWORD port)
 514 {
 515     ULONG val;
 516     asm volatile ("inl %w1,%0":"=a"(val):"Nd"(port));
 517
 518     return val;
 519 }
 520
 521 static inline UWORD inw(UWORD port)
 522 {
 523     UWORD val;
 524     asm volatile ("inw %w1,%0":"=a"(val):"Nd"(port));
 525
 526     return val;
 527 }
 528
 529 static inline UBYTE inb(UWORD port)
 530 {
 531     UBYTE val;
 532     asm volatile ("inb %w1,%0":"=a"(val):"Nd"(port));
 533
 534     return val;
 535 }
 536
 537 static inline VOID outl(ULONG val, UWORD port)
 538 {
 539     asm volatile ("outl %0,%w1"::"a"(val),"Nd"(port));
 540 }
 541
 542 static inline VOID outw(UWORD val, UWORD port)
 543 {
 544     asm volatile ("outw %0,%w1"::"a"(val),"Nd"(port));
 545 }
 546
 547 static inline VOID outb(UBYTE val, UWORD port)
 548 {
 549     asm volatile ("outb %0,%w1"::"a"(val),"Nd"(port));
 550 }
 551 #endif
 552
 553 #endif // _ATA_H
 554