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Release 0.9.61.
[wine/gsoc-2012-control.git] / programs / winedbg / be_i386.c
blobc3bf155e9b0a85ef20540d1736eff47cf7b70e48
1 /*
2 * Debugger i386 specific functions
3 *
4 * Copyright 2004 Eric Pouech
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
19 */
20
21 #include "debugger.h"
22 #include "wine/debug.h"
23
24 WINE_DEFAULT_DEBUG_CHANNEL(winedbg);
25
26 #ifdef __i386__
27
28 /* debugger/db_disasm.c */
29 extern void be_i386_disasm_one_insn(ADDRESS64* addr, int display);
30
31 #define STEP_FLAG 0x00000100 /* single step flag */
32 #define V86_FLAG 0x00020000
33
34 #define IS_VM86_MODE(ctx) (ctx->EFlags & V86_FLAG)
35
36 static ADDRESS_MODE get_selector_type(HANDLE hThread, const CONTEXT* ctx, WORD sel)
37 {
38 LDT_ENTRY le;
39
40 if (IS_VM86_MODE(ctx)) return AddrModeReal;
41 /* null or system selector */
42 if (!(sel & 4) || ((sel >> 3) < 17)) return AddrModeFlat;
43 if (dbg_curr_process->process_io->get_selector(hThread, sel, &le))
44 return le.HighWord.Bits.Default_Big ? AddrMode1632 : AddrMode1616;
45 /* selector doesn't exist */
46 return -1;
47 }
48
49 static void* be_i386_linearize(HANDLE hThread, const ADDRESS64* addr)
50 {
51 LDT_ENTRY le;
52
53 switch (addr->Mode)
54 {
55 case AddrModeReal:
56 return (void*)((DWORD)(LOWORD(addr->Segment) << 4) + (DWORD)addr->Offset);
57 case AddrMode1632:
58 if (!(addr->Segment & 4) || ((addr->Segment >> 3) < 17))
59 return (void*)(DWORD)addr->Offset;
60 /* fall through */
61 case AddrMode1616:
62 if (!dbg_curr_process->process_io->get_selector(hThread, addr->Segment, &le)) return NULL;
63 return (void*)((le.HighWord.Bits.BaseHi << 24) +
64 (le.HighWord.Bits.BaseMid << 16) + le.BaseLow +
65 (DWORD)addr->Offset);
66 case AddrModeFlat:
67 return (void*)(DWORD)addr->Offset;
68 }
69 return NULL;
70 }
71
72 static unsigned be_i386_build_addr(HANDLE hThread, const CONTEXT* ctx, ADDRESS64* addr,
73 unsigned seg, unsigned long offset)
74 {
75 addr->Mode = AddrModeFlat;
76 addr->Segment = seg;
77 addr->Offset = offset;
78 if (seg)
79 {
80 addr->Mode = get_selector_type(hThread, ctx, seg);
81 switch (addr->Mode)
82 {
83 case AddrModeReal:
84 case AddrMode1616:
85 addr->Offset &= 0xffff;
86 break;
87 case AddrModeFlat:
88 case AddrMode1632:
89 break;
90 default:
91 addr->Mode = -1;
92 return FALSE;
93 }
94 }
95 return TRUE;
96 }
97
98 static unsigned be_i386_get_addr(HANDLE hThread, const CONTEXT* ctx,
99 enum be_cpu_addr bca, ADDRESS64* addr)
100 {
101 switch (bca)
102 {
103 case be_cpu_addr_pc:
104 return be_i386_build_addr(hThread, ctx, addr, ctx->SegCs, ctx->Eip);
105 case be_cpu_addr_stack:
106 return be_i386_build_addr(hThread, ctx, addr, ctx->SegSs, ctx->Esp);
107 case be_cpu_addr_frame:
108 return be_i386_build_addr(hThread, ctx, addr, ctx->SegSs, ctx->Ebp);
109 }
110 return FALSE;
111 }
112
113 static unsigned be_i386_get_register_info(int regno, enum be_cpu_addr* kind)
114 {
115 switch (regno)
116 {
117 case CV_REG_EIP: *kind = be_cpu_addr_pc; return TRUE;
118 case CV_REG_EBP: *kind = be_cpu_addr_frame; return TRUE;
119 case CV_REG_ESP: *kind = be_cpu_addr_stack; return TRUE;
120 }
121 return FALSE;
122 }
123
124 static void be_i386_single_step(CONTEXT* ctx, unsigned enable)
125 {
126 if (enable) ctx->EFlags |= STEP_FLAG;
127 else ctx->EFlags &= ~STEP_FLAG;
128 }
129
130 static void be_i386_all_print_context(HANDLE hThread, const CONTEXT* ctx)
131 {
132 long double ST[8]; /* These are for floating regs */
133 int cnt;
134
135 /* Break out the FPU state and the floating point registers */
136 dbg_printf("Floating Point Unit status:\n");
137 dbg_printf(" FLCW:%04x ", LOWORD(ctx->FloatSave.ControlWord));
138 dbg_printf(" FLTW:%04x ", LOWORD(ctx->FloatSave.TagWord));
139 dbg_printf(" FLEO:%08x ", (unsigned int) ctx->FloatSave.ErrorOffset);
140 dbg_printf(" FLSW:%04x", LOWORD(ctx->FloatSave.StatusWord));
141
142 /* Isolate the condition code bits - note they are not contiguous */
143 dbg_printf("(CC:%d%d%d%d", (ctx->FloatSave.StatusWord & 0x00004000) >> 14,
144 (ctx->FloatSave.StatusWord & 0x00000400) >> 10,
145 (ctx->FloatSave.StatusWord & 0x00000200) >> 9,
146 (ctx->FloatSave.StatusWord & 0x00000100) >> 8);
147
148 /* Now pull out hte 3 bit of the TOP stack pointer */
149 dbg_printf(" TOP:%01x", (unsigned int) (ctx->FloatSave.StatusWord & 0x00003800) >> 11);
150
151 /* Lets analyse the error bits and indicate the status
152 * the Invalid Op flag has sub status which is tested as follows */
153 if (ctx->FloatSave.StatusWord & 0x00000001) { /* Invalid Fl OP */
154 if (ctx->FloatSave.StatusWord & 0x00000040) { /* Stack Fault */
155 if (ctx->FloatSave.StatusWord & 0x00000200) /* C1 says Overflow */
156 dbg_printf(" #IE(Stack Overflow)");
157 else
158 dbg_printf(" #IE(Stack Underflow)"); /* Underflow */
159 }
160 else dbg_printf(" #IE(Arthimetic error)"); /* Invalid Fl OP */
161 }
162
163 if (ctx->FloatSave.StatusWord & 0x00000002) dbg_printf(" #DE"); /* Denormalised OP */
164 if (ctx->FloatSave.StatusWord & 0x00000004) dbg_printf(" #ZE"); /* Zero Divide */
165 if (ctx->FloatSave.StatusWord & 0x00000008) dbg_printf(" #OE"); /* Overflow */
166 if (ctx->FloatSave.StatusWord & 0x00000010) dbg_printf(" #UE"); /* Underflow */
167 if (ctx->FloatSave.StatusWord & 0x00000020) dbg_printf(" #PE"); /* Precision error */
168 if (ctx->FloatSave.StatusWord & 0x00000040)
169 if (!(ctx->FloatSave.StatusWord & 0x00000001))
170 dbg_printf(" #SE"); /* Stack Fault (don't think this can occur) */
171 if (ctx->FloatSave.StatusWord & 0x00000080) dbg_printf(" #ES"); /* Error Summary */
172 if (ctx->FloatSave.StatusWord & 0x00008000) dbg_printf(" #FB"); /* FPU Busy */
173 dbg_printf(")\n");
174
175 /* Here are the rest of the registers */
176 dbg_printf(" FLES:%08x ", (unsigned int) ctx->FloatSave.ErrorSelector);
177 dbg_printf(" FLDO:%08x ", (unsigned int) ctx->FloatSave.DataOffset);
178 dbg_printf(" FLDS:%08x ", (unsigned int) ctx->FloatSave.DataSelector);
179 dbg_printf(" FLCNS:%08x \n", (unsigned int) ctx->FloatSave.Cr0NpxState);
180
181 /* Now for the floating point registers */
182 dbg_printf("Floating Point Registers:\n");
183 for (cnt = 0; cnt < 4; cnt++)
184 {
185 memcpy(&ST[cnt], &ctx->FloatSave.RegisterArea[cnt * 10], 10);
186 dbg_printf(" ST%d:%Lf ", cnt, ST[cnt]);
187 }
188 dbg_printf("\n");
189 for (cnt = 4; cnt < 8; cnt++)
190 {
191 memcpy(&ST[cnt], &ctx->FloatSave.RegisterArea[cnt * 10], 10);
192 dbg_printf(" ST%d:%Lf ", cnt, ST[cnt]);
193 }
194 dbg_printf("\n");
195 }
196
197 static void be_i386_print_context(HANDLE hThread, const CONTEXT* ctx, int all_regs)
198 {
199 char buf[33];
200 char* pt;
201
202 dbg_printf("Register dump:\n");
203
204 /* First get the segment registers out of the way */
205 dbg_printf(" CS:%04x SS:%04x DS:%04x ES:%04x FS:%04x GS:%04x",
206 (WORD)ctx->SegCs, (WORD)ctx->SegSs,
207 (WORD)ctx->SegDs, (WORD)ctx->SegEs,
208 (WORD)ctx->SegFs, (WORD)ctx->SegGs);
209
210 strcpy(buf, " - 00 - - - ");
211 pt = buf + strlen(buf) - 1;
212 if (ctx->EFlags & 0x00000001) *pt-- = 'C'; /* Carry Flag */
213 if (ctx->EFlags & 0x00000002) *pt-- = '1';
214 if (ctx->EFlags & 0x00000004) *pt-- = 'P'; /* Parity Flag */
215 if (ctx->EFlags & 0x00000008) *pt-- = '-';
216 if (ctx->EFlags & 0x00000010) *pt-- = 'A'; /* Auxiliary Carry Flag */
217 if (ctx->EFlags & 0x00000020) *pt-- = '-';
218 if (ctx->EFlags & 0x00000040) *pt-- = 'Z'; /* Zero Flag */
219 if (ctx->EFlags & 0x00000080) *pt-- = 'S'; /* Sign Flag */
220 if (ctx->EFlags & 0x00000100) *pt-- = 'T'; /* Trap/Trace Flag */
221 if (ctx->EFlags & 0x00000200) *pt-- = 'I'; /* Interrupt Enable Flag */
222 if (ctx->EFlags & 0x00000400) *pt-- = 'D'; /* Direction Indicator */
223 if (ctx->EFlags & 0x00000800) *pt-- = 'O'; /* Overflow flags */
224 if (ctx->EFlags & 0x00001000) *pt-- = '1'; /* I/O Privilege Level */
225 if (ctx->EFlags & 0x00002000) *pt-- = '1'; /* I/O Privilege Level */
226 if (ctx->EFlags & 0x00004000) *pt-- = 'N'; /* Nested Task Flag */
227 if (ctx->EFlags & 0x00008000) *pt-- = '-';
228 if (ctx->EFlags & 0x00010000) *pt-- = 'R'; /* Resume Flag */
229 if (ctx->EFlags & 0x00020000) *pt-- = 'V'; /* Vritual Mode Flag */
230 if (ctx->EFlags & 0x00040000) *pt-- = 'a'; /* Alignment Check Flag */
231
232 switch (get_selector_type(hThread, ctx, ctx->SegCs))
233 {
234 case AddrMode1616:
235 case AddrModeReal:
236 dbg_printf("\n IP:%04x SP:%04x BP:%04x FLAGS:%04x(%s)\n",
237 LOWORD(ctx->Eip), LOWORD(ctx->Esp),
238 LOWORD(ctx->Ebp), LOWORD(ctx->EFlags), buf);
239 dbg_printf(" AX:%04x BX:%04x CX:%04x DX:%04x SI:%04x DI:%04x\n",
240 LOWORD(ctx->Eax), LOWORD(ctx->Ebx),
241 LOWORD(ctx->Ecx), LOWORD(ctx->Edx),
242 LOWORD(ctx->Esi), LOWORD(ctx->Edi));
243 break;
244 case AddrModeFlat:
245 case AddrMode1632:
246 dbg_printf("\n EIP:%08x ESP:%08x EBP:%08x EFLAGS:%08x(%s)\n",
247 ctx->Eip, ctx->Esp, ctx->Ebp, ctx->EFlags, buf);
248 dbg_printf(" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n",
249 ctx->Eax, ctx->Ebx, ctx->Ecx, ctx->Edx);
250 dbg_printf(" ESI:%08x EDI:%08x\n",
251 ctx->Esi, ctx->Edi);
252 break;
253 }
254
255 if (all_regs) be_i386_all_print_context(hThread, ctx); /* print floating regs */
256
257 }
258
259 static void be_i386_print_segment_info(HANDLE hThread, const CONTEXT* ctx)
260 {
261 if (get_selector_type(hThread, ctx, ctx->SegCs) == AddrMode1616)
262 {
263 info_win32_segments(ctx->SegDs >> 3, 1);
264 if (ctx->SegEs != ctx->SegDs) info_win32_segments(ctx->SegEs >> 3, 1);
265 }
266 info_win32_segments(ctx->SegFs >> 3, 1);
267 }
268
269 static struct dbg_internal_var be_i386_ctx[] =
270 {
271 {CV_REG_AL, "AL", (DWORD*)FIELD_OFFSET(CONTEXT, Eax), dbg_itype_unsigned_char_int},
272 {CV_REG_CL, "CL", (DWORD*)FIELD_OFFSET(CONTEXT, Ecx), dbg_itype_unsigned_char_int},
273 {CV_REG_DL, "DL", (DWORD*)FIELD_OFFSET(CONTEXT, Edx), dbg_itype_unsigned_char_int},
274 {CV_REG_BL, "BL", (DWORD*)FIELD_OFFSET(CONTEXT, Ebx), dbg_itype_unsigned_char_int},
275 {CV_REG_AH, "AH", (DWORD*)(FIELD_OFFSET(CONTEXT, Eax)+1), dbg_itype_unsigned_char_int},
276 {CV_REG_CH, "CH", (DWORD*)(FIELD_OFFSET(CONTEXT, Ecx)+1), dbg_itype_unsigned_char_int},
277 {CV_REG_DH, "DH", (DWORD*)(FIELD_OFFSET(CONTEXT, Edx)+1), dbg_itype_unsigned_char_int},
278 {CV_REG_BH, "BH", (DWORD*)(FIELD_OFFSET(CONTEXT, Ebx)+1), dbg_itype_unsigned_char_int},
279 {CV_REG_AX, "AX", (DWORD*)FIELD_OFFSET(CONTEXT, Eax), dbg_itype_unsigned_short_int},
280 {CV_REG_CX, "CX", (DWORD*)FIELD_OFFSET(CONTEXT, Ecx), dbg_itype_unsigned_short_int},
281 {CV_REG_DX, "DX", (DWORD*)FIELD_OFFSET(CONTEXT, Edx), dbg_itype_unsigned_short_int},
282 {CV_REG_BX, "BX", (DWORD*)FIELD_OFFSET(CONTEXT, Ebx), dbg_itype_unsigned_short_int},
283 {CV_REG_SP, "SP", (DWORD*)FIELD_OFFSET(CONTEXT, Esp), dbg_itype_unsigned_short_int},
284 {CV_REG_BP, "BP", (DWORD*)FIELD_OFFSET(CONTEXT, Ebp), dbg_itype_unsigned_short_int},
285 {CV_REG_SI, "SI", (DWORD*)FIELD_OFFSET(CONTEXT, Esi), dbg_itype_unsigned_short_int},
286 {CV_REG_DI, "DI", (DWORD*)FIELD_OFFSET(CONTEXT, Edi), dbg_itype_unsigned_short_int},
287 {CV_REG_EAX, "EAX", (DWORD*)FIELD_OFFSET(CONTEXT, Eax), dbg_itype_unsigned_int},
288 {CV_REG_ECX, "ECX", (DWORD*)FIELD_OFFSET(CONTEXT, Ecx), dbg_itype_unsigned_int},
289 {CV_REG_EDX, "EDX", (DWORD*)FIELD_OFFSET(CONTEXT, Edx), dbg_itype_unsigned_int},
290 {CV_REG_EBX, "EBX", (DWORD*)FIELD_OFFSET(CONTEXT, Ebx), dbg_itype_unsigned_int},
291 {CV_REG_ESP, "ESP", (DWORD*)FIELD_OFFSET(CONTEXT, Esp), dbg_itype_unsigned_int},
292 {CV_REG_EBP, "EBP", (DWORD*)FIELD_OFFSET(CONTEXT, Ebp), dbg_itype_unsigned_int},
293 {CV_REG_ESI, "ESI", (DWORD*)FIELD_OFFSET(CONTEXT, Esi), dbg_itype_unsigned_int},
294 {CV_REG_EDI, "EDI", (DWORD*)FIELD_OFFSET(CONTEXT, Edi), dbg_itype_unsigned_int},
295 {CV_REG_ES, "ES", (DWORD*)FIELD_OFFSET(CONTEXT, SegEs), dbg_itype_unsigned_short_int},
296 {CV_REG_CS, "CS", (DWORD*)FIELD_OFFSET(CONTEXT, SegCs), dbg_itype_unsigned_short_int},
297 {CV_REG_SS, "SS", (DWORD*)FIELD_OFFSET(CONTEXT, SegSs), dbg_itype_unsigned_short_int},
298 {CV_REG_DS, "DS", (DWORD*)FIELD_OFFSET(CONTEXT, SegDs), dbg_itype_unsigned_short_int},
299 {CV_REG_FS, "FS", (DWORD*)FIELD_OFFSET(CONTEXT, SegFs), dbg_itype_unsigned_short_int},
300 {CV_REG_GS, "GS", (DWORD*)FIELD_OFFSET(CONTEXT, SegGs), dbg_itype_unsigned_short_int},
301 {CV_REG_IP, "IP", (DWORD*)FIELD_OFFSET(CONTEXT, Eip), dbg_itype_unsigned_short_int},
302 {CV_REG_FLAGS, "FLAGS", (DWORD*)FIELD_OFFSET(CONTEXT, EFlags), dbg_itype_unsigned_short_int},
303 {CV_REG_EIP, "EIP", (DWORD*)FIELD_OFFSET(CONTEXT, Eip), dbg_itype_unsigned_int},
304 {CV_REG_EFLAGS, "EFLAGS", (DWORD*)FIELD_OFFSET(CONTEXT, EFlags), dbg_itype_unsigned_int},
305 {0, NULL, 0, dbg_itype_none}
306 };
307
308 static const struct dbg_internal_var* be_i386_init_registers(CONTEXT* ctx)
309 {
310 struct dbg_internal_var* div;
311
312 for (div = be_i386_ctx; div->name; div++)
313 div->pval = (DWORD*)((char*)ctx + (DWORD)div->pval);
314 return be_i386_ctx;
315 }
316
317 static unsigned be_i386_is_step_over_insn(const void* insn)
318 {
319 BYTE ch;
320
321 for (;;)
322 {
323 if (!dbg_read_memory(insn, &ch, sizeof(ch))) return FALSE;
324
325 switch (ch)
326 {
327 /* Skip all prefixes */
328 case 0x2e: /* cs: */
329 case 0x36: /* ss: */
330 case 0x3e: /* ds: */
331 case 0x26: /* es: */
332 case 0x64: /* fs: */
333 case 0x65: /* gs: */
334 case 0x66: /* opcode size prefix */
335 case 0x67: /* addr size prefix */
336 case 0xf0: /* lock */
337 case 0xf2: /* repne */
338 case 0xf3: /* repe */
339 insn = (const char*)insn + 1;
340 continue;
341
342 /* Handle call instructions */
343 case 0xcd: /* int <intno> */
344 case 0xe8: /* call <offset> */
345 case 0x9a: /* lcall <seg>:<off> */
346 return TRUE;
347
348 case 0xff: /* call <regmodrm> */
349 if (!dbg_read_memory((const char*)insn + 1, &ch, sizeof(ch)))
350 return FALSE;
351 return (((ch & 0x38) == 0x10) || ((ch & 0x38) == 0x18));
352
353 /* Handle string instructions */
354 case 0x6c: /* insb */
355 case 0x6d: /* insw */
356 case 0x6e: /* outsb */
357 case 0x6f: /* outsw */
358 case 0xa4: /* movsb */
359 case 0xa5: /* movsw */
360 case 0xa6: /* cmpsb */
361 case 0xa7: /* cmpsw */
362 case 0xaa: /* stosb */
363 case 0xab: /* stosw */
364 case 0xac: /* lodsb */
365 case 0xad: /* lodsw */
366 case 0xae: /* scasb */
367 case 0xaf: /* scasw */
368 return TRUE;
369
370 default:
371 return FALSE;
372 }
373 }
374 }
375
376 static unsigned be_i386_is_function_return(const void* insn)
377 {
378 BYTE ch;
379
380 if (!dbg_read_memory(insn, &ch, sizeof(ch))) return FALSE;
381 return (ch == 0xC2) || (ch == 0xC3);
382 }
383
384 static unsigned be_i386_is_break_insn(const void* insn)
385 {
386 BYTE c;
387
388 if (!dbg_read_memory(insn, &c, sizeof(c))) return FALSE;
389 return c == 0xCC;
390 }
391
392 static unsigned get_size(ADDRESS_MODE am)
393 {
394 if (am == AddrModeReal || am == AddrMode1616) return 16;
395 return 32;
396 }
397
398 static BOOL fetch_value(const char* addr, unsigned sz, int* value)
399 {
400 char value8;
401 short value16;
402
403 switch (sz)
404 {
405 case 8:
406 if (!dbg_read_memory(addr, &value8, sizeof(value8)))
407 return FALSE;
408 *value = value8;
409 break;
410 case 16:
411 if (!dbg_read_memory(addr, &value16, sizeof(value16)))
412 return FALSE;
413 *value = value16;
414 case 32:
415 if (!dbg_read_memory(addr, value, sizeof(*value)))
416 return FALSE;
417 break;
418 default: return FALSE;
419 }
420 return TRUE;
421 }
422
423 static unsigned be_i386_is_func_call(const void* insn, ADDRESS64* callee)
424 {
425 BYTE ch;
426 int delta;
427 short segment;
428 unsigned dst = 0;
429 unsigned operand_size;
430 ADDRESS_MODE cs_addr_mode;
431
432 cs_addr_mode = get_selector_type(dbg_curr_thread->handle, &dbg_context,
433 dbg_context.SegCs);
434 operand_size = get_size(cs_addr_mode);
435
436 /* get operand_size (also getting rid of the various prefixes */
437 do
438 {
439 if (!dbg_read_memory(insn, &ch, sizeof(ch))) return FALSE;
440 if (ch == 0x66)
441 {
442 operand_size = 48 - operand_size; /* 16 => 32, 32 => 16 */
443 insn = (const char*)insn + 1;
444 }
445 } while (ch == 0x66 || ch == 0x67);
446
447 switch (ch)
448 {
449 case 0xe8: /* relative near call */
450 callee->Mode = cs_addr_mode;
451 if (!fetch_value((const char*)insn + 1, operand_size, &delta))
452 return FALSE;
453 callee->Segment = dbg_context.SegCs;
454 callee->Offset = (DWORD)insn + 1 + (operand_size / 8) + delta;
455 return TRUE;
456
457 case 0x9a: /* absolute far call */
458 if (!dbg_read_memory((const char*)insn + 1 + operand_size / 8,
459 &segment, sizeof(segment)))
460 return FALSE;
461 callee->Mode = get_selector_type(dbg_curr_thread->handle, &dbg_context,
462 segment);
463 if (!fetch_value((const char*)insn + 1, operand_size, &delta))
464 return FALSE;
465 callee->Segment = segment;
466 callee->Offset = delta;
467 return TRUE;
468
469 case 0xff:
470 if (!dbg_read_memory((const char*)insn + 1, &ch, sizeof(ch)))
471 return FALSE;
472 /* keep only the CALL and LCALL insn:s */
473 switch ((ch >> 3) & 0x07)
474 {
475 case 0x02:
476 segment = dbg_context.SegCs;
477 break;
478 case 0x03:
479 if (!dbg_read_memory((const char*)insn + 1 + operand_size / 8,
480 &segment, sizeof(segment)))
481 return FALSE;
482 break;
483 default: return FALSE;
484 }
485 /* FIXME: we only support the 32 bit far calls for now */
486 if (operand_size != 32)
487 {
488 WINE_FIXME("Unsupported yet call insn (0xFF 0x%02x) with 16 bit operand-size at %p\n", ch, insn);
489 return FALSE;
490 }
491 switch (ch & 0xC7) /* keep Mod R/M only (skip reg) */
492 {
493 case 0x04:
494 case 0x44:
495 case 0x84:
496 WINE_FIXME("Unsupported yet call insn (0xFF 0x%02x) (SIB bytes) at %p\n", ch, insn);
497 return FALSE;
498 case 0x05: /* addr32 */
499 if ((ch & 0x38) == 0x10 || /* call */
500 (ch & 0x38) == 0x18) /* lcall */
501 {
502 void *addr;
503 if (!dbg_read_memory((const char *)insn + 2, &addr, sizeof(addr)))
504 return FALSE;
505 if ((ch & 0x38) == 0x18) /* lcall */
506 {
507 if (!dbg_read_memory((const char*)addr + operand_size, &segment, sizeof(segment)))
508 return FALSE;
509 }
510 else segment = dbg_context.SegCs;
511 if (!dbg_read_memory((const char*)addr, &dst, sizeof(dst)))
512 return FALSE;
513 callee->Mode = get_selector_type(dbg_curr_thread->handle, &dbg_context, segment);
514 callee->Segment = segment;
515 callee->Offset = dst;
516 return TRUE;
517 }
518 return FALSE;
519 default:
520 switch (ch & 0x07)
521 {
522 case 0x00: dst = dbg_context.Eax; break;
523 case 0x01: dst = dbg_context.Ecx; break;
524 case 0x02: dst = dbg_context.Edx; break;
525 case 0x03: dst = dbg_context.Ebx; break;
526 case 0x04: dst = dbg_context.Esp; break;
527 case 0x05: dst = dbg_context.Ebp; break;
528 case 0x06: dst = dbg_context.Esi; break;
529 case 0x07: dst = dbg_context.Edi; break;
530 }
531 if ((ch >> 6) != 0x03) /* indirect address */
532 {
533 if (ch >> 6) /* we got a displacement */
534 {
535 if (!fetch_value((const char*)insn + 2, (ch >> 6) == 0x01 ? 8 : 32, &delta))
536 return FALSE;
537 dst += delta;
538 }
539 if (((ch >> 3) & 0x07) == 0x03) /* LCALL */
540 {
541 if (!dbg_read_memory((const char*)dst + operand_size, &segment, sizeof(segment)))
542 return FALSE;
543 }
544 else segment = dbg_context.SegCs;
545 if (!dbg_read_memory((const char*)dst, &delta, sizeof(delta)))
546 return FALSE;
547 callee->Mode = get_selector_type(dbg_curr_thread->handle, &dbg_context,
548 segment);
549 callee->Segment = segment;
550 callee->Offset = delta;
551 }
552 else
553 {
554 callee->Mode = cs_addr_mode;
555 callee->Segment = dbg_context.SegCs;
556 callee->Offset = dst;
557 }
558 }
559 return TRUE;
560
561 case 0xCD:
562 WINE_FIXME("Unsupported yet call insn (0x%02x) at %p\n", ch, insn);
563 /* fall through */
564 default:
565 return FALSE;
566 }
567 }
568
569 #define DR7_CONTROL_SHIFT 16
570 #define DR7_CONTROL_SIZE 4
571
572 #define DR7_RW_EXECUTE (0x0)
573 #define DR7_RW_WRITE (0x1)
574 #define DR7_RW_READ (0x3)
575
576 #define DR7_LEN_1 (0x0)
577 #define DR7_LEN_2 (0x4)
578 #define DR7_LEN_4 (0xC)
579
580 #define DR7_LOCAL_ENABLE_SHIFT 0
581 #define DR7_GLOBAL_ENABLE_SHIFT 1
582 #define DR7_ENABLE_SIZE 2
583
584 #define DR7_LOCAL_ENABLE_MASK (0x55)
585 #define DR7_GLOBAL_ENABLE_MASK (0xAA)
586
587 #define DR7_CONTROL_RESERVED (0xFC00)
588 #define DR7_LOCAL_SLOWDOWN (0x100)
589 #define DR7_GLOBAL_SLOWDOWN (0x200)
590
591 #define DR7_ENABLE_MASK(dr) (1<<(DR7_LOCAL_ENABLE_SHIFT+DR7_ENABLE_SIZE*(dr)))
592 #define IS_DR7_SET(ctrl,dr) ((ctrl)&DR7_ENABLE_MASK(dr))
593
594 static inline int be_i386_get_unused_DR(CONTEXT* ctx, DWORD** r)
595 {
596 if (!IS_DR7_SET(ctx->Dr7, 0))
597 {
598 *r = &ctx->Dr0;
599 return 0;
600 }
601 if (!IS_DR7_SET(ctx->Dr7, 1))
602 {
603 *r = &ctx->Dr1;
604 return 1;
605 }
606 if (!IS_DR7_SET(ctx->Dr7, 2))
607 {
608 *r = &ctx->Dr2;
609 return 2;
610 }
611 if (!IS_DR7_SET(ctx->Dr7, 3))
612 {
613 *r = &ctx->Dr3;
614 return 3;
615 }
616 dbg_printf("All hardware registers have been used\n");
617
618 return -1;
619 }
620
621 static unsigned be_i386_insert_Xpoint(HANDLE hProcess, const struct be_process_io* pio,
622 CONTEXT* ctx, enum be_xpoint_type type,
623 void* addr, unsigned long* val, unsigned size)
624 {
625 unsigned char ch;
626 SIZE_T sz;
627 DWORD *pr;
628 int reg;
629 unsigned long bits;
630
631 switch (type)
632 {
633 case be_xpoint_break:
634 if (size != 0) return 0;
635 if (!pio->read(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
636 *val = ch;
637 ch = 0xcc;
638 if (!pio->write(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
639 break;
640 case be_xpoint_watch_exec:
641 bits = DR7_RW_EXECUTE;
642 goto hw_bp;
643 case be_xpoint_watch_read:
644 bits = DR7_RW_READ;
645 goto hw_bp;
646 case be_xpoint_watch_write:
647 bits = DR7_RW_WRITE;
648 hw_bp:
649 if ((reg = be_i386_get_unused_DR(ctx, &pr)) == -1) return 0;
650 *pr = (DWORD)addr;
651 if (type != be_xpoint_watch_exec) switch (size)
652 {
653 case 4: bits |= DR7_LEN_4; break;
654 case 2: bits |= DR7_LEN_2; break;
655 case 1: bits |= DR7_LEN_1; break;
656 default: return 0;
657 }
658 *val = reg;
659 /* clear old values */
660 ctx->Dr7 &= ~(0x0F << (DR7_CONTROL_SHIFT + DR7_CONTROL_SIZE * reg));
661 /* set the correct ones */
662 ctx->Dr7 |= bits << (DR7_CONTROL_SHIFT + DR7_CONTROL_SIZE * reg);
663 ctx->Dr7 |= DR7_ENABLE_MASK(reg) | DR7_LOCAL_SLOWDOWN;
664 break;
665 default:
666 dbg_printf("Unknown bp type %c\n", type);
667 return 0;
668 }
669 return 1;
670 }
671
672 static unsigned be_i386_remove_Xpoint(HANDLE hProcess, const struct be_process_io* pio,
673 CONTEXT* ctx, enum be_xpoint_type type,
674 void* addr, unsigned long val, unsigned size)
675 {
676 SIZE_T sz;
677 unsigned char ch;
678
679 switch (type)
680 {
681 case be_xpoint_break:
682 if (size != 0) return 0;
683 if (!pio->read(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
684 if (ch != (unsigned char)0xCC)
685 WINE_FIXME("Cannot get back %02x instead of 0xCC at %08lx\n",
686 ch, (unsigned long)addr);
687 ch = (unsigned char)val;
688 if (!pio->write(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
689 break;
690 case be_xpoint_watch_exec:
691 case be_xpoint_watch_read:
692 case be_xpoint_watch_write:
693 /* simply disable the entry */
694 ctx->Dr7 &= ~DR7_ENABLE_MASK(val);
695 break;
696 default:
697 dbg_printf("Unknown bp type %c\n", type);
698 return 0;
699 }
700 return 1;
701 }
702
703 static unsigned be_i386_is_watchpoint_set(const CONTEXT* ctx, unsigned idx)
704 {
705 return ctx->Dr6 & (1 << idx);
706 }
707
708 static void be_i386_clear_watchpoint(CONTEXT* ctx, unsigned idx)
709 {
710 ctx->Dr6 &= ~(1 << idx);
711 }
712
713 static int be_i386_adjust_pc_for_break(CONTEXT* ctx, BOOL way)
714 {
715 if (way)
716 {
717 ctx->Eip--;
718 return -1;
719 }
720 ctx->Eip++;
721 return 1;
722 }
723
724 static int be_i386_fetch_integer(const struct dbg_lvalue* lvalue, unsigned size,
725 unsigned ext_sign, LONGLONG* ret)
726 {
727 if (size != 1 && size != 2 && size != 4 && size != 8) return FALSE;
728
729 memset(ret, 0, sizeof(*ret)); /* clear unread bytes */
730 /* FIXME: this assumes that debuggee and debugger use the same
731 * integral representation
732 */
733 if (!memory_read_value(lvalue, size, ret)) return FALSE;
734
735 /* propagate sign information */
736 if (ext_sign && size < 8 && (*ret >> (size * 8 - 1)) != 0)
737 {
738 ULONGLONG neg = -1;
739 *ret |= neg << (size * 8);
740 }
741 return TRUE;
742 }
743
744 static int be_i386_fetch_float(const struct dbg_lvalue* lvalue, unsigned size,
745 long double* ret)
746 {
747 char tmp[12];
748
749 /* FIXME: this assumes that debuggee and debugger use the same
750 * representation for reals
751 */
752 if (!memory_read_value(lvalue, size, tmp)) return FALSE;
753
754 /* float & double types have to be promoted to a long double */
755 switch (size)
756 {
757 case sizeof(float): *ret = *(float*)tmp; break;
758 case sizeof(double): *ret = *(double*)tmp; break;
759 case sizeof(long double): *ret = *(long double*)tmp; break;
760 default: return FALSE;
761 }
762 return TRUE;
763 }
764
765 struct backend_cpu be_i386 =
766 {
767 be_i386_linearize,
768 be_i386_build_addr,
769 be_i386_get_addr,
770 be_i386_get_register_info,
771 be_i386_single_step,
772 be_i386_print_context,
773 be_i386_print_segment_info,
774 be_i386_init_registers,
775 be_i386_is_step_over_insn,
776 be_i386_is_function_return,
777 be_i386_is_break_insn,
778 be_i386_is_func_call,
779 be_i386_disasm_one_insn,
780 be_i386_insert_Xpoint,
781 be_i386_remove_Xpoint,
782 be_i386_is_watchpoint_set,
783 be_i386_clear_watchpoint,
784 be_i386_adjust_pc_for_break,
785 be_i386_fetch_integer,
786 be_i386_fetch_float,
787 };
788 #endif
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