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Release 0.9.39.
[wine/gsoc-2012-control.git] / programs / winedbg / be_i386.c
blob7629137a78429fa2f38ba6d18bc325e6df0a6139
1 /*
2 * Debugger i386 specific functions
3 *
4 * Copyright 2004 Eric Pouech
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
19 */
20
21 #include "debugger.h"
22 #include "wine/debug.h"
23
24 WINE_DEFAULT_DEBUG_CHANNEL(winedbg);
25
26 #ifdef __i386__
27
28 /* debugger/db_disasm.c */
29 extern void be_i386_disasm_one_insn(ADDRESS64* addr, int display);
30
31 #define STEP_FLAG 0x00000100 /* single step flag */
32 #define V86_FLAG 0x00020000
33
34 #define IS_VM86_MODE(ctx) (ctx->EFlags & V86_FLAG)
35
36 static ADDRESS_MODE get_selector_type(HANDLE hThread, const CONTEXT* ctx, WORD sel)
37 {
38 LDT_ENTRY le;
39
40 if (IS_VM86_MODE(ctx)) return AddrModeReal;
41 /* null or system selector */
42 if (!(sel & 4) || ((sel >> 3) < 17)) return AddrModeFlat;
43 if (GetThreadSelectorEntry(hThread, sel, &le))
44 return le.HighWord.Bits.Default_Big ? AddrMode1632 : AddrMode1616;
45 /* selector doesn't exist */
46 return -1;
47 }
48
49 static void* be_i386_linearize(HANDLE hThread, const ADDRESS64* addr)
50 {
51 LDT_ENTRY le;
52
53 switch (addr->Mode)
54 {
55 case AddrModeReal:
56 return (void*)((DWORD)(LOWORD(addr->Segment) << 4) + (DWORD)addr->Offset);
57 case AddrMode1632:
58 if (!(addr->Segment & 4) || ((addr->Segment >> 3) < 17))
59 return (void*)(DWORD)addr->Offset;
60 /* fall through */
61 case AddrMode1616:
62 if (!GetThreadSelectorEntry(hThread, addr->Segment, &le)) return NULL;
63 return (void*)((le.HighWord.Bits.BaseHi << 24) +
64 (le.HighWord.Bits.BaseMid << 16) + le.BaseLow +
65 (DWORD)addr->Offset);
66 break;
67 case AddrModeFlat:
68 return (void*)(DWORD)addr->Offset;
69 }
70 return NULL;
71 }
72
73 static unsigned be_i386_build_addr(HANDLE hThread, const CONTEXT* ctx, ADDRESS64* addr,
74 unsigned seg, unsigned long offset)
75 {
76 addr->Mode = AddrModeFlat;
77 addr->Segment = seg;
78 addr->Offset = offset;
79 if (seg)
80 {
81 addr->Mode = get_selector_type(hThread, ctx, seg);
82 switch (addr->Mode)
83 {
84 case AddrModeReal:
85 case AddrMode1616:
86 addr->Offset &= 0xffff;
87 break;
88 case AddrModeFlat:
89 case AddrMode1632:
90 break;
91 default:
92 addr->Mode = -1;
93 return FALSE;
94 }
95 }
96 return TRUE;
97 }
98
99 static unsigned be_i386_get_addr(HANDLE hThread, const CONTEXT* ctx,
100 enum be_cpu_addr bca, ADDRESS64* addr)
101 {
102 switch (bca)
103 {
104 case be_cpu_addr_pc:
105 return be_i386_build_addr(hThread, ctx, addr, ctx->SegCs, ctx->Eip);
106 case be_cpu_addr_stack:
107 return be_i386_build_addr(hThread, ctx, addr, ctx->SegSs, ctx->Esp);
108 case be_cpu_addr_frame:
109 return be_i386_build_addr(hThread, ctx, addr, ctx->SegSs, ctx->Ebp);
110 }
111 return FALSE;
112 }
113
114 static unsigned be_i386_get_register_info(int regno, enum be_cpu_addr* kind)
115 {
116 switch (regno)
117 {
118 case CV_REG_EIP: *kind = be_cpu_addr_pc; return TRUE;
119 case CV_REG_EBP: *kind = be_cpu_addr_frame; return TRUE;
120 case CV_REG_ESP: *kind = be_cpu_addr_stack; return TRUE;
121 }
122 return FALSE;
123 }
124
125 static void be_i386_single_step(CONTEXT* ctx, unsigned enable)
126 {
127 if (enable) ctx->EFlags |= STEP_FLAG;
128 else ctx->EFlags &= ~STEP_FLAG;
129 }
130
131 static void be_i386_all_print_context(HANDLE hThread, const CONTEXT* ctx)
132 {
133 long double ST[8]; /* These are for floating regs */
134 int cnt;
135
136 /* Break out the FPU state and the floating point registers */
137 dbg_printf("Floating Point Unit status:\n");
138 dbg_printf(" FLCW:%04x ", LOWORD(ctx->FloatSave.ControlWord));
139 dbg_printf(" FLTW:%04x ", LOWORD(ctx->FloatSave.TagWord));
140 dbg_printf(" FLEO:%08x ", (unsigned int) ctx->FloatSave.ErrorOffset);
141 dbg_printf(" FLSW:%04x", LOWORD(ctx->FloatSave.StatusWord));
142
143 /* Isolate the condition code bits - note they are not contiguous */
144 dbg_printf("(CC:%d%d%d%d", (ctx->FloatSave.StatusWord & 0x00004000) >> 14,
145 (ctx->FloatSave.StatusWord & 0x00000400) >> 10,
146 (ctx->FloatSave.StatusWord & 0x00000200) >> 9,
147 (ctx->FloatSave.StatusWord & 0x00000100) >> 8);
148
149 /* Now pull out hte 3 bit of the TOP stack pointer */
150 dbg_printf(" TOP:%01x", (unsigned int) (ctx->FloatSave.StatusWord & 0x00003800) >> 11);
151
152 /* Lets analyse the error bits and indicate the status
153 * the Invalid Op flag has sub status which is tested as follows */
154 if (ctx->FloatSave.StatusWord & 0x00000001) { /* Invalid Fl OP */
155 if (ctx->FloatSave.StatusWord & 0x00000040) { /* Stack Fault */
156 if (ctx->FloatSave.StatusWord & 0x00000200) /* C1 says Overflow */
157 dbg_printf(" #IE(Stack Overflow)");
158 else
159 dbg_printf(" #IE(Stack Underflow)"); /* Underflow */
160 }
161 else dbg_printf(" #IE(Arthimetic error)"); /* Invalid Fl OP */
162 }
163
164 if (ctx->FloatSave.StatusWord & 0x00000002) dbg_printf(" #DE"); /* Denormalised OP */
165 if (ctx->FloatSave.StatusWord & 0x00000004) dbg_printf(" #ZE"); /* Zero Divide */
166 if (ctx->FloatSave.StatusWord & 0x00000008) dbg_printf(" #OE"); /* Overflow */
167 if (ctx->FloatSave.StatusWord & 0x00000010) dbg_printf(" #UE"); /* Underflow */
168 if (ctx->FloatSave.StatusWord & 0x00000020) dbg_printf(" #PE"); /* Precision error */
169 if (ctx->FloatSave.StatusWord & 0x00000040)
170 if (!(ctx->FloatSave.StatusWord & 0x00000001))
171 dbg_printf(" #SE"); /* Stack Fault (don't think this can occur) */
172 if (ctx->FloatSave.StatusWord & 0x00000080) dbg_printf(" #ES"); /* Error Summary */
173 if (ctx->FloatSave.StatusWord & 0x00008000) dbg_printf(" #FB"); /* FPU Busy */
174 dbg_printf(")\n");
175
176 /* Here are the rest of the registers */
177 dbg_printf(" FLES:%08x ", (unsigned int) ctx->FloatSave.ErrorSelector);
178 dbg_printf(" FLDO:%08x ", (unsigned int) ctx->FloatSave.DataOffset);
179 dbg_printf(" FLDS:%08x ", (unsigned int) ctx->FloatSave.DataSelector);
180 dbg_printf(" FLCNS:%08x \n", (unsigned int) ctx->FloatSave.Cr0NpxState);
181
182 /* Now for the floating point registers */
183 dbg_printf("Floating Point Registers:\n");
184 for (cnt = 0; cnt < 4; cnt++)
185 {
186 memcpy(&ST[cnt], &ctx->FloatSave.RegisterArea[cnt * 10], 10);
187 dbg_printf(" ST%d:%Lf ", cnt, ST[cnt]);
188 }
189 dbg_printf("\n");
190 for (cnt = 4; cnt < 8; cnt++)
191 {
192 memcpy(&ST[cnt], &ctx->FloatSave.RegisterArea[cnt * 10], 10);
193 dbg_printf(" ST%d:%Lf ", cnt, ST[cnt]);
194 }
195 dbg_printf("\n");
196 }
197
198 static void be_i386_print_context(HANDLE hThread, const CONTEXT* ctx, int all_regs)
199 {
200 char buf[33];
201 char* pt;
202
203 dbg_printf("Register dump:\n");
204
205 /* First get the segment registers out of the way */
206 dbg_printf(" CS:%04x SS:%04x DS:%04x ES:%04x FS:%04x GS:%04x",
207 (WORD)ctx->SegCs, (WORD)ctx->SegSs,
208 (WORD)ctx->SegDs, (WORD)ctx->SegEs,
209 (WORD)ctx->SegFs, (WORD)ctx->SegGs);
210
211 strcpy(buf, " - 00 - - - ");
212 pt = buf + strlen(buf) - 1;
213 if (ctx->EFlags & 0x00000001) *pt-- = 'C'; /* Carry Flag */
214 if (ctx->EFlags & 0x00000002) *pt-- = '1';
215 if (ctx->EFlags & 0x00000004) *pt-- = 'P'; /* Parity Flag */
216 if (ctx->EFlags & 0x00000008) *pt-- = '-';
217 if (ctx->EFlags & 0x00000010) *pt-- = 'A'; /* Auxiliary Carry Flag */
218 if (ctx->EFlags & 0x00000020) *pt-- = '-';
219 if (ctx->EFlags & 0x00000040) *pt-- = 'Z'; /* Zero Flag */
220 if (ctx->EFlags & 0x00000080) *pt-- = 'S'; /* Sign Flag */
221 if (ctx->EFlags & 0x00000100) *pt-- = 'T'; /* Trap/Trace Flag */
222 if (ctx->EFlags & 0x00000200) *pt-- = 'I'; /* Interupt Enable Flag */
223 if (ctx->EFlags & 0x00000400) *pt-- = 'D'; /* Direction Indicator */
224 if (ctx->EFlags & 0x00000800) *pt-- = 'O'; /* Overflow flags */
225 if (ctx->EFlags & 0x00001000) *pt-- = '1'; /* I/O Privilege Level */
226 if (ctx->EFlags & 0x00002000) *pt-- = '1'; /* I/O Privilege Level */
227 if (ctx->EFlags & 0x00004000) *pt-- = 'N'; /* Nested Task Flag */
228 if (ctx->EFlags & 0x00008000) *pt-- = '-';
229 if (ctx->EFlags & 0x00010000) *pt-- = 'R'; /* Resume Flag */
230 if (ctx->EFlags & 0x00020000) *pt-- = 'V'; /* Vritual Mode Flag */
231 if (ctx->EFlags & 0x00040000) *pt-- = 'a'; /* Alignment Check Flag */
232
233 switch (get_selector_type(hThread, ctx, ctx->SegCs))
234 {
235 case AddrMode1616:
236 case AddrModeReal:
237 dbg_printf("\n IP:%04x SP:%04x BP:%04x FLAGS:%04x(%s)\n",
238 LOWORD(ctx->Eip), LOWORD(ctx->Esp),
239 LOWORD(ctx->Ebp), LOWORD(ctx->EFlags), buf);
240 dbg_printf(" AX:%04x BX:%04x CX:%04x DX:%04x SI:%04x DI:%04x\n",
241 LOWORD(ctx->Eax), LOWORD(ctx->Ebx),
242 LOWORD(ctx->Ecx), LOWORD(ctx->Edx),
243 LOWORD(ctx->Esi), LOWORD(ctx->Edi));
244 break;
245 case AddrModeFlat:
246 case AddrMode1632:
247 dbg_printf("\n EIP:%08x ESP:%08x EBP:%08x EFLAGS:%08x(%s)\n",
248 ctx->Eip, ctx->Esp, ctx->Ebp, ctx->EFlags, buf);
249 dbg_printf(" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n",
250 ctx->Eax, ctx->Ebx, ctx->Ecx, ctx->Edx);
251 dbg_printf(" ESI:%08x EDI:%08x\n",
252 ctx->Esi, ctx->Edi);
253 break;
254 }
255
256 if (all_regs) be_i386_all_print_context(hThread, ctx); /* print floating regs */
257
258 }
259
260 static void be_i386_print_segment_info(HANDLE hThread, const CONTEXT* ctx)
261 {
262 if (get_selector_type(hThread, ctx, ctx->SegCs) == AddrMode1616)
263 {
264 info_win32_segments(ctx->SegDs >> 3, 1);
265 if (ctx->SegEs != ctx->SegDs) info_win32_segments(ctx->SegEs >> 3, 1);
266 }
267 info_win32_segments(ctx->SegFs >> 3, 1);
268 }
269
270 static struct dbg_internal_var be_i386_ctx[] =
271 {
272 {CV_REG_AL, "AL", (DWORD*)FIELD_OFFSET(CONTEXT, Eax), dbg_itype_unsigned_char_int},
273 {CV_REG_CL, "CL", (DWORD*)FIELD_OFFSET(CONTEXT, Ecx), dbg_itype_unsigned_char_int},
274 {CV_REG_DL, "DL", (DWORD*)FIELD_OFFSET(CONTEXT, Edx), dbg_itype_unsigned_char_int},
275 {CV_REG_BL, "BL", (DWORD*)FIELD_OFFSET(CONTEXT, Ebx), dbg_itype_unsigned_char_int},
276 {CV_REG_AH, "AH", (DWORD*)(FIELD_OFFSET(CONTEXT, Eax)+1), dbg_itype_unsigned_char_int},
277 {CV_REG_CH, "CH", (DWORD*)(FIELD_OFFSET(CONTEXT, Ecx)+1), dbg_itype_unsigned_char_int},
278 {CV_REG_DH, "DH", (DWORD*)(FIELD_OFFSET(CONTEXT, Edx)+1), dbg_itype_unsigned_char_int},
279 {CV_REG_BH, "BH", (DWORD*)(FIELD_OFFSET(CONTEXT, Ebx)+1), dbg_itype_unsigned_char_int},
280 {CV_REG_AX, "AX", (DWORD*)FIELD_OFFSET(CONTEXT, Eax), dbg_itype_unsigned_short_int},
281 {CV_REG_CX, "CX", (DWORD*)FIELD_OFFSET(CONTEXT, Ecx), dbg_itype_unsigned_short_int},
282 {CV_REG_DX, "DX", (DWORD*)FIELD_OFFSET(CONTEXT, Edx), dbg_itype_unsigned_short_int},
283 {CV_REG_BX, "BX", (DWORD*)FIELD_OFFSET(CONTEXT, Ebx), dbg_itype_unsigned_short_int},
284 {CV_REG_SP, "SP", (DWORD*)FIELD_OFFSET(CONTEXT, Esp), dbg_itype_unsigned_short_int},
285 {CV_REG_BP, "BP", (DWORD*)FIELD_OFFSET(CONTEXT, Ebp), dbg_itype_unsigned_short_int},
286 {CV_REG_SI, "SI", (DWORD*)FIELD_OFFSET(CONTEXT, Esi), dbg_itype_unsigned_short_int},
287 {CV_REG_DI, "DI", (DWORD*)FIELD_OFFSET(CONTEXT, Edi), dbg_itype_unsigned_short_int},
288 {CV_REG_EAX, "EAX", (DWORD*)FIELD_OFFSET(CONTEXT, Eax), dbg_itype_unsigned_int},
289 {CV_REG_ECX, "ECX", (DWORD*)FIELD_OFFSET(CONTEXT, Ecx), dbg_itype_unsigned_int},
290 {CV_REG_EDX, "EDX", (DWORD*)FIELD_OFFSET(CONTEXT, Edx), dbg_itype_unsigned_int},
291 {CV_REG_EBX, "EBX", (DWORD*)FIELD_OFFSET(CONTEXT, Ebx), dbg_itype_unsigned_int},
292 {CV_REG_ESP, "ESP", (DWORD*)FIELD_OFFSET(CONTEXT, Esp), dbg_itype_unsigned_int},
293 {CV_REG_EBP, "EBP", (DWORD*)FIELD_OFFSET(CONTEXT, Ebp), dbg_itype_unsigned_int},
294 {CV_REG_ESI, "ESI", (DWORD*)FIELD_OFFSET(CONTEXT, Esi), dbg_itype_unsigned_int},
295 {CV_REG_EDI, "EDI", (DWORD*)FIELD_OFFSET(CONTEXT, Edi), dbg_itype_unsigned_int},
296 {CV_REG_ES, "ES", (DWORD*)FIELD_OFFSET(CONTEXT, SegEs), dbg_itype_unsigned_short_int},
297 {CV_REG_CS, "CS", (DWORD*)FIELD_OFFSET(CONTEXT, SegCs), dbg_itype_unsigned_short_int},
298 {CV_REG_SS, "SS", (DWORD*)FIELD_OFFSET(CONTEXT, SegSs), dbg_itype_unsigned_short_int},
299 {CV_REG_DS, "DS", (DWORD*)FIELD_OFFSET(CONTEXT, SegDs), dbg_itype_unsigned_short_int},
300 {CV_REG_FS, "FS", (DWORD*)FIELD_OFFSET(CONTEXT, SegFs), dbg_itype_unsigned_short_int},
301 {CV_REG_GS, "GS", (DWORD*)FIELD_OFFSET(CONTEXT, SegGs), dbg_itype_unsigned_short_int},
302 {CV_REG_IP, "IP", (DWORD*)FIELD_OFFSET(CONTEXT, Eip), dbg_itype_unsigned_short_int},
303 {CV_REG_FLAGS, "FLAGS", (DWORD*)FIELD_OFFSET(CONTEXT, EFlags), dbg_itype_unsigned_short_int},
304 {CV_REG_EIP, "EIP", (DWORD*)FIELD_OFFSET(CONTEXT, Eip), dbg_itype_unsigned_int},
305 {CV_REG_EFLAGS, "EFLAGS", (DWORD*)FIELD_OFFSET(CONTEXT, EFlags), dbg_itype_unsigned_int},
306 {0, NULL, 0, dbg_itype_none}
307 };
308
309 static const struct dbg_internal_var* be_i386_init_registers(CONTEXT* ctx)
310 {
311 struct dbg_internal_var* div;
312
313 for (div = be_i386_ctx; div->name; div++)
314 div->pval = (DWORD*)((char*)ctx + (DWORD)div->pval);
315 return be_i386_ctx;
316 }
317
318 static unsigned be_i386_is_step_over_insn(const void* insn)
319 {
320 BYTE ch;
321
322 for (;;)
323 {
324 if (!dbg_read_memory(insn, &ch, sizeof(ch))) return FALSE;
325
326 switch (ch)
327 {
328 /* Skip all prefixes */
329 case 0x2e: /* cs: */
330 case 0x36: /* ss: */
331 case 0x3e: /* ds: */
332 case 0x26: /* es: */
333 case 0x64: /* fs: */
334 case 0x65: /* gs: */
335 case 0x66: /* opcode size prefix */
336 case 0x67: /* addr size prefix */
337 case 0xf0: /* lock */
338 case 0xf2: /* repne */
339 case 0xf3: /* repe */
340 insn = (const char*)insn + 1;
341 continue;
342
343 /* Handle call instructions */
344 case 0xcd: /* int <intno> */
345 case 0xe8: /* call <offset> */
346 case 0x9a: /* lcall <seg>:<off> */
347 return TRUE;
348
349 case 0xff: /* call <regmodrm> */
350 if (!dbg_read_memory((const char*)insn + 1, &ch, sizeof(ch)))
351 return FALSE;
352 return (((ch & 0x38) == 0x10) || ((ch & 0x38) == 0x18));
353
354 /* Handle string instructions */
355 case 0x6c: /* insb */
356 case 0x6d: /* insw */
357 case 0x6e: /* outsb */
358 case 0x6f: /* outsw */
359 case 0xa4: /* movsb */
360 case 0xa5: /* movsw */
361 case 0xa6: /* cmpsb */
362 case 0xa7: /* cmpsw */
363 case 0xaa: /* stosb */
364 case 0xab: /* stosw */
365 case 0xac: /* lodsb */
366 case 0xad: /* lodsw */
367 case 0xae: /* scasb */
368 case 0xaf: /* scasw */
369 return TRUE;
370
371 default:
372 return FALSE;
373 }
374 }
375 }
376
377 static unsigned be_i386_is_function_return(const void* insn)
378 {
379 BYTE ch;
380
381 if (!dbg_read_memory(insn, &ch, sizeof(ch))) return FALSE;
382 return (ch == 0xC2) || (ch == 0xC3);
383 }
384
385 static unsigned be_i386_is_break_insn(const void* insn)
386 {
387 BYTE c;
388
389 if (!dbg_read_memory(insn, &c, sizeof(c))) return FALSE;
390 return c == 0xCC;
391 }
392
393 static unsigned get_size(ADDRESS_MODE am)
394 {
395 if (am == AddrModeReal || am == AddrMode1616) return 16;
396 return 32;
397 }
398
399 static BOOL fetch_value(const char* addr, unsigned sz, int* value)
400 {
401 char value8;
402 short value16;
403
404 switch (sz)
405 {
406 case 8:
407 if (!dbg_read_memory(addr, &value8, sizeof(value8)))
408 return FALSE;
409 *value = value8;
410 break;
411 case 16:
412 if (!dbg_read_memory(addr, &value16, sizeof(value16)))
413 return FALSE;
414 *value = value16;
415 case 32:
416 if (!dbg_read_memory(addr, value, sizeof(*value)))
417 return FALSE;
418 break;
419 default: return FALSE;
420 }
421 return TRUE;
422 }
423
424 static unsigned be_i386_is_func_call(const void* insn, ADDRESS64* callee)
425 {
426 BYTE ch;
427 int delta;
428 short segment;
429 unsigned dst = 0;
430 unsigned operand_size;
431 ADDRESS_MODE cs_addr_mode;
432
433 cs_addr_mode = get_selector_type(dbg_curr_thread->handle, &dbg_context,
434 dbg_context.SegCs);
435 operand_size = get_size(cs_addr_mode);
436
437 /* get operand_size (also getting rid of the various prefixes */
438 do
439 {
440 if (!dbg_read_memory(insn, &ch, sizeof(ch))) return FALSE;
441 if (ch == 0x66)
442 {
443 operand_size = 48 - operand_size; /* 16 => 32, 32 => 16 */
444 insn = (const char*)insn + 1;
445 }
446 } while (ch == 0x66 || ch == 0x67);
447
448 switch (ch)
449 {
450 case 0xe8: /* relative near call */
451 callee->Mode = cs_addr_mode;
452 if (!fetch_value((const char*)insn + 1, operand_size, &delta))
453 return FALSE;
454 callee->Segment = dbg_context.SegCs;
455 callee->Offset = (DWORD)insn + 1 + (operand_size / 8) + delta;
456 return TRUE;
457
458 case 0x9a: /* absolute far call */
459 if (!dbg_read_memory((const char*)insn + 1 + operand_size / 8,
460 &segment, sizeof(segment)))
461 return FALSE;
462 callee->Mode = get_selector_type(dbg_curr_thread->handle, &dbg_context,
463 segment);
464 if (!fetch_value((const char*)insn + 1, operand_size, &delta))
465 return FALSE;
466 callee->Segment = segment;
467 callee->Offset = delta;
468 return TRUE;
469
470 case 0xff:
471 if (!dbg_read_memory((const char*)insn + 1, &ch, sizeof(ch)))
472 return FALSE;
473 /* keep only the CALL and LCALL insn:s */
474 switch ((ch >> 3) & 0x07)
475 {
476 case 0x02:
477 segment = dbg_context.SegCs;
478 break;
479 case 0x03:
480 if (!dbg_read_memory((const char*)insn + 1 + operand_size / 8,
481 &segment, sizeof(segment)))
482 return FALSE;
483 break;
484 default: return FALSE;
485 }
486 /* FIXME: we only support the 32 bit far calls for now */
487 if (operand_size != 32)
488 {
489 WINE_FIXME("Unsupported yet call insn (0xFF 0x%02x) with 16 bit operand-size at %p\n", ch, insn);
490 return FALSE;
491 }
492 switch (ch & 0xC7) /* keep Mod R/M only (skip reg) */
493 {
494 case 0x04:
495 case 0x44:
496 case 0x84:
497 WINE_FIXME("Unsupported yet call insn (0xFF 0x%02x) (SIB bytes) at %p\n", ch, insn);
498 return FALSE;
499 case 0x05: /* addr32 */
500 WINE_FIXME("Unsupported yet call insn (0xFF 0x%02x) (addr32) at %p\n", ch, insn);
501 return FALSE;
502 default:
503 switch (ch & 0x07)
504 {
505 case 0x00: dst = dbg_context.Eax; break;
506 case 0x01: dst = dbg_context.Ecx; break;
507 case 0x02: dst = dbg_context.Edx; break;
508 case 0x03: dst = dbg_context.Ebx; break;
509 case 0x04: dst = dbg_context.Esp; break;
510 case 0x05: dst = dbg_context.Ebp; break;
511 case 0x06: dst = dbg_context.Esi; break;
512 case 0x07: dst = dbg_context.Edi; break;
513 }
514 if ((ch >> 6) != 0x03) /* indirect address */
515 {
516 if (ch >> 6) /* we got a displacement */
517 {
518 if (!fetch_value((const char*)insn + 2, (ch >> 6) == 0x01 ? 8 : 32, &delta))
519 return FALSE;
520 dst += delta;
521 }
522 if (((ch >> 3) & 0x07) == 0x03) /* LCALL */
523 {
524 if (!dbg_read_memory((const char*)dst + operand_size, &segment, sizeof(segment)))
525 return FALSE;
526 }
527 else segment = dbg_context.SegCs;
528 if (!dbg_read_memory((const char*)dst, &delta, sizeof(delta)))
529 return FALSE;
530 callee->Mode = get_selector_type(dbg_curr_thread->handle, &dbg_context,
531 segment);
532 callee->Segment = segment;
533 callee->Offset = delta;
534 }
535 else
536 {
537 callee->Mode = cs_addr_mode;
538 callee->Segment = dbg_context.SegCs;
539 callee->Offset = dst;
540 }
541 }
542 return TRUE;
543
544 case 0xCD:
545 WINE_FIXME("Unsupported yet call insn (0x%02x) at %p\n", ch, insn);
546 /* fall through */
547 default:
548 return FALSE;
549 }
550 }
551
552 #define DR7_CONTROL_SHIFT 16
553 #define DR7_CONTROL_SIZE 4
554
555 #define DR7_RW_EXECUTE (0x0)
556 #define DR7_RW_WRITE (0x1)
557 #define DR7_RW_READ (0x3)
558
559 #define DR7_LEN_1 (0x0)
560 #define DR7_LEN_2 (0x4)
561 #define DR7_LEN_4 (0xC)
562
563 #define DR7_LOCAL_ENABLE_SHIFT 0
564 #define DR7_GLOBAL_ENABLE_SHIFT 1
565 #define DR7_ENABLE_SIZE 2
566
567 #define DR7_LOCAL_ENABLE_MASK (0x55)
568 #define DR7_GLOBAL_ENABLE_MASK (0xAA)
569
570 #define DR7_CONTROL_RESERVED (0xFC00)
571 #define DR7_LOCAL_SLOWDOWN (0x100)
572 #define DR7_GLOBAL_SLOWDOWN (0x200)
573
574 #define DR7_ENABLE_MASK(dr) (1<<(DR7_LOCAL_ENABLE_SHIFT+DR7_ENABLE_SIZE*(dr)))
575 #define IS_DR7_SET(ctrl,dr) ((ctrl)&DR7_ENABLE_MASK(dr))
576
577 static inline int be_i386_get_unused_DR(CONTEXT* ctx, DWORD** r)
578 {
579 if (!IS_DR7_SET(ctx->Dr7, 0))
580 {
581 *r = &ctx->Dr0;
582 return 0;
583 }
584 if (!IS_DR7_SET(ctx->Dr7, 1))
585 {
586 *r = &ctx->Dr1;
587 return 1;
588 }
589 if (!IS_DR7_SET(ctx->Dr7, 2))
590 {
591 *r = &ctx->Dr2;
592 return 2;
593 }
594 if (!IS_DR7_SET(ctx->Dr7, 3))
595 {
596 *r = &ctx->Dr3;
597 return 3;
598 }
599 dbg_printf("All hardware registers have been used\n");
600
601 return -1;
602 }
603
604 static unsigned be_i386_insert_Xpoint(HANDLE hProcess, const struct be_process_io* pio,
605 CONTEXT* ctx, enum be_xpoint_type type,
606 void* addr, unsigned long* val, unsigned size)
607 {
608 unsigned char ch;
609 SIZE_T sz;
610 DWORD *pr;
611 int reg;
612 unsigned long bits;
613
614 switch (type)
615 {
616 case be_xpoint_break:
617 if (size != 0) return 0;
618 if (!pio->read(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
619 *val = ch;
620 ch = 0xcc;
621 if (!pio->write(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
622 break;
623 case be_xpoint_watch_exec:
624 bits = DR7_RW_EXECUTE;
625 goto hw_bp;
626 case be_xpoint_watch_read:
627 bits = DR7_RW_READ;
628 goto hw_bp;
629 case be_xpoint_watch_write:
630 bits = DR7_RW_WRITE;
631 hw_bp:
632 if ((reg = be_i386_get_unused_DR(ctx, &pr)) == -1) return 0;
633 *pr = (DWORD)addr;
634 if (type != be_xpoint_watch_exec) switch (size)
635 {
636 case 4: bits |= DR7_LEN_4; break;
637 case 2: bits |= DR7_LEN_2; break;
638 case 1: bits |= DR7_LEN_1; break;
639 default: return 0;
640 }
641 *val = reg;
642 /* clear old values */
643 ctx->Dr7 &= ~(0x0F << (DR7_CONTROL_SHIFT + DR7_CONTROL_SIZE * reg));
644 /* set the correct ones */
645 ctx->Dr7 |= bits << (DR7_CONTROL_SHIFT + DR7_CONTROL_SIZE * reg);
646 ctx->Dr7 |= DR7_ENABLE_MASK(reg) | DR7_LOCAL_SLOWDOWN;
647 break;
648 default:
649 dbg_printf("Unknown bp type %c\n", type);
650 return 0;
651 }
652 return 1;
653 }
654
655 static unsigned be_i386_remove_Xpoint(HANDLE hProcess, const struct be_process_io* pio,
656 CONTEXT* ctx, enum be_xpoint_type type,
657 void* addr, unsigned long val, unsigned size)
658 {
659 SIZE_T sz;
660 unsigned char ch;
661
662 switch (type)
663 {
664 case be_xpoint_break:
665 if (size != 0) return 0;
666 if (!pio->read(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
667 if (ch != (unsigned char)0xCC)
668 WINE_FIXME("Cannot get back %02x instead of 0xCC at %08lx\n",
669 ch, (unsigned long)addr);
670 ch = (unsigned char)val;
671 if (!pio->write(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
672 break;
673 case be_xpoint_watch_exec:
674 case be_xpoint_watch_read:
675 case be_xpoint_watch_write:
676 /* simply disable the entry */
677 ctx->Dr7 &= ~DR7_ENABLE_MASK(val);
678 break;
679 default:
680 dbg_printf("Unknown bp type %c\n", type);
681 return 0;
682 }
683 return 1;
684 }
685
686 static unsigned be_i386_is_watchpoint_set(const CONTEXT* ctx, unsigned idx)
687 {
688 return ctx->Dr6 & (1 << idx);
689 }
690
691 static void be_i386_clear_watchpoint(CONTEXT* ctx, unsigned idx)
692 {
693 ctx->Dr6 &= ~(1 << idx);
694 }
695
696 static int be_i386_adjust_pc_for_break(CONTEXT* ctx, BOOL way)
697 {
698 if (way)
699 {
700 ctx->Eip--;
701 return -1;
702 }
703 ctx->Eip++;
704 return 1;
705 }
706
707 static int be_i386_fetch_integer(const struct dbg_lvalue* lvalue, unsigned size,
708 unsigned ext_sign, LONGLONG* ret)
709 {
710 if (size != 1 && size != 2 && size != 4 && size != 8) return FALSE;
711
712 memset(ret, 0, sizeof(*ret)); /* clear unread bytes */
713 /* FIXME: this assumes that debuggee and debugger use the same
714 * integral representation
715 */
716 if (!memory_read_value(lvalue, size, ret)) return FALSE;
717
718 /* propagate sign information */
719 if (ext_sign && size < 8 && (*ret >> (size * 8 - 1)) != 0)
720 {
721 ULONGLONG neg = -1;
722 *ret |= neg << (size * 8);
723 }
724 return TRUE;
725 }
726
727 static int be_i386_fetch_float(const struct dbg_lvalue* lvalue, unsigned size,
728 long double* ret)
729 {
730 char tmp[12];
731
732 /* FIXME: this assumes that debuggee and debugger use the same
733 * representation for reals
734 */
735 if (!memory_read_value(lvalue, size, tmp)) return FALSE;
736
737 /* float & double types have to be promoted to a long double */
738 switch (size)
739 {
740 case sizeof(float): *ret = *(float*)tmp; break;
741 case sizeof(double): *ret = *(double*)tmp; break;
742 case sizeof(long double): *ret = *(long double*)tmp; break;
743 default: return FALSE;
744 }
745 return TRUE;
746 }
747
748 struct backend_cpu be_i386 =
749 {
750 be_i386_linearize,
751 be_i386_build_addr,
752 be_i386_get_addr,
753 be_i386_get_register_info,
754 be_i386_single_step,
755 be_i386_print_context,
756 be_i386_print_segment_info,
757 be_i386_init_registers,
758 be_i386_is_step_over_insn,
759 be_i386_is_function_return,
760 be_i386_is_break_insn,
761 be_i386_is_func_call,
762 be_i386_disasm_one_insn,
763 be_i386_insert_Xpoint,
764 be_i386_remove_Xpoint,
765 be_i386_is_watchpoint_set,
766 be_i386_clear_watchpoint,
767 be_i386_adjust_pc_for_break,
768 be_i386_fetch_integer,
769 be_i386_fetch_float,
770 };
771 #endif
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