[PATCH] ocfs2: zero_user_page conversion
[wrt350n-kernel.git] / arch / ia64 / sn / kernel / irq.c
blob7f6d2360a2620f66f96487c4b37898f9a2dac13e
1 /*
2 * Platform dependent support for SGI SN
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
8 * Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved.
9 */
11 #include <linux/irq.h>
12 #include <linux/spinlock.h>
13 #include <linux/init.h>
14 #include <asm/sn/addrs.h>
15 #include <asm/sn/arch.h>
16 #include <asm/sn/intr.h>
17 #include <asm/sn/pcibr_provider.h>
18 #include <asm/sn/pcibus_provider_defs.h>
19 #include <asm/sn/pcidev.h>
20 #include <asm/sn/shub_mmr.h>
21 #include <asm/sn/sn_sal.h>
23 static void force_interrupt(int irq);
24 static void register_intr_pda(struct sn_irq_info *sn_irq_info);
25 static void unregister_intr_pda(struct sn_irq_info *sn_irq_info);
27 int sn_force_interrupt_flag = 1;
28 extern int sn_ioif_inited;
29 struct list_head **sn_irq_lh;
30 static DEFINE_SPINLOCK(sn_irq_info_lock); /* non-IRQ lock */
32 u64 sn_intr_alloc(nasid_t local_nasid, int local_widget,
33 struct sn_irq_info *sn_irq_info,
34 int req_irq, nasid_t req_nasid,
35 int req_slice)
37 struct ia64_sal_retval ret_stuff;
38 ret_stuff.status = 0;
39 ret_stuff.v0 = 0;
41 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
42 (u64) SAL_INTR_ALLOC, (u64) local_nasid,
43 (u64) local_widget, __pa(sn_irq_info), (u64) req_irq,
44 (u64) req_nasid, (u64) req_slice);
46 return ret_stuff.status;
49 void sn_intr_free(nasid_t local_nasid, int local_widget,
50 struct sn_irq_info *sn_irq_info)
52 struct ia64_sal_retval ret_stuff;
53 ret_stuff.status = 0;
54 ret_stuff.v0 = 0;
56 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
57 (u64) SAL_INTR_FREE, (u64) local_nasid,
58 (u64) local_widget, (u64) sn_irq_info->irq_irq,
59 (u64) sn_irq_info->irq_cookie, 0, 0);
62 u64 sn_intr_redirect(nasid_t local_nasid, int local_widget,
63 struct sn_irq_info *sn_irq_info,
64 nasid_t req_nasid, int req_slice)
66 struct ia64_sal_retval ret_stuff;
67 ret_stuff.status = 0;
68 ret_stuff.v0 = 0;
70 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
71 (u64) SAL_INTR_REDIRECT, (u64) local_nasid,
72 (u64) local_widget, __pa(sn_irq_info),
73 (u64) req_nasid, (u64) req_slice, 0);
75 return ret_stuff.status;
78 static unsigned int sn_startup_irq(unsigned int irq)
80 return 0;
83 static void sn_shutdown_irq(unsigned int irq)
87 static void sn_disable_irq(unsigned int irq)
91 static void sn_enable_irq(unsigned int irq)
95 static void sn_ack_irq(unsigned int irq)
97 u64 event_occurred, mask;
99 irq = irq & 0xff;
100 event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED));
101 mask = event_occurred & SH_ALL_INT_MASK;
102 HUB_S((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), mask);
103 __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs);
105 move_native_irq(irq);
108 static void sn_end_irq(unsigned int irq)
110 int ivec;
111 u64 event_occurred;
113 ivec = irq & 0xff;
114 if (ivec == SGI_UART_VECTOR) {
115 event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR (SH_EVENT_OCCURRED));
116 /* If the UART bit is set here, we may have received an
117 * interrupt from the UART that the driver missed. To
118 * make sure, we IPI ourselves to force us to look again.
120 if (event_occurred & SH_EVENT_OCCURRED_UART_INT_MASK) {
121 platform_send_ipi(smp_processor_id(), SGI_UART_VECTOR,
122 IA64_IPI_DM_INT, 0);
125 __clear_bit(ivec, (volatile void *)pda->sn_in_service_ivecs);
126 if (sn_force_interrupt_flag)
127 force_interrupt(irq);
130 static void sn_irq_info_free(struct rcu_head *head);
132 struct sn_irq_info *sn_retarget_vector(struct sn_irq_info *sn_irq_info,
133 nasid_t nasid, int slice)
135 int vector;
136 int cpuid;
137 #ifdef CONFIG_SMP
138 int cpuphys;
139 #endif
140 int64_t bridge;
141 int local_widget, status;
142 nasid_t local_nasid;
143 struct sn_irq_info *new_irq_info;
144 struct sn_pcibus_provider *pci_provider;
146 bridge = (u64) sn_irq_info->irq_bridge;
147 if (!bridge) {
148 return NULL; /* irq is not a device interrupt */
151 local_nasid = NASID_GET(bridge);
153 if (local_nasid & 1)
154 local_widget = TIO_SWIN_WIDGETNUM(bridge);
155 else
156 local_widget = SWIN_WIDGETNUM(bridge);
157 vector = sn_irq_info->irq_irq;
159 /* Make use of SAL_INTR_REDIRECT if PROM supports it */
160 status = sn_intr_redirect(local_nasid, local_widget, sn_irq_info, nasid, slice);
161 if (!status) {
162 new_irq_info = sn_irq_info;
163 goto finish_up;
167 * PROM does not support SAL_INTR_REDIRECT, or it failed.
168 * Revert to old method.
170 new_irq_info = kmalloc(sizeof(struct sn_irq_info), GFP_ATOMIC);
171 if (new_irq_info == NULL)
172 return NULL;
174 memcpy(new_irq_info, sn_irq_info, sizeof(struct sn_irq_info));
176 /* Free the old PROM new_irq_info structure */
177 sn_intr_free(local_nasid, local_widget, new_irq_info);
178 unregister_intr_pda(new_irq_info);
180 /* allocate a new PROM new_irq_info struct */
181 status = sn_intr_alloc(local_nasid, local_widget,
182 new_irq_info, vector,
183 nasid, slice);
185 /* SAL call failed */
186 if (status) {
187 kfree(new_irq_info);
188 return NULL;
191 register_intr_pda(new_irq_info);
192 spin_lock(&sn_irq_info_lock);
193 list_replace_rcu(&sn_irq_info->list, &new_irq_info->list);
194 spin_unlock(&sn_irq_info_lock);
195 call_rcu(&sn_irq_info->rcu, sn_irq_info_free);
198 finish_up:
199 /* Update kernels new_irq_info with new target info */
200 cpuid = nasid_slice_to_cpuid(new_irq_info->irq_nasid,
201 new_irq_info->irq_slice);
202 new_irq_info->irq_cpuid = cpuid;
204 pci_provider = sn_pci_provider[new_irq_info->irq_bridge_type];
207 * If this represents a line interrupt, target it. If it's
208 * an msi (irq_int_bit < 0), it's already targeted.
210 if (new_irq_info->irq_int_bit >= 0 &&
211 pci_provider && pci_provider->target_interrupt)
212 (pci_provider->target_interrupt)(new_irq_info);
214 #ifdef CONFIG_SMP
215 cpuphys = cpu_physical_id(cpuid);
216 set_irq_affinity_info((vector & 0xff), cpuphys, 0);
217 #endif
219 return new_irq_info;
222 static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask)
224 struct sn_irq_info *sn_irq_info, *sn_irq_info_safe;
225 nasid_t nasid;
226 int slice;
228 nasid = cpuid_to_nasid(first_cpu(mask));
229 slice = cpuid_to_slice(first_cpu(mask));
231 list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe,
232 sn_irq_lh[irq], list)
233 (void)sn_retarget_vector(sn_irq_info, nasid, slice);
236 static void
237 sn_mask_irq(unsigned int irq)
241 static void
242 sn_unmask_irq(unsigned int irq)
246 struct irq_chip irq_type_sn = {
247 .name = "SN hub",
248 .startup = sn_startup_irq,
249 .shutdown = sn_shutdown_irq,
250 .enable = sn_enable_irq,
251 .disable = sn_disable_irq,
252 .ack = sn_ack_irq,
253 .end = sn_end_irq,
254 .mask = sn_mask_irq,
255 .unmask = sn_unmask_irq,
256 .set_affinity = sn_set_affinity_irq
259 unsigned int sn_local_vector_to_irq(u8 vector)
261 return (CPU_VECTOR_TO_IRQ(smp_processor_id(), vector));
264 void sn_irq_init(void)
266 int i;
267 irq_desc_t *base_desc = irq_desc;
269 ia64_first_device_vector = IA64_SN2_FIRST_DEVICE_VECTOR;
270 ia64_last_device_vector = IA64_SN2_LAST_DEVICE_VECTOR;
272 for (i = 0; i < NR_IRQS; i++) {
273 if (base_desc[i].chip == &no_irq_type) {
274 base_desc[i].chip = &irq_type_sn;
279 static void register_intr_pda(struct sn_irq_info *sn_irq_info)
281 int irq = sn_irq_info->irq_irq;
282 int cpu = sn_irq_info->irq_cpuid;
284 if (pdacpu(cpu)->sn_last_irq < irq) {
285 pdacpu(cpu)->sn_last_irq = irq;
288 if (pdacpu(cpu)->sn_first_irq == 0 || pdacpu(cpu)->sn_first_irq > irq)
289 pdacpu(cpu)->sn_first_irq = irq;
292 static void unregister_intr_pda(struct sn_irq_info *sn_irq_info)
294 int irq = sn_irq_info->irq_irq;
295 int cpu = sn_irq_info->irq_cpuid;
296 struct sn_irq_info *tmp_irq_info;
297 int i, foundmatch;
299 rcu_read_lock();
300 if (pdacpu(cpu)->sn_last_irq == irq) {
301 foundmatch = 0;
302 for (i = pdacpu(cpu)->sn_last_irq - 1;
303 i && !foundmatch; i--) {
304 list_for_each_entry_rcu(tmp_irq_info,
305 sn_irq_lh[i],
306 list) {
307 if (tmp_irq_info->irq_cpuid == cpu) {
308 foundmatch = 1;
309 break;
313 pdacpu(cpu)->sn_last_irq = i;
316 if (pdacpu(cpu)->sn_first_irq == irq) {
317 foundmatch = 0;
318 for (i = pdacpu(cpu)->sn_first_irq + 1;
319 i < NR_IRQS && !foundmatch; i++) {
320 list_for_each_entry_rcu(tmp_irq_info,
321 sn_irq_lh[i],
322 list) {
323 if (tmp_irq_info->irq_cpuid == cpu) {
324 foundmatch = 1;
325 break;
329 pdacpu(cpu)->sn_first_irq = ((i == NR_IRQS) ? 0 : i);
331 rcu_read_unlock();
334 static void sn_irq_info_free(struct rcu_head *head)
336 struct sn_irq_info *sn_irq_info;
338 sn_irq_info = container_of(head, struct sn_irq_info, rcu);
339 kfree(sn_irq_info);
342 void sn_irq_fixup(struct pci_dev *pci_dev, struct sn_irq_info *sn_irq_info)
344 nasid_t nasid = sn_irq_info->irq_nasid;
345 int slice = sn_irq_info->irq_slice;
346 int cpu = nasid_slice_to_cpuid(nasid, slice);
347 #ifdef CONFIG_SMP
348 int cpuphys;
349 #endif
351 pci_dev_get(pci_dev);
352 sn_irq_info->irq_cpuid = cpu;
353 sn_irq_info->irq_pciioinfo = SN_PCIDEV_INFO(pci_dev);
355 /* link it into the sn_irq[irq] list */
356 spin_lock(&sn_irq_info_lock);
357 list_add_rcu(&sn_irq_info->list, sn_irq_lh[sn_irq_info->irq_irq]);
358 reserve_irq_vector(sn_irq_info->irq_irq);
359 spin_unlock(&sn_irq_info_lock);
361 register_intr_pda(sn_irq_info);
362 #ifdef CONFIG_SMP
363 cpuphys = cpu_physical_id(cpu);
364 set_irq_affinity_info(sn_irq_info->irq_irq, cpuphys, 0);
365 #endif
368 void sn_irq_unfixup(struct pci_dev *pci_dev)
370 struct sn_irq_info *sn_irq_info;
372 /* Only cleanup IRQ stuff if this device has a host bus context */
373 if (!SN_PCIDEV_BUSSOFT(pci_dev))
374 return;
376 sn_irq_info = SN_PCIDEV_INFO(pci_dev)->pdi_sn_irq_info;
377 if (!sn_irq_info)
378 return;
379 if (!sn_irq_info->irq_irq) {
380 kfree(sn_irq_info);
381 return;
384 unregister_intr_pda(sn_irq_info);
385 spin_lock(&sn_irq_info_lock);
386 list_del_rcu(&sn_irq_info->list);
387 spin_unlock(&sn_irq_info_lock);
388 if (list_empty(sn_irq_lh[sn_irq_info->irq_irq]))
389 free_irq_vector(sn_irq_info->irq_irq);
390 call_rcu(&sn_irq_info->rcu, sn_irq_info_free);
391 pci_dev_put(pci_dev);
395 static inline void
396 sn_call_force_intr_provider(struct sn_irq_info *sn_irq_info)
398 struct sn_pcibus_provider *pci_provider;
400 pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type];
401 if (pci_provider && pci_provider->force_interrupt)
402 (*pci_provider->force_interrupt)(sn_irq_info);
405 static void force_interrupt(int irq)
407 struct sn_irq_info *sn_irq_info;
409 if (!sn_ioif_inited)
410 return;
412 rcu_read_lock();
413 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[irq], list)
414 sn_call_force_intr_provider(sn_irq_info);
416 rcu_read_unlock();
420 * Check for lost interrupts. If the PIC int_status reg. says that
421 * an interrupt has been sent, but not handled, and the interrupt
422 * is not pending in either the cpu irr regs or in the soft irr regs,
423 * and the interrupt is not in service, then the interrupt may have
424 * been lost. Force an interrupt on that pin. It is possible that
425 * the interrupt is in flight, so we may generate a spurious interrupt,
426 * but we should never miss a real lost interrupt.
428 static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info)
430 u64 regval;
431 struct pcidev_info *pcidev_info;
432 struct pcibus_info *pcibus_info;
435 * Bridge types attached to TIO (anything but PIC) do not need this WAR
436 * since they do not target Shub II interrupt registers. If that
437 * ever changes, this check needs to accomodate.
439 if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_PIC)
440 return;
442 pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
443 if (!pcidev_info)
444 return;
446 pcibus_info =
447 (struct pcibus_info *)pcidev_info->pdi_host_pcidev_info->
448 pdi_pcibus_info;
449 regval = pcireg_intr_status_get(pcibus_info);
451 if (!ia64_get_irr(irq_to_vector(irq))) {
452 if (!test_bit(irq, pda->sn_in_service_ivecs)) {
453 regval &= 0xff;
454 if (sn_irq_info->irq_int_bit & regval &
455 sn_irq_info->irq_last_intr) {
456 regval &= ~(sn_irq_info->irq_int_bit & regval);
457 sn_call_force_intr_provider(sn_irq_info);
461 sn_irq_info->irq_last_intr = regval;
464 void sn_lb_int_war_check(void)
466 struct sn_irq_info *sn_irq_info;
467 int i;
469 if (!sn_ioif_inited || pda->sn_first_irq == 0)
470 return;
472 rcu_read_lock();
473 for (i = pda->sn_first_irq; i <= pda->sn_last_irq; i++) {
474 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[i], list) {
475 sn_check_intr(i, sn_irq_info);
478 rcu_read_unlock();
481 void __init sn_irq_lh_init(void)
483 int i;
485 sn_irq_lh = kmalloc(sizeof(struct list_head *) * NR_IRQS, GFP_KERNEL);
486 if (!sn_irq_lh)
487 panic("SN PCI INIT: Failed to allocate memory for PCI init\n");
489 for (i = 0; i < NR_IRQS; i++) {
490 sn_irq_lh[i] = kmalloc(sizeof(struct list_head), GFP_KERNEL);
491 if (!sn_irq_lh[i])
492 panic("SN PCI INIT: Failed IRQ memory allocation\n");
494 INIT_LIST_HEAD(sn_irq_lh[i]);