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Merge git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux-2.6-for-linus
[wrt350n-kernel.git] / drivers / net / wireless / b43legacy / main.c
blob5f3f34e1dbfdc140f426c4660258ba54029780fd
1 /*
2 *
3 * Broadcom B43legacy wireless driver
4 *
5 * Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
6 * Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
7 * Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
8 * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
9 * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10 * Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
11 *
12 * Some parts of the code in this file are derived from the ipw2200
13 * driver Copyright(c) 2003 - 2004 Intel Corporation.
14
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; see the file COPYING. If not, write to
27 * the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
28 * Boston, MA 02110-1301, USA.
29 *
30 */
31
32 #include <linux/delay.h>
33 #include <linux/init.h>
34 #include <linux/moduleparam.h>
35 #include <linux/if_arp.h>
36 #include <linux/etherdevice.h>
37 #include <linux/version.h>
38 #include <linux/firmware.h>
39 #include <linux/wireless.h>
40 #include <linux/workqueue.h>
41 #include <linux/skbuff.h>
42 #include <linux/dma-mapping.h>
43 #include <net/dst.h>
44 #include <asm/unaligned.h>
45
46 #include "b43legacy.h"
47 #include "main.h"
48 #include "debugfs.h"
49 #include "phy.h"
50 #include "dma.h"
51 #include "pio.h"
52 #include "sysfs.h"
53 #include "xmit.h"
54 #include "radio.h"
55
56
57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
58 MODULE_AUTHOR("Martin Langer");
59 MODULE_AUTHOR("Stefano Brivio");
60 MODULE_AUTHOR("Michael Buesch");
61 MODULE_LICENSE("GPL");
62
63 MODULE_FIRMWARE(B43legacy_SUPPORTED_FIRMWARE_ID);
64
65 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
66 static int modparam_pio;
67 module_param_named(pio, modparam_pio, int, 0444);
68 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
69 #elif defined(CONFIG_B43LEGACY_DMA)
70 # define modparam_pio 0
71 #elif defined(CONFIG_B43LEGACY_PIO)
72 # define modparam_pio 1
73 #endif
74
75 static int modparam_bad_frames_preempt;
76 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
77 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
78 " Preemption");
79
80 static char modparam_fwpostfix[16];
81 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
82 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
83
84 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
85 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
86 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
87 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
88 SSB_DEVTABLE_END
89 };
90 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
91
92
93 /* Channel and ratetables are shared for all devices.
94 * They can't be const, because ieee80211 puts some precalculated
95 * data in there. This data is the same for all devices, so we don't
96 * get concurrency issues */
97 #define RATETAB_ENT(_rateid, _flags) \
98 { \
99 .rate = B43legacy_RATE_TO_100KBPS(_rateid), \
100 .val = (_rateid), \
101 .val2 = (_rateid), \
102 .flags = (_flags), \
103 }
104 static struct ieee80211_rate __b43legacy_ratetable[] = {
105 RATETAB_ENT(B43legacy_CCK_RATE_1MB, IEEE80211_RATE_CCK),
106 RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_CCK_2),
107 RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_CCK_2),
108 RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_CCK_2),
109 RATETAB_ENT(B43legacy_OFDM_RATE_6MB, IEEE80211_RATE_OFDM),
110 RATETAB_ENT(B43legacy_OFDM_RATE_9MB, IEEE80211_RATE_OFDM),
111 RATETAB_ENT(B43legacy_OFDM_RATE_12MB, IEEE80211_RATE_OFDM),
112 RATETAB_ENT(B43legacy_OFDM_RATE_18MB, IEEE80211_RATE_OFDM),
113 RATETAB_ENT(B43legacy_OFDM_RATE_24MB, IEEE80211_RATE_OFDM),
114 RATETAB_ENT(B43legacy_OFDM_RATE_36MB, IEEE80211_RATE_OFDM),
115 RATETAB_ENT(B43legacy_OFDM_RATE_48MB, IEEE80211_RATE_OFDM),
116 RATETAB_ENT(B43legacy_OFDM_RATE_54MB, IEEE80211_RATE_OFDM),
117 };
118 #define b43legacy_a_ratetable (__b43legacy_ratetable + 4)
119 #define b43legacy_a_ratetable_size 8
120 #define b43legacy_b_ratetable (__b43legacy_ratetable + 0)
121 #define b43legacy_b_ratetable_size 4
122 #define b43legacy_g_ratetable (__b43legacy_ratetable + 0)
123 #define b43legacy_g_ratetable_size 12
124
125 #define CHANTAB_ENT(_chanid, _freq) \
126 { \
127 .chan = (_chanid), \
128 .freq = (_freq), \
129 .val = (_chanid), \
130 .flag = IEEE80211_CHAN_W_SCAN | \
131 IEEE80211_CHAN_W_ACTIVE_SCAN | \
132 IEEE80211_CHAN_W_IBSS, \
133 .power_level = 0x0A, \
134 .antenna_max = 0xFF, \
135 }
136 static struct ieee80211_channel b43legacy_bg_chantable[] = {
137 CHANTAB_ENT(1, 2412),
138 CHANTAB_ENT(2, 2417),
139 CHANTAB_ENT(3, 2422),
140 CHANTAB_ENT(4, 2427),
141 CHANTAB_ENT(5, 2432),
142 CHANTAB_ENT(6, 2437),
143 CHANTAB_ENT(7, 2442),
144 CHANTAB_ENT(8, 2447),
145 CHANTAB_ENT(9, 2452),
146 CHANTAB_ENT(10, 2457),
147 CHANTAB_ENT(11, 2462),
148 CHANTAB_ENT(12, 2467),
149 CHANTAB_ENT(13, 2472),
150 CHANTAB_ENT(14, 2484),
151 };
152 #define b43legacy_bg_chantable_size ARRAY_SIZE(b43legacy_bg_chantable)
153
154 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
155 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
156 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
157 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
158
159
160 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
161 {
162 if (!wl || !wl->current_dev)
163 return 1;
164 if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
165 return 1;
166 /* We are up and running.
167 * Ratelimit the messages to avoid DoS over the net. */
168 return net_ratelimit();
169 }
170
171 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
172 {
173 va_list args;
174
175 if (!b43legacy_ratelimit(wl))
176 return;
177 va_start(args, fmt);
178 printk(KERN_INFO "b43legacy-%s: ",
179 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
180 vprintk(fmt, args);
181 va_end(args);
182 }
183
184 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
185 {
186 va_list args;
187
188 if (!b43legacy_ratelimit(wl))
189 return;
190 va_start(args, fmt);
191 printk(KERN_ERR "b43legacy-%s ERROR: ",
192 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
193 vprintk(fmt, args);
194 va_end(args);
195 }
196
197 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
198 {
199 va_list args;
200
201 if (!b43legacy_ratelimit(wl))
202 return;
203 va_start(args, fmt);
204 printk(KERN_WARNING "b43legacy-%s warning: ",
205 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
206 vprintk(fmt, args);
207 va_end(args);
208 }
209
210 #if B43legacy_DEBUG
211 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
212 {
213 va_list args;
214
215 va_start(args, fmt);
216 printk(KERN_DEBUG "b43legacy-%s debug: ",
217 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
218 vprintk(fmt, args);
219 va_end(args);
220 }
221 #endif /* DEBUG */
222
223 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
224 u32 val)
225 {
226 u32 status;
227
228 B43legacy_WARN_ON(offset % 4 != 0);
229
230 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
231 if (status & B43legacy_MACCTL_BE)
232 val = swab32(val);
233
234 b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
235 mmiowb();
236 b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
237 }
238
239 static inline
240 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
241 u16 routing, u16 offset)
242 {
243 u32 control;
244
245 /* "offset" is the WORD offset. */
246
247 control = routing;
248 control <<= 16;
249 control |= offset;
250 b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
251 }
252
253 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
254 u16 routing, u16 offset)
255 {
256 u32 ret;
257
258 if (routing == B43legacy_SHM_SHARED) {
259 B43legacy_WARN_ON((offset & 0x0001) != 0);
260 if (offset & 0x0003) {
261 /* Unaligned access */
262 b43legacy_shm_control_word(dev, routing, offset >> 2);
263 ret = b43legacy_read16(dev,
264 B43legacy_MMIO_SHM_DATA_UNALIGNED);
265 ret <<= 16;
266 b43legacy_shm_control_word(dev, routing,
267 (offset >> 2) + 1);
268 ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
269
270 return ret;
271 }
272 offset >>= 2;
273 }
274 b43legacy_shm_control_word(dev, routing, offset);
275 ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
276
277 return ret;
278 }
279
280 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
281 u16 routing, u16 offset)
282 {
283 u16 ret;
284
285 if (routing == B43legacy_SHM_SHARED) {
286 B43legacy_WARN_ON((offset & 0x0001) != 0);
287 if (offset & 0x0003) {
288 /* Unaligned access */
289 b43legacy_shm_control_word(dev, routing, offset >> 2);
290 ret = b43legacy_read16(dev,
291 B43legacy_MMIO_SHM_DATA_UNALIGNED);
292
293 return ret;
294 }
295 offset >>= 2;
296 }
297 b43legacy_shm_control_word(dev, routing, offset);
298 ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
299
300 return ret;
301 }
302
303 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
304 u16 routing, u16 offset,
305 u32 value)
306 {
307 if (routing == B43legacy_SHM_SHARED) {
308 B43legacy_WARN_ON((offset & 0x0001) != 0);
309 if (offset & 0x0003) {
310 /* Unaligned access */
311 b43legacy_shm_control_word(dev, routing, offset >> 2);
312 mmiowb();
313 b43legacy_write16(dev,
314 B43legacy_MMIO_SHM_DATA_UNALIGNED,
315 (value >> 16) & 0xffff);
316 mmiowb();
317 b43legacy_shm_control_word(dev, routing,
318 (offset >> 2) + 1);
319 mmiowb();
320 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
321 value & 0xffff);
322 return;
323 }
324 offset >>= 2;
325 }
326 b43legacy_shm_control_word(dev, routing, offset);
327 mmiowb();
328 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
329 }
330
331 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
332 u16 value)
333 {
334 if (routing == B43legacy_SHM_SHARED) {
335 B43legacy_WARN_ON((offset & 0x0001) != 0);
336 if (offset & 0x0003) {
337 /* Unaligned access */
338 b43legacy_shm_control_word(dev, routing, offset >> 2);
339 mmiowb();
340 b43legacy_write16(dev,
341 B43legacy_MMIO_SHM_DATA_UNALIGNED,
342 value);
343 return;
344 }
345 offset >>= 2;
346 }
347 b43legacy_shm_control_word(dev, routing, offset);
348 mmiowb();
349 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
350 }
351
352 /* Read HostFlags */
353 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
354 {
355 u32 ret;
356
357 ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
358 B43legacy_SHM_SH_HOSTFHI);
359 ret <<= 16;
360 ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
361 B43legacy_SHM_SH_HOSTFLO);
362
363 return ret;
364 }
365
366 /* Write HostFlags */
367 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
368 {
369 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
370 B43legacy_SHM_SH_HOSTFLO,
371 (value & 0x0000FFFF));
372 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
373 B43legacy_SHM_SH_HOSTFHI,
374 ((value & 0xFFFF0000) >> 16));
375 }
376
377 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
378 {
379 /* We need to be careful. As we read the TSF from multiple
380 * registers, we should take care of register overflows.
381 * In theory, the whole tsf read process should be atomic.
382 * We try to be atomic here, by restaring the read process,
383 * if any of the high registers changed (overflew).
384 */
385 if (dev->dev->id.revision >= 3) {
386 u32 low;
387 u32 high;
388 u32 high2;
389
390 do {
391 high = b43legacy_read32(dev,
392 B43legacy_MMIO_REV3PLUS_TSF_HIGH);
393 low = b43legacy_read32(dev,
394 B43legacy_MMIO_REV3PLUS_TSF_LOW);
395 high2 = b43legacy_read32(dev,
396 B43legacy_MMIO_REV3PLUS_TSF_HIGH);
397 } while (unlikely(high != high2));
398
399 *tsf = high;
400 *tsf <<= 32;
401 *tsf |= low;
402 } else {
403 u64 tmp;
404 u16 v0;
405 u16 v1;
406 u16 v2;
407 u16 v3;
408 u16 test1;
409 u16 test2;
410 u16 test3;
411
412 do {
413 v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
414 v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
415 v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
416 v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
417
418 test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
419 test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
420 test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
421 } while (v3 != test3 || v2 != test2 || v1 != test1);
422
423 *tsf = v3;
424 *tsf <<= 48;
425 tmp = v2;
426 tmp <<= 32;
427 *tsf |= tmp;
428 tmp = v1;
429 tmp <<= 16;
430 *tsf |= tmp;
431 *tsf |= v0;
432 }
433 }
434
435 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
436 {
437 u32 status;
438
439 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
440 status |= B43legacy_MACCTL_TBTTHOLD;
441 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
442 mmiowb();
443 }
444
445 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
446 {
447 u32 status;
448
449 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
450 status &= ~B43legacy_MACCTL_TBTTHOLD;
451 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
452 }
453
454 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
455 {
456 /* Be careful with the in-progress timer.
457 * First zero out the low register, so we have a full
458 * register-overflow duration to complete the operation.
459 */
460 if (dev->dev->id.revision >= 3) {
461 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
462 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
463
464 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
465 mmiowb();
466 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
467 hi);
468 mmiowb();
469 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
470 lo);
471 } else {
472 u16 v0 = (tsf & 0x000000000000FFFFULL);
473 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
474 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
475 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
476
477 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
478 mmiowb();
479 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
480 mmiowb();
481 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
482 mmiowb();
483 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
484 mmiowb();
485 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
486 }
487 }
488
489 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
490 {
491 b43legacy_time_lock(dev);
492 b43legacy_tsf_write_locked(dev, tsf);
493 b43legacy_time_unlock(dev);
494 }
495
496 static
497 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
498 u16 offset, const u8 *mac)
499 {
500 static const u8 zero_addr[ETH_ALEN] = { 0 };
501 u16 data;
502
503 if (!mac)
504 mac = zero_addr;
505
506 offset |= 0x0020;
507 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
508
509 data = mac[0];
510 data |= mac[1] << 8;
511 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
512 data = mac[2];
513 data |= mac[3] << 8;
514 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
515 data = mac[4];
516 data |= mac[5] << 8;
517 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
518 }
519
520 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
521 {
522 static const u8 zero_addr[ETH_ALEN] = { 0 };
523 const u8 *mac = dev->wl->mac_addr;
524 const u8 *bssid = dev->wl->bssid;
525 u8 mac_bssid[ETH_ALEN * 2];
526 int i;
527 u32 tmp;
528
529 if (!bssid)
530 bssid = zero_addr;
531 if (!mac)
532 mac = zero_addr;
533
534 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
535
536 memcpy(mac_bssid, mac, ETH_ALEN);
537 memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
538
539 /* Write our MAC address and BSSID to template ram */
540 for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
541 tmp = (u32)(mac_bssid[i + 0]);
542 tmp |= (u32)(mac_bssid[i + 1]) << 8;
543 tmp |= (u32)(mac_bssid[i + 2]) << 16;
544 tmp |= (u32)(mac_bssid[i + 3]) << 24;
545 b43legacy_ram_write(dev, 0x20 + i, tmp);
546 b43legacy_ram_write(dev, 0x78 + i, tmp);
547 b43legacy_ram_write(dev, 0x478 + i, tmp);
548 }
549 }
550
551 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
552 {
553 b43legacy_write_mac_bssid_templates(dev);
554 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
555 dev->wl->mac_addr);
556 }
557
558 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
559 u16 slot_time)
560 {
561 /* slot_time is in usec. */
562 if (dev->phy.type != B43legacy_PHYTYPE_G)
563 return;
564 b43legacy_write16(dev, 0x684, 510 + slot_time);
565 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
566 slot_time);
567 }
568
569 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
570 {
571 b43legacy_set_slot_time(dev, 9);
572 dev->short_slot = 1;
573 }
574
575 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
576 {
577 b43legacy_set_slot_time(dev, 20);
578 dev->short_slot = 0;
579 }
580
581 /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
582 * Returns the _previously_ enabled IRQ mask.
583 */
584 static inline u32 b43legacy_interrupt_enable(struct b43legacy_wldev *dev,
585 u32 mask)
586 {
587 u32 old_mask;
588
589 old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
590 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask |
591 mask);
592
593 return old_mask;
594 }
595
596 /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
597 * Returns the _previously_ enabled IRQ mask.
598 */
599 static inline u32 b43legacy_interrupt_disable(struct b43legacy_wldev *dev,
600 u32 mask)
601 {
602 u32 old_mask;
603
604 old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
605 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
606
607 return old_mask;
608 }
609
610 /* Synchronize IRQ top- and bottom-half.
611 * IRQs must be masked before calling this.
612 * This must not be called with the irq_lock held.
613 */
614 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
615 {
616 synchronize_irq(dev->dev->irq);
617 tasklet_kill(&dev->isr_tasklet);
618 }
619
620 /* DummyTransmission function, as documented on
621 * http://bcm-specs.sipsolutions.net/DummyTransmission
622 */
623 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
624 {
625 struct b43legacy_phy *phy = &dev->phy;
626 unsigned int i;
627 unsigned int max_loop;
628 u16 value;
629 u32 buffer[5] = {
630 0x00000000,
631 0x00D40000,
632 0x00000000,
633 0x01000000,
634 0x00000000,
635 };
636
637 switch (phy->type) {
638 case B43legacy_PHYTYPE_B:
639 case B43legacy_PHYTYPE_G:
640 max_loop = 0xFA;
641 buffer[0] = 0x000B846E;
642 break;
643 default:
644 B43legacy_BUG_ON(1);
645 return;
646 }
647
648 for (i = 0; i < 5; i++)
649 b43legacy_ram_write(dev, i * 4, buffer[i]);
650
651 /* dummy read follows */
652 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
653
654 b43legacy_write16(dev, 0x0568, 0x0000);
655 b43legacy_write16(dev, 0x07C0, 0x0000);
656 b43legacy_write16(dev, 0x050C, 0x0000);
657 b43legacy_write16(dev, 0x0508, 0x0000);
658 b43legacy_write16(dev, 0x050A, 0x0000);
659 b43legacy_write16(dev, 0x054C, 0x0000);
660 b43legacy_write16(dev, 0x056A, 0x0014);
661 b43legacy_write16(dev, 0x0568, 0x0826);
662 b43legacy_write16(dev, 0x0500, 0x0000);
663 b43legacy_write16(dev, 0x0502, 0x0030);
664
665 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
666 b43legacy_radio_write16(dev, 0x0051, 0x0017);
667 for (i = 0x00; i < max_loop; i++) {
668 value = b43legacy_read16(dev, 0x050E);
669 if (value & 0x0080)
670 break;
671 udelay(10);
672 }
673 for (i = 0x00; i < 0x0A; i++) {
674 value = b43legacy_read16(dev, 0x050E);
675 if (value & 0x0400)
676 break;
677 udelay(10);
678 }
679 for (i = 0x00; i < 0x0A; i++) {
680 value = b43legacy_read16(dev, 0x0690);
681 if (!(value & 0x0100))
682 break;
683 udelay(10);
684 }
685 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
686 b43legacy_radio_write16(dev, 0x0051, 0x0037);
687 }
688
689 /* Turn the Analog ON/OFF */
690 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
691 {
692 b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
693 }
694
695 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
696 {
697 u32 tmslow;
698 u32 macctl;
699
700 flags |= B43legacy_TMSLOW_PHYCLKEN;
701 flags |= B43legacy_TMSLOW_PHYRESET;
702 ssb_device_enable(dev->dev, flags);
703 msleep(2); /* Wait for the PLL to turn on. */
704
705 /* Now take the PHY out of Reset again */
706 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
707 tmslow |= SSB_TMSLOW_FGC;
708 tmslow &= ~B43legacy_TMSLOW_PHYRESET;
709 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
710 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
711 msleep(1);
712 tmslow &= ~SSB_TMSLOW_FGC;
713 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
714 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
715 msleep(1);
716
717 /* Turn Analog ON */
718 b43legacy_switch_analog(dev, 1);
719
720 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
721 macctl &= ~B43legacy_MACCTL_GMODE;
722 if (flags & B43legacy_TMSLOW_GMODE) {
723 macctl |= B43legacy_MACCTL_GMODE;
724 dev->phy.gmode = 1;
725 } else
726 dev->phy.gmode = 0;
727 macctl |= B43legacy_MACCTL_IHR_ENABLED;
728 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
729 }
730
731 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
732 {
733 u32 v0;
734 u32 v1;
735 u16 tmp;
736 struct b43legacy_txstatus stat;
737
738 while (1) {
739 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
740 if (!(v0 & 0x00000001))
741 break;
742 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
743
744 stat.cookie = (v0 >> 16);
745 stat.seq = (v1 & 0x0000FFFF);
746 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
747 tmp = (v0 & 0x0000FFFF);
748 stat.frame_count = ((tmp & 0xF000) >> 12);
749 stat.rts_count = ((tmp & 0x0F00) >> 8);
750 stat.supp_reason = ((tmp & 0x001C) >> 2);
751 stat.pm_indicated = !!(tmp & 0x0080);
752 stat.intermediate = !!(tmp & 0x0040);
753 stat.for_ampdu = !!(tmp & 0x0020);
754 stat.acked = !!(tmp & 0x0002);
755
756 b43legacy_handle_txstatus(dev, &stat);
757 }
758 }
759
760 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
761 {
762 u32 dummy;
763
764 if (dev->dev->id.revision < 5)
765 return;
766 /* Read all entries from the microcode TXstatus FIFO
767 * and throw them away.
768 */
769 while (1) {
770 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
771 if (!(dummy & 0x00000001))
772 break;
773 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
774 }
775 }
776
777 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
778 {
779 u32 val = 0;
780
781 val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
782 val <<= 16;
783 val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
784
785 return val;
786 }
787
788 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
789 {
790 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
791 (jssi & 0x0000FFFF));
792 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
793 (jssi & 0xFFFF0000) >> 16);
794 }
795
796 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
797 {
798 b43legacy_jssi_write(dev, 0x7F7F7F7F);
799 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
800 b43legacy_read32(dev,
801 B43legacy_MMIO_MACCMD)
802 | (1 << 4));
803 B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
804 dev->phy.channel);
805 }
806
807 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
808 {
809 /* Top half of Link Quality calculation. */
810
811 if (dev->noisecalc.calculation_running)
812 return;
813 dev->noisecalc.channel_at_start = dev->phy.channel;
814 dev->noisecalc.calculation_running = 1;
815 dev->noisecalc.nr_samples = 0;
816
817 b43legacy_generate_noise_sample(dev);
818 }
819
820 static void handle_irq_noise(struct b43legacy_wldev *dev)
821 {
822 struct b43legacy_phy *phy = &dev->phy;
823 u16 tmp;
824 u8 noise[4];
825 u8 i;
826 u8 j;
827 s32 average;
828
829 /* Bottom half of Link Quality calculation. */
830
831 B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
832 if (dev->noisecalc.channel_at_start != phy->channel)
833 goto drop_calculation;
834 *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
835 if (noise[0] == 0x7F || noise[1] == 0x7F ||
836 noise[2] == 0x7F || noise[3] == 0x7F)
837 goto generate_new;
838
839 /* Get the noise samples. */
840 B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
841 i = dev->noisecalc.nr_samples;
842 noise[0] = limit_value(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
843 noise[1] = limit_value(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
844 noise[2] = limit_value(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
845 noise[3] = limit_value(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
846 dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
847 dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
848 dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
849 dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
850 dev->noisecalc.nr_samples++;
851 if (dev->noisecalc.nr_samples == 8) {
852 /* Calculate the Link Quality by the noise samples. */
853 average = 0;
854 for (i = 0; i < 8; i++) {
855 for (j = 0; j < 4; j++)
856 average += dev->noisecalc.samples[i][j];
857 }
858 average /= (8 * 4);
859 average *= 125;
860 average += 64;
861 average /= 128;
862 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
863 0x40C);
864 tmp = (tmp / 128) & 0x1F;
865 if (tmp >= 8)
866 average += 2;
867 else
868 average -= 25;
869 if (tmp == 8)
870 average -= 72;
871 else
872 average -= 48;
873
874 dev->stats.link_noise = average;
875 drop_calculation:
876 dev->noisecalc.calculation_running = 0;
877 return;
878 }
879 generate_new:
880 b43legacy_generate_noise_sample(dev);
881 }
882
883 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
884 {
885 if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP)) {
886 /* TODO: PS TBTT */
887 } else {
888 if (1/*FIXME: the last PSpoll frame was sent successfully */)
889 b43legacy_power_saving_ctl_bits(dev, -1, -1);
890 }
891 dev->reg124_set_0x4 = 0;
892 if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS))
893 dev->reg124_set_0x4 = 1;
894 }
895
896 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
897 {
898 if (!dev->reg124_set_0x4) /*FIXME rename this variable*/
899 return;
900 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
901 b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
902 | 0x4);
903 }
904
905 static void handle_irq_pmq(struct b43legacy_wldev *dev)
906 {
907 u32 tmp;
908
909 /* TODO: AP mode. */
910
911 while (1) {
912 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
913 if (!(tmp & 0x00000008))
914 break;
915 }
916 /* 16bit write is odd, but correct. */
917 b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
918 }
919
920 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
921 const u8 *data, u16 size,
922 u16 ram_offset,
923 u16 shm_size_offset, u8 rate)
924 {
925 u32 i;
926 u32 tmp;
927 struct b43legacy_plcp_hdr4 plcp;
928
929 plcp.data = 0;
930 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
931 b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
932 ram_offset += sizeof(u32);
933 /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
934 * So leave the first two bytes of the next write blank.
935 */
936 tmp = (u32)(data[0]) << 16;
937 tmp |= (u32)(data[1]) << 24;
938 b43legacy_ram_write(dev, ram_offset, tmp);
939 ram_offset += sizeof(u32);
940 for (i = 2; i < size; i += sizeof(u32)) {
941 tmp = (u32)(data[i + 0]);
942 if (i + 1 < size)
943 tmp |= (u32)(data[i + 1]) << 8;
944 if (i + 2 < size)
945 tmp |= (u32)(data[i + 2]) << 16;
946 if (i + 3 < size)
947 tmp |= (u32)(data[i + 3]) << 24;
948 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
949 }
950 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
951 size + sizeof(struct b43legacy_plcp_hdr6));
952 }
953
954 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
955 u16 ram_offset,
956 u16 shm_size_offset, u8 rate)
957 {
958 int len;
959 const u8 *data;
960
961 B43legacy_WARN_ON(!dev->cached_beacon);
962 len = min((size_t)dev->cached_beacon->len,
963 0x200 - sizeof(struct b43legacy_plcp_hdr6));
964 data = (const u8 *)(dev->cached_beacon->data);
965 b43legacy_write_template_common(dev, data,
966 len, ram_offset,
967 shm_size_offset, rate);
968 }
969
970 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
971 u16 shm_offset, u16 size,
972 u8 rate)
973 {
974 struct b43legacy_plcp_hdr4 plcp;
975 u32 tmp;
976 __le16 dur;
977
978 plcp.data = 0;
979 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
980 dur = ieee80211_generic_frame_duration(dev->wl->hw,
981 dev->wl->vif,
982 size,
983 B43legacy_RATE_TO_100KBPS(rate));
984 /* Write PLCP in two parts and timing for packet transfer */
985 tmp = le32_to_cpu(plcp.data);
986 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
987 tmp & 0xFFFF);
988 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
989 tmp >> 16);
990 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
991 le16_to_cpu(dur));
992 }
993
994 /* Instead of using custom probe response template, this function
995 * just patches custom beacon template by:
996 * 1) Changing packet type
997 * 2) Patching duration field
998 * 3) Stripping TIM
999 */
1000 static u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1001 u16 *dest_size, u8 rate)
1002 {
1003 const u8 *src_data;
1004 u8 *dest_data;
1005 u16 src_size;
1006 u16 elem_size;
1007 u16 src_pos;
1008 u16 dest_pos;
1009 __le16 dur;
1010 struct ieee80211_hdr *hdr;
1011
1012 B43legacy_WARN_ON(!dev->cached_beacon);
1013 src_size = dev->cached_beacon->len;
1014 src_data = (const u8 *)dev->cached_beacon->data;
1015
1016 if (unlikely(src_size < 0x24)) {
1017 b43legacydbg(dev->wl, "b43legacy_generate_probe_resp: "
1018 "invalid beacon\n");
1019 return NULL;
1020 }
1021
1022 dest_data = kmalloc(src_size, GFP_ATOMIC);
1023 if (unlikely(!dest_data))
1024 return NULL;
1025
1026 /* 0x24 is offset of first variable-len Information-Element
1027 * in beacon frame.
1028 */
1029 memcpy(dest_data, src_data, 0x24);
1030 src_pos = 0x24;
1031 dest_pos = 0x24;
1032 for (; src_pos < src_size - 2; src_pos += elem_size) {
1033 elem_size = src_data[src_pos + 1] + 2;
1034 if (src_data[src_pos] != 0x05) { /* TIM */
1035 memcpy(dest_data + dest_pos, src_data + src_pos,
1036 elem_size);
1037 dest_pos += elem_size;
1038 }
1039 }
1040 *dest_size = dest_pos;
1041 hdr = (struct ieee80211_hdr *)dest_data;
1042
1043 /* Set the frame control. */
1044 hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1045 IEEE80211_STYPE_PROBE_RESP);
1046 dur = ieee80211_generic_frame_duration(dev->wl->hw,
1047 dev->wl->vif,
1048 *dest_size,
1049 B43legacy_RATE_TO_100KBPS(rate));
1050 hdr->duration_id = dur;
1051
1052 return dest_data;
1053 }
1054
1055 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1056 u16 ram_offset,
1057 u16 shm_size_offset, u8 rate)
1058 {
1059 u8 *probe_resp_data;
1060 u16 size;
1061
1062 B43legacy_WARN_ON(!dev->cached_beacon);
1063 size = dev->cached_beacon->len;
1064 probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1065 if (unlikely(!probe_resp_data))
1066 return;
1067
1068 /* Looks like PLCP headers plus packet timings are stored for
1069 * all possible basic rates
1070 */
1071 b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1072 B43legacy_CCK_RATE_1MB);
1073 b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1074 B43legacy_CCK_RATE_2MB);
1075 b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1076 B43legacy_CCK_RATE_5MB);
1077 b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1078 B43legacy_CCK_RATE_11MB);
1079
1080 size = min((size_t)size,
1081 0x200 - sizeof(struct b43legacy_plcp_hdr6));
1082 b43legacy_write_template_common(dev, probe_resp_data,
1083 size, ram_offset,
1084 shm_size_offset, rate);
1085 kfree(probe_resp_data);
1086 }
1087
1088 static int b43legacy_refresh_cached_beacon(struct b43legacy_wldev *dev,
1089 struct sk_buff *beacon)
1090 {
1091 if (dev->cached_beacon)
1092 kfree_skb(dev->cached_beacon);
1093 dev->cached_beacon = beacon;
1094
1095 return 0;
1096 }
1097
1098 static void b43legacy_update_templates(struct b43legacy_wldev *dev)
1099 {
1100 u32 status;
1101
1102 B43legacy_WARN_ON(!dev->cached_beacon);
1103
1104 b43legacy_write_beacon_template(dev, 0x68, 0x18,
1105 B43legacy_CCK_RATE_1MB);
1106 b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1107 B43legacy_CCK_RATE_1MB);
1108 b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1109 B43legacy_CCK_RATE_11MB);
1110
1111 status = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1112 status |= 0x03;
1113 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, status);
1114 }
1115
1116 static void b43legacy_refresh_templates(struct b43legacy_wldev *dev,
1117 struct sk_buff *beacon)
1118 {
1119 int err;
1120
1121 err = b43legacy_refresh_cached_beacon(dev, beacon);
1122 if (unlikely(err))
1123 return;
1124 b43legacy_update_templates(dev);
1125 }
1126
1127 static void b43legacy_set_ssid(struct b43legacy_wldev *dev,
1128 const u8 *ssid, u8 ssid_len)
1129 {
1130 u32 tmp;
1131 u16 i;
1132 u16 len;
1133
1134 len = min((u16)ssid_len, (u16)0x100);
1135 for (i = 0; i < len; i += sizeof(u32)) {
1136 tmp = (u32)(ssid[i + 0]);
1137 if (i + 1 < len)
1138 tmp |= (u32)(ssid[i + 1]) << 8;
1139 if (i + 2 < len)
1140 tmp |= (u32)(ssid[i + 2]) << 16;
1141 if (i + 3 < len)
1142 tmp |= (u32)(ssid[i + 3]) << 24;
1143 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
1144 0x380 + i, tmp);
1145 }
1146 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1147 0x48, len);
1148 }
1149
1150 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1151 u16 beacon_int)
1152 {
1153 b43legacy_time_lock(dev);
1154 if (dev->dev->id.revision >= 3)
1155 b43legacy_write32(dev, 0x188, (beacon_int << 16));
1156 else {
1157 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1158 b43legacy_write16(dev, 0x610, beacon_int);
1159 }
1160 b43legacy_time_unlock(dev);
1161 }
1162
1163 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1164 {
1165 u32 status;
1166
1167 if (!b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
1168 return;
1169
1170 dev->irq_savedstate &= ~B43legacy_IRQ_BEACON;
1171 status = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1172
1173 if (!dev->cached_beacon || ((status & 0x1) && (status & 0x2))) {
1174 /* ACK beacon IRQ. */
1175 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1176 B43legacy_IRQ_BEACON);
1177 dev->irq_savedstate |= B43legacy_IRQ_BEACON;
1178 if (dev->cached_beacon)
1179 kfree_skb(dev->cached_beacon);
1180 dev->cached_beacon = NULL;
1181 return;
1182 }
1183 if (!(status & 0x1)) {
1184 b43legacy_write_beacon_template(dev, 0x68, 0x18,
1185 B43legacy_CCK_RATE_1MB);
1186 status |= 0x1;
1187 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
1188 status);
1189 }
1190 if (!(status & 0x2)) {
1191 b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1192 B43legacy_CCK_RATE_1MB);
1193 status |= 0x2;
1194 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
1195 status);
1196 }
1197 }
1198
1199 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1200 {
1201 }
1202
1203 /* Interrupt handler bottom-half */
1204 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1205 {
1206 u32 reason;
1207 u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1208 u32 merged_dma_reason = 0;
1209 int i;
1210 unsigned long flags;
1211
1212 spin_lock_irqsave(&dev->wl->irq_lock, flags);
1213
1214 B43legacy_WARN_ON(b43legacy_status(dev) <
1215 B43legacy_STAT_INITIALIZED);
1216
1217 reason = dev->irq_reason;
1218 for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1219 dma_reason[i] = dev->dma_reason[i];
1220 merged_dma_reason |= dma_reason[i];
1221 }
1222
1223 if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1224 b43legacyerr(dev->wl, "MAC transmission error\n");
1225
1226 if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1227 b43legacyerr(dev->wl, "PHY transmission error\n");
1228 rmb();
1229 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1230 b43legacyerr(dev->wl, "Too many PHY TX errors, "
1231 "restarting the controller\n");
1232 b43legacy_controller_restart(dev, "PHY TX errors");
1233 }
1234 }
1235
1236 if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1237 B43legacy_DMAIRQ_NONFATALMASK))) {
1238 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1239 b43legacyerr(dev->wl, "Fatal DMA error: "
1240 "0x%08X, 0x%08X, 0x%08X, "
1241 "0x%08X, 0x%08X, 0x%08X\n",
1242 dma_reason[0], dma_reason[1],
1243 dma_reason[2], dma_reason[3],
1244 dma_reason[4], dma_reason[5]);
1245 b43legacy_controller_restart(dev, "DMA error");
1246 mmiowb();
1247 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1248 return;
1249 }
1250 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1251 b43legacyerr(dev->wl, "DMA error: "
1252 "0x%08X, 0x%08X, 0x%08X, "
1253 "0x%08X, 0x%08X, 0x%08X\n",
1254 dma_reason[0], dma_reason[1],
1255 dma_reason[2], dma_reason[3],
1256 dma_reason[4], dma_reason[5]);
1257 }
1258
1259 if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1260 handle_irq_ucode_debug(dev);
1261 if (reason & B43legacy_IRQ_TBTT_INDI)
1262 handle_irq_tbtt_indication(dev);
1263 if (reason & B43legacy_IRQ_ATIM_END)
1264 handle_irq_atim_end(dev);
1265 if (reason & B43legacy_IRQ_BEACON)
1266 handle_irq_beacon(dev);
1267 if (reason & B43legacy_IRQ_PMQ)
1268 handle_irq_pmq(dev);
1269 if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1270 ;/*TODO*/
1271 if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1272 handle_irq_noise(dev);
1273
1274 /* Check the DMA reason registers for received data. */
1275 if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1276 if (b43legacy_using_pio(dev))
1277 b43legacy_pio_rx(dev->pio.queue0);
1278 else
1279 b43legacy_dma_rx(dev->dma.rx_ring0);
1280 }
1281 B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1282 B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1283 if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1284 if (b43legacy_using_pio(dev))
1285 b43legacy_pio_rx(dev->pio.queue3);
1286 else
1287 b43legacy_dma_rx(dev->dma.rx_ring3);
1288 }
1289 B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1290 B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1291
1292 if (reason & B43legacy_IRQ_TX_OK)
1293 handle_irq_transmit_status(dev);
1294
1295 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1296 mmiowb();
1297 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1298 }
1299
1300 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1301 u16 base, int queueidx)
1302 {
1303 u16 rxctl;
1304
1305 rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1306 if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1307 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1308 else
1309 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1310 }
1311
1312 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1313 {
1314 if (b43legacy_using_pio(dev) &&
1315 (dev->dev->id.revision < 3) &&
1316 (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1317 /* Apply a PIO specific workaround to the dma_reasons */
1318 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1319 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1320 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1321 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1322 }
1323
1324 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1325
1326 b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1327 dev->dma_reason[0]);
1328 b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1329 dev->dma_reason[1]);
1330 b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1331 dev->dma_reason[2]);
1332 b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1333 dev->dma_reason[3]);
1334 b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1335 dev->dma_reason[4]);
1336 b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1337 dev->dma_reason[5]);
1338 }
1339
1340 /* Interrupt handler top-half */
1341 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1342 {
1343 irqreturn_t ret = IRQ_NONE;
1344 struct b43legacy_wldev *dev = dev_id;
1345 u32 reason;
1346
1347 if (!dev)
1348 return IRQ_NONE;
1349
1350 spin_lock(&dev->wl->irq_lock);
1351
1352 if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
1353 goto out;
1354 reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1355 if (reason == 0xffffffff) /* shared IRQ */
1356 goto out;
1357 ret = IRQ_HANDLED;
1358 reason &= b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
1359 if (!reason)
1360 goto out;
1361
1362 dev->dma_reason[0] = b43legacy_read32(dev,
1363 B43legacy_MMIO_DMA0_REASON)
1364 & 0x0001DC00;
1365 dev->dma_reason[1] = b43legacy_read32(dev,
1366 B43legacy_MMIO_DMA1_REASON)
1367 & 0x0000DC00;
1368 dev->dma_reason[2] = b43legacy_read32(dev,
1369 B43legacy_MMIO_DMA2_REASON)
1370 & 0x0000DC00;
1371 dev->dma_reason[3] = b43legacy_read32(dev,
1372 B43legacy_MMIO_DMA3_REASON)
1373 & 0x0001DC00;
1374 dev->dma_reason[4] = b43legacy_read32(dev,
1375 B43legacy_MMIO_DMA4_REASON)
1376 & 0x0000DC00;
1377 dev->dma_reason[5] = b43legacy_read32(dev,
1378 B43legacy_MMIO_DMA5_REASON)
1379 & 0x0000DC00;
1380
1381 b43legacy_interrupt_ack(dev, reason);
1382 /* disable all IRQs. They are enabled again in the bottom half. */
1383 dev->irq_savedstate = b43legacy_interrupt_disable(dev,
1384 B43legacy_IRQ_ALL);
1385 /* save the reason code and call our bottom half. */
1386 dev->irq_reason = reason;
1387 tasklet_schedule(&dev->isr_tasklet);
1388 out:
1389 mmiowb();
1390 spin_unlock(&dev->wl->irq_lock);
1391
1392 return ret;
1393 }
1394
1395 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1396 {
1397 release_firmware(dev->fw.ucode);
1398 dev->fw.ucode = NULL;
1399 release_firmware(dev->fw.pcm);
1400 dev->fw.pcm = NULL;
1401 release_firmware(dev->fw.initvals);
1402 dev->fw.initvals = NULL;
1403 release_firmware(dev->fw.initvals_band);
1404 dev->fw.initvals_band = NULL;
1405 }
1406
1407 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1408 {
1409 b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/"
1410 "Drivers/b43#devicefirmware "
1411 "and download the correct firmware (version 3).\n");
1412 }
1413
1414 static int do_request_fw(struct b43legacy_wldev *dev,
1415 const char *name,
1416 const struct firmware **fw)
1417 {
1418 char path[sizeof(modparam_fwpostfix) + 32];
1419 struct b43legacy_fw_header *hdr;
1420 u32 size;
1421 int err;
1422
1423 if (!name)
1424 return 0;
1425
1426 snprintf(path, ARRAY_SIZE(path),
1427 "b43legacy%s/%s.fw",
1428 modparam_fwpostfix, name);
1429 err = request_firmware(fw, path, dev->dev->dev);
1430 if (err) {
1431 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1432 "or load failed.\n", path);
1433 return err;
1434 }
1435 if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1436 goto err_format;
1437 hdr = (struct b43legacy_fw_header *)((*fw)->data);
1438 switch (hdr->type) {
1439 case B43legacy_FW_TYPE_UCODE:
1440 case B43legacy_FW_TYPE_PCM:
1441 size = be32_to_cpu(hdr->size);
1442 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1443 goto err_format;
1444 /* fallthrough */
1445 case B43legacy_FW_TYPE_IV:
1446 if (hdr->ver != 1)
1447 goto err_format;
1448 break;
1449 default:
1450 goto err_format;
1451 }
1452
1453 return err;
1454
1455 err_format:
1456 b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1457 return -EPROTO;
1458 }
1459
1460 static int b43legacy_request_firmware(struct b43legacy_wldev *dev)
1461 {
1462 struct b43legacy_firmware *fw = &dev->fw;
1463 const u8 rev = dev->dev->id.revision;
1464 const char *filename;
1465 u32 tmshigh;
1466 int err;
1467
1468 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
1469 if (!fw->ucode) {
1470 if (rev == 2)
1471 filename = "ucode2";
1472 else if (rev == 4)
1473 filename = "ucode4";
1474 else
1475 filename = "ucode5";
1476 err = do_request_fw(dev, filename, &fw->ucode);
1477 if (err)
1478 goto err_load;
1479 }
1480 if (!fw->pcm) {
1481 if (rev < 5)
1482 filename = "pcm4";
1483 else
1484 filename = "pcm5";
1485 err = do_request_fw(dev, filename, &fw->pcm);
1486 if (err)
1487 goto err_load;
1488 }
1489 if (!fw->initvals) {
1490 switch (dev->phy.type) {
1491 case B43legacy_PHYTYPE_G:
1492 if ((rev >= 5) && (rev <= 10))
1493 filename = "b0g0initvals5";
1494 else if (rev == 2 || rev == 4)
1495 filename = "b0g0initvals2";
1496 else
1497 goto err_no_initvals;
1498 break;
1499 default:
1500 goto err_no_initvals;
1501 }
1502 err = do_request_fw(dev, filename, &fw->initvals);
1503 if (err)
1504 goto err_load;
1505 }
1506 if (!fw->initvals_band) {
1507 switch (dev->phy.type) {
1508 case B43legacy_PHYTYPE_G:
1509 if ((rev >= 5) && (rev <= 10))
1510 filename = "b0g0bsinitvals5";
1511 else if (rev >= 11)
1512 filename = NULL;
1513 else if (rev == 2 || rev == 4)
1514 filename = NULL;
1515 else
1516 goto err_no_initvals;
1517 break;
1518 default:
1519 goto err_no_initvals;
1520 }
1521 err = do_request_fw(dev, filename, &fw->initvals_band);
1522 if (err)
1523 goto err_load;
1524 }
1525
1526 return 0;
1527
1528 err_load:
1529 b43legacy_print_fw_helptext(dev->wl);
1530 goto error;
1531
1532 err_no_initvals:
1533 err = -ENODEV;
1534 b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1535 "core rev %u\n", dev->phy.type, rev);
1536 goto error;
1537
1538 error:
1539 b43legacy_release_firmware(dev);
1540 return err;
1541 }
1542
1543 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1544 {
1545 const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1546 const __be32 *data;
1547 unsigned int i;
1548 unsigned int len;
1549 u16 fwrev;
1550 u16 fwpatch;
1551 u16 fwdate;
1552 u16 fwtime;
1553 u32 tmp, macctl;
1554 int err = 0;
1555
1556 /* Jump the microcode PSM to offset 0 */
1557 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1558 B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1559 macctl |= B43legacy_MACCTL_PSM_JMP0;
1560 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1561 /* Zero out all microcode PSM registers and shared memory. */
1562 for (i = 0; i < 64; i++)
1563 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1564 for (i = 0; i < 4096; i += 2)
1565 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1566
1567 /* Upload Microcode. */
1568 data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1569 len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1570 b43legacy_shm_control_word(dev,
1571 B43legacy_SHM_UCODE |
1572 B43legacy_SHM_AUTOINC_W,
1573 0x0000);
1574 for (i = 0; i < len; i++) {
1575 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1576 be32_to_cpu(data[i]));
1577 udelay(10);
1578 }
1579
1580 if (dev->fw.pcm) {
1581 /* Upload PCM data. */
1582 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1583 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1584 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1585 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1586 /* No need for autoinc bit in SHM_HW */
1587 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1588 for (i = 0; i < len; i++) {
1589 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1590 be32_to_cpu(data[i]));
1591 udelay(10);
1592 }
1593 }
1594
1595 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1596 B43legacy_IRQ_ALL);
1597
1598 /* Start the microcode PSM */
1599 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1600 macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1601 macctl |= B43legacy_MACCTL_PSM_RUN;
1602 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1603
1604 /* Wait for the microcode to load and respond */
1605 i = 0;
1606 while (1) {
1607 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1608 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1609 break;
1610 i++;
1611 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1612 b43legacyerr(dev->wl, "Microcode not responding\n");
1613 b43legacy_print_fw_helptext(dev->wl);
1614 err = -ENODEV;
1615 goto error;
1616 }
1617 msleep_interruptible(50);
1618 if (signal_pending(current)) {
1619 err = -EINTR;
1620 goto error;
1621 }
1622 }
1623 /* dummy read follows */
1624 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1625
1626 /* Get and check the revisions. */
1627 fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1628 B43legacy_SHM_SH_UCODEREV);
1629 fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1630 B43legacy_SHM_SH_UCODEPATCH);
1631 fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1632 B43legacy_SHM_SH_UCODEDATE);
1633 fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1634 B43legacy_SHM_SH_UCODETIME);
1635
1636 if (fwrev > 0x128) {
1637 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1638 " Only firmware from binary drivers version 3.x"
1639 " is supported. You must change your firmware"
1640 " files.\n");
1641 b43legacy_print_fw_helptext(dev->wl);
1642 err = -EOPNOTSUPP;
1643 goto error;
1644 }
1645 b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u "
1646 "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1647 (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1648 (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F,
1649 fwtime & 0x1F);
1650
1651 dev->fw.rev = fwrev;
1652 dev->fw.patch = fwpatch;
1653
1654 return 0;
1655
1656 error:
1657 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1658 macctl &= ~B43legacy_MACCTL_PSM_RUN;
1659 macctl |= B43legacy_MACCTL_PSM_JMP0;
1660 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1661
1662 return err;
1663 }
1664
1665 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1666 const struct b43legacy_iv *ivals,
1667 size_t count,
1668 size_t array_size)
1669 {
1670 const struct b43legacy_iv *iv;
1671 u16 offset;
1672 size_t i;
1673 bool bit32;
1674
1675 BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1676 iv = ivals;
1677 for (i = 0; i < count; i++) {
1678 if (array_size < sizeof(iv->offset_size))
1679 goto err_format;
1680 array_size -= sizeof(iv->offset_size);
1681 offset = be16_to_cpu(iv->offset_size);
1682 bit32 = !!(offset & B43legacy_IV_32BIT);
1683 offset &= B43legacy_IV_OFFSET_MASK;
1684 if (offset >= 0x1000)
1685 goto err_format;
1686 if (bit32) {
1687 u32 value;
1688
1689 if (array_size < sizeof(iv->data.d32))
1690 goto err_format;
1691 array_size -= sizeof(iv->data.d32);
1692
1693 value = be32_to_cpu(get_unaligned(&iv->data.d32));
1694 b43legacy_write32(dev, offset, value);
1695
1696 iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1697 sizeof(__be16) +
1698 sizeof(__be32));
1699 } else {
1700 u16 value;
1701
1702 if (array_size < sizeof(iv->data.d16))
1703 goto err_format;
1704 array_size -= sizeof(iv->data.d16);
1705
1706 value = be16_to_cpu(iv->data.d16);
1707 b43legacy_write16(dev, offset, value);
1708
1709 iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1710 sizeof(__be16) +
1711 sizeof(__be16));
1712 }
1713 }
1714 if (array_size)
1715 goto err_format;
1716
1717 return 0;
1718
1719 err_format:
1720 b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1721 b43legacy_print_fw_helptext(dev->wl);
1722
1723 return -EPROTO;
1724 }
1725
1726 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1727 {
1728 const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1729 const struct b43legacy_fw_header *hdr;
1730 struct b43legacy_firmware *fw = &dev->fw;
1731 const struct b43legacy_iv *ivals;
1732 size_t count;
1733 int err;
1734
1735 hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1736 ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1737 count = be32_to_cpu(hdr->size);
1738 err = b43legacy_write_initvals(dev, ivals, count,
1739 fw->initvals->size - hdr_len);
1740 if (err)
1741 goto out;
1742 if (fw->initvals_band) {
1743 hdr = (const struct b43legacy_fw_header *)
1744 (fw->initvals_band->data);
1745 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1746 + hdr_len);
1747 count = be32_to_cpu(hdr->size);
1748 err = b43legacy_write_initvals(dev, ivals, count,
1749 fw->initvals_band->size - hdr_len);
1750 if (err)
1751 goto out;
1752 }
1753 out:
1754
1755 return err;
1756 }
1757
1758 /* Initialize the GPIOs
1759 * http://bcm-specs.sipsolutions.net/GPIO
1760 */
1761 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1762 {
1763 struct ssb_bus *bus = dev->dev->bus;
1764 struct ssb_device *gpiodev, *pcidev = NULL;
1765 u32 mask;
1766 u32 set;
1767
1768 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1769 b43legacy_read32(dev,
1770 B43legacy_MMIO_MACCTL)
1771 & 0xFFFF3FFF);
1772
1773 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1774 b43legacy_read16(dev,
1775 B43legacy_MMIO_GPIO_MASK)
1776 | 0x000F);
1777
1778 mask = 0x0000001F;
1779 set = 0x0000000F;
1780 if (dev->dev->bus->chip_id == 0x4301) {
1781 mask |= 0x0060;
1782 set |= 0x0060;
1783 }
1784 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1785 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1786 b43legacy_read16(dev,
1787 B43legacy_MMIO_GPIO_MASK)
1788 | 0x0200);
1789 mask |= 0x0200;
1790 set |= 0x0200;
1791 }
1792 if (dev->dev->id.revision >= 2)
1793 mask |= 0x0010; /* FIXME: This is redundant. */
1794
1795 #ifdef CONFIG_SSB_DRIVER_PCICORE
1796 pcidev = bus->pcicore.dev;
1797 #endif
1798 gpiodev = bus->chipco.dev ? : pcidev;
1799 if (!gpiodev)
1800 return 0;
1801 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1802 (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1803 & mask) | set);
1804
1805 return 0;
1806 }
1807
1808 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1809 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1810 {
1811 struct ssb_bus *bus = dev->dev->bus;
1812 struct ssb_device *gpiodev, *pcidev = NULL;
1813
1814 #ifdef CONFIG_SSB_DRIVER_PCICORE
1815 pcidev = bus->pcicore.dev;
1816 #endif
1817 gpiodev = bus->chipco.dev ? : pcidev;
1818 if (!gpiodev)
1819 return;
1820 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1821 }
1822
1823 /* http://bcm-specs.sipsolutions.net/EnableMac */
1824 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1825 {
1826 dev->mac_suspended--;
1827 B43legacy_WARN_ON(dev->mac_suspended < 0);
1828 B43legacy_WARN_ON(irqs_disabled());
1829 if (dev->mac_suspended == 0) {
1830 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1831 b43legacy_read32(dev,
1832 B43legacy_MMIO_MACCTL)
1833 | B43legacy_MACCTL_ENABLED);
1834 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1835 B43legacy_IRQ_MAC_SUSPENDED);
1836 /* the next two are dummy reads */
1837 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1838 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1839 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1840
1841 /* Re-enable IRQs. */
1842 spin_lock_irq(&dev->wl->irq_lock);
1843 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1844 spin_unlock_irq(&dev->wl->irq_lock);
1845 }
1846 }
1847
1848 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1849 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1850 {
1851 int i;
1852 u32 tmp;
1853
1854 might_sleep();
1855 B43legacy_WARN_ON(irqs_disabled());
1856 B43legacy_WARN_ON(dev->mac_suspended < 0);
1857
1858 if (dev->mac_suspended == 0) {
1859 /* Mask IRQs before suspending MAC. Otherwise
1860 * the MAC stays busy and won't suspend. */
1861 spin_lock_irq(&dev->wl->irq_lock);
1862 tmp = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
1863 spin_unlock_irq(&dev->wl->irq_lock);
1864 b43legacy_synchronize_irq(dev);
1865 dev->irq_savedstate = tmp;
1866
1867 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1868 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1869 b43legacy_read32(dev,
1870 B43legacy_MMIO_MACCTL)
1871 & ~B43legacy_MACCTL_ENABLED);
1872 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1873 for (i = 40; i; i--) {
1874 tmp = b43legacy_read32(dev,
1875 B43legacy_MMIO_GEN_IRQ_REASON);
1876 if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1877 goto out;
1878 msleep(1);
1879 }
1880 b43legacyerr(dev->wl, "MAC suspend failed\n");
1881 }
1882 out:
1883 dev->mac_suspended++;
1884 }
1885
1886 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
1887 {
1888 struct b43legacy_wl *wl = dev->wl;
1889 u32 ctl;
1890 u16 cfp_pretbtt;
1891
1892 ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1893 /* Reset status to STA infrastructure mode. */
1894 ctl &= ~B43legacy_MACCTL_AP;
1895 ctl &= ~B43legacy_MACCTL_KEEP_CTL;
1896 ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
1897 ctl &= ~B43legacy_MACCTL_KEEP_BAD;
1898 ctl &= ~B43legacy_MACCTL_PROMISC;
1899 ctl &= ~B43legacy_MACCTL_BEACPROMISC;
1900 ctl |= B43legacy_MACCTL_INFRA;
1901
1902 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
1903 ctl |= B43legacy_MACCTL_AP;
1904 else if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_IBSS))
1905 ctl &= ~B43legacy_MACCTL_INFRA;
1906
1907 if (wl->filter_flags & FIF_CONTROL)
1908 ctl |= B43legacy_MACCTL_KEEP_CTL;
1909 if (wl->filter_flags & FIF_FCSFAIL)
1910 ctl |= B43legacy_MACCTL_KEEP_BAD;
1911 if (wl->filter_flags & FIF_PLCPFAIL)
1912 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
1913 if (wl->filter_flags & FIF_PROMISC_IN_BSS)
1914 ctl |= B43legacy_MACCTL_PROMISC;
1915 if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
1916 ctl |= B43legacy_MACCTL_BEACPROMISC;
1917
1918 /* Workaround: On old hardware the HW-MAC-address-filter
1919 * doesn't work properly, so always run promisc in filter
1920 * it in software. */
1921 if (dev->dev->id.revision <= 4)
1922 ctl |= B43legacy_MACCTL_PROMISC;
1923
1924 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
1925
1926 cfp_pretbtt = 2;
1927 if ((ctl & B43legacy_MACCTL_INFRA) &&
1928 !(ctl & B43legacy_MACCTL_AP)) {
1929 if (dev->dev->bus->chip_id == 0x4306 &&
1930 dev->dev->bus->chip_rev == 3)
1931 cfp_pretbtt = 100;
1932 else
1933 cfp_pretbtt = 50;
1934 }
1935 b43legacy_write16(dev, 0x612, cfp_pretbtt);
1936 }
1937
1938 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
1939 u16 rate,
1940 int is_ofdm)
1941 {
1942 u16 offset;
1943
1944 if (is_ofdm) {
1945 offset = 0x480;
1946 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
1947 } else {
1948 offset = 0x4C0;
1949 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
1950 }
1951 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
1952 b43legacy_shm_read16(dev,
1953 B43legacy_SHM_SHARED, offset));
1954 }
1955
1956 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
1957 {
1958 switch (dev->phy.type) {
1959 case B43legacy_PHYTYPE_G:
1960 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
1961 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
1962 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
1963 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
1964 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
1965 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
1966 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
1967 /* fallthrough */
1968 case B43legacy_PHYTYPE_B:
1969 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
1970 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
1971 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
1972 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
1973 break;
1974 default:
1975 B43legacy_BUG_ON(1);
1976 }
1977 }
1978
1979 /* Set the TX-Antenna for management frames sent by firmware. */
1980 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
1981 int antenna)
1982 {
1983 u16 ant = 0;
1984 u16 tmp;
1985
1986 switch (antenna) {
1987 case B43legacy_ANTENNA0:
1988 ant |= B43legacy_TX4_PHY_ANT0;
1989 break;
1990 case B43legacy_ANTENNA1:
1991 ant |= B43legacy_TX4_PHY_ANT1;
1992 break;
1993 case B43legacy_ANTENNA_AUTO:
1994 ant |= B43legacy_TX4_PHY_ANTLAST;
1995 break;
1996 default:
1997 B43legacy_BUG_ON(1);
1998 }
1999
2000 /* FIXME We also need to set the other flags of the PHY control
2001 * field somewhere. */
2002
2003 /* For Beacons */
2004 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2005 B43legacy_SHM_SH_BEACPHYCTL);
2006 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2007 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2008 B43legacy_SHM_SH_BEACPHYCTL, tmp);
2009 /* For ACK/CTS */
2010 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2011 B43legacy_SHM_SH_ACKCTSPHYCTL);
2012 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2013 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2014 B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2015 /* For Probe Resposes */
2016 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2017 B43legacy_SHM_SH_PRPHYCTL);
2018 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2019 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2020 B43legacy_SHM_SH_PRPHYCTL, tmp);
2021 }
2022
2023 /* This is the opposite of b43legacy_chip_init() */
2024 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2025 {
2026 b43legacy_radio_turn_off(dev, 1);
2027 b43legacy_gpio_cleanup(dev);
2028 /* firmware is released later */
2029 }
2030
2031 /* Initialize the chip
2032 * http://bcm-specs.sipsolutions.net/ChipInit
2033 */
2034 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2035 {
2036 struct b43legacy_phy *phy = &dev->phy;
2037 int err;
2038 int tmp;
2039 u32 value32, macctl;
2040 u16 value16;
2041
2042 /* Initialize the MAC control */
2043 macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2044 if (dev->phy.gmode)
2045 macctl |= B43legacy_MACCTL_GMODE;
2046 macctl |= B43legacy_MACCTL_INFRA;
2047 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2048
2049 err = b43legacy_request_firmware(dev);
2050 if (err)
2051 goto out;
2052 err = b43legacy_upload_microcode(dev);
2053 if (err)
2054 goto out; /* firmware is released later */
2055
2056 err = b43legacy_gpio_init(dev);
2057 if (err)
2058 goto out; /* firmware is released later */
2059
2060 err = b43legacy_upload_initvals(dev);
2061 if (err)
2062 goto err_gpio_clean;
2063 b43legacy_radio_turn_on(dev);
2064
2065 b43legacy_write16(dev, 0x03E6, 0x0000);
2066 err = b43legacy_phy_init(dev);
2067 if (err)
2068 goto err_radio_off;
2069
2070 /* Select initial Interference Mitigation. */
2071 tmp = phy->interfmode;
2072 phy->interfmode = B43legacy_INTERFMODE_NONE;
2073 b43legacy_radio_set_interference_mitigation(dev, tmp);
2074
2075 b43legacy_phy_set_antenna_diversity(dev);
2076 b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2077
2078 if (phy->type == B43legacy_PHYTYPE_B) {
2079 value16 = b43legacy_read16(dev, 0x005E);
2080 value16 |= 0x0004;
2081 b43legacy_write16(dev, 0x005E, value16);
2082 }
2083 b43legacy_write32(dev, 0x0100, 0x01000000);
2084 if (dev->dev->id.revision < 5)
2085 b43legacy_write32(dev, 0x010C, 0x01000000);
2086
2087 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2088 value32 &= ~B43legacy_MACCTL_INFRA;
2089 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2090 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2091 value32 |= B43legacy_MACCTL_INFRA;
2092 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2093
2094 if (b43legacy_using_pio(dev)) {
2095 b43legacy_write32(dev, 0x0210, 0x00000100);
2096 b43legacy_write32(dev, 0x0230, 0x00000100);
2097 b43legacy_write32(dev, 0x0250, 0x00000100);
2098 b43legacy_write32(dev, 0x0270, 0x00000100);
2099 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2100 0x0000);
2101 }
2102
2103 /* Probe Response Timeout value */
2104 /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2105 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2106
2107 /* Initially set the wireless operation mode. */
2108 b43legacy_adjust_opmode(dev);
2109
2110 if (dev->dev->id.revision < 3) {
2111 b43legacy_write16(dev, 0x060E, 0x0000);
2112 b43legacy_write16(dev, 0x0610, 0x8000);
2113 b43legacy_write16(dev, 0x0604, 0x0000);
2114 b43legacy_write16(dev, 0x0606, 0x0200);
2115 } else {
2116 b43legacy_write32(dev, 0x0188, 0x80000000);
2117 b43legacy_write32(dev, 0x018C, 0x02000000);
2118 }
2119 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2120 b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2121 b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2122 b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2123 b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2124 b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2125 b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2126
2127 value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2128 value32 |= 0x00100000;
2129 ssb_write32(dev->dev, SSB_TMSLOW, value32);
2130
2131 b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2132 dev->dev->bus->chipco.fast_pwrup_delay);
2133
2134 /* PHY TX errors counter. */
2135 atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2136
2137 B43legacy_WARN_ON(err != 0);
2138 b43legacydbg(dev->wl, "Chip initialized\n");
2139 out:
2140 return err;
2141
2142 err_radio_off:
2143 b43legacy_radio_turn_off(dev, 1);
2144 err_gpio_clean:
2145 b43legacy_gpio_cleanup(dev);
2146 goto out;
2147 }
2148
2149 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2150 {
2151 struct b43legacy_phy *phy = &dev->phy;
2152
2153 if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2154 return;
2155
2156 b43legacy_mac_suspend(dev);
2157 b43legacy_phy_lo_g_measure(dev);
2158 b43legacy_mac_enable(dev);
2159 }
2160
2161 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2162 {
2163 b43legacy_phy_lo_mark_all_unused(dev);
2164 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2165 b43legacy_mac_suspend(dev);
2166 b43legacy_calc_nrssi_slope(dev);
2167 b43legacy_mac_enable(dev);
2168 }
2169 }
2170
2171 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2172 {
2173 /* Update device statistics. */
2174 b43legacy_calculate_link_quality(dev);
2175 }
2176
2177 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2178 {
2179 b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2180
2181 atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2182 wmb();
2183 }
2184
2185 static void do_periodic_work(struct b43legacy_wldev *dev)
2186 {
2187 unsigned int state;
2188
2189 state = dev->periodic_state;
2190 if (state % 8 == 0)
2191 b43legacy_periodic_every120sec(dev);
2192 if (state % 4 == 0)
2193 b43legacy_periodic_every60sec(dev);
2194 if (state % 2 == 0)
2195 b43legacy_periodic_every30sec(dev);
2196 b43legacy_periodic_every15sec(dev);
2197 }
2198
2199 /* Periodic work locking policy:
2200 * The whole periodic work handler is protected by
2201 * wl->mutex. If another lock is needed somewhere in the
2202 * pwork callchain, it's aquired in-place, where it's needed.
2203 */
2204 static void b43legacy_periodic_work_handler(struct work_struct *work)
2205 {
2206 struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2207 periodic_work.work);
2208 struct b43legacy_wl *wl = dev->wl;
2209 unsigned long delay;
2210
2211 mutex_lock(&wl->mutex);
2212
2213 if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2214 goto out;
2215 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2216 goto out_requeue;
2217
2218 do_periodic_work(dev);
2219
2220 dev->periodic_state++;
2221 out_requeue:
2222 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2223 delay = msecs_to_jiffies(50);
2224 else
2225 delay = round_jiffies_relative(HZ * 15);
2226 queue_delayed_work(wl->hw->workqueue, &dev->periodic_work, delay);
2227 out:
2228 mutex_unlock(&wl->mutex);
2229 }
2230
2231 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2232 {
2233 struct delayed_work *work = &dev->periodic_work;
2234
2235 dev->periodic_state = 0;
2236 INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2237 queue_delayed_work(dev->wl->hw->workqueue, work, 0);
2238 }
2239
2240 /* Validate access to the chip (SHM) */
2241 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2242 {
2243 u32 value;
2244 u32 shm_backup;
2245
2246 shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2247 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2248 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2249 0xAA5555AA)
2250 goto error;
2251 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2252 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2253 0x55AAAA55)
2254 goto error;
2255 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2256
2257 value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2258 if ((value | B43legacy_MACCTL_GMODE) !=
2259 (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2260 goto error;
2261
2262 value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2263 if (value)
2264 goto error;
2265
2266 return 0;
2267 error:
2268 b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2269 return -ENODEV;
2270 }
2271
2272 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2273 {
2274 dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2275 B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2276 dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2277 0x0056);
2278 /* KTP is a word address, but we address SHM bytewise.
2279 * So multiply by two.
2280 */
2281 dev->ktp *= 2;
2282 if (dev->dev->id.revision >= 5)
2283 /* Number of RCMTA address slots */
2284 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2285 dev->max_nr_keys - 8);
2286 }
2287
2288 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2289 {
2290 struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2291 unsigned long flags;
2292
2293 /* Don't take wl->mutex here, as it could deadlock with
2294 * hwrng internal locking. It's not needed to take
2295 * wl->mutex here, anyway. */
2296
2297 spin_lock_irqsave(&wl->irq_lock, flags);
2298 *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2299 spin_unlock_irqrestore(&wl->irq_lock, flags);
2300
2301 return (sizeof(u16));
2302 }
2303
2304 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2305 {
2306 if (wl->rng_initialized)
2307 hwrng_unregister(&wl->rng);
2308 }
2309
2310 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2311 {
2312 int err;
2313
2314 snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2315 "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2316 wl->rng.name = wl->rng_name;
2317 wl->rng.data_read = b43legacy_rng_read;
2318 wl->rng.priv = (unsigned long)wl;
2319 wl->rng_initialized = 1;
2320 err = hwrng_register(&wl->rng);
2321 if (err) {
2322 wl->rng_initialized = 0;
2323 b43legacyerr(wl, "Failed to register the random "
2324 "number generator (%d)\n", err);
2325 }
2326
2327 return err;
2328 }
2329
2330 static int b43legacy_op_tx(struct ieee80211_hw *hw,
2331 struct sk_buff *skb,
2332 struct ieee80211_tx_control *ctl)
2333 {
2334 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2335 struct b43legacy_wldev *dev = wl->current_dev;
2336 int err = -ENODEV;
2337 unsigned long flags;
2338
2339 if (unlikely(!dev))
2340 goto out;
2341 if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
2342 goto out;
2343 /* DMA-TX is done without a global lock. */
2344 if (b43legacy_using_pio(dev)) {
2345 spin_lock_irqsave(&wl->irq_lock, flags);
2346 err = b43legacy_pio_tx(dev, skb, ctl);
2347 spin_unlock_irqrestore(&wl->irq_lock, flags);
2348 } else
2349 err = b43legacy_dma_tx(dev, skb, ctl);
2350 out:
2351 if (unlikely(err))
2352 return NETDEV_TX_BUSY;
2353 return NETDEV_TX_OK;
2354 }
2355
2356 static int b43legacy_op_conf_tx(struct ieee80211_hw *hw,
2357 int queue,
2358 const struct ieee80211_tx_queue_params *params)
2359 {
2360 return 0;
2361 }
2362
2363 static int b43legacy_op_get_tx_stats(struct ieee80211_hw *hw,
2364 struct ieee80211_tx_queue_stats *stats)
2365 {
2366 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2367 struct b43legacy_wldev *dev = wl->current_dev;
2368 unsigned long flags;
2369 int err = -ENODEV;
2370
2371 if (!dev)
2372 goto out;
2373 spin_lock_irqsave(&wl->irq_lock, flags);
2374 if (likely(b43legacy_status(dev) >= B43legacy_STAT_STARTED)) {
2375 if (b43legacy_using_pio(dev))
2376 b43legacy_pio_get_tx_stats(dev, stats);
2377 else
2378 b43legacy_dma_get_tx_stats(dev, stats);
2379 err = 0;
2380 }
2381 spin_unlock_irqrestore(&wl->irq_lock, flags);
2382 out:
2383 return err;
2384 }
2385
2386 static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2387 struct ieee80211_low_level_stats *stats)
2388 {
2389 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2390 unsigned long flags;
2391
2392 spin_lock_irqsave(&wl->irq_lock, flags);
2393 memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2394 spin_unlock_irqrestore(&wl->irq_lock, flags);
2395
2396 return 0;
2397 }
2398
2399 static const char *phymode_to_string(unsigned int phymode)
2400 {
2401 switch (phymode) {
2402 case B43legacy_PHYMODE_B:
2403 return "B";
2404 case B43legacy_PHYMODE_G:
2405 return "G";
2406 default:
2407 B43legacy_BUG_ON(1);
2408 }
2409 return "";
2410 }
2411
2412 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2413 unsigned int phymode,
2414 struct b43legacy_wldev **dev,
2415 bool *gmode)
2416 {
2417 struct b43legacy_wldev *d;
2418
2419 list_for_each_entry(d, &wl->devlist, list) {
2420 if (d->phy.possible_phymodes & phymode) {
2421 /* Ok, this device supports the PHY-mode.
2422 * Set the gmode bit. */
2423 *gmode = 1;
2424 *dev = d;
2425
2426 return 0;
2427 }
2428 }
2429
2430 return -ESRCH;
2431 }
2432
2433 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2434 {
2435 struct ssb_device *sdev = dev->dev;
2436 u32 tmslow;
2437
2438 tmslow = ssb_read32(sdev, SSB_TMSLOW);
2439 tmslow &= ~B43legacy_TMSLOW_GMODE;
2440 tmslow |= B43legacy_TMSLOW_PHYRESET;
2441 tmslow |= SSB_TMSLOW_FGC;
2442 ssb_write32(sdev, SSB_TMSLOW, tmslow);
2443 msleep(1);
2444
2445 tmslow = ssb_read32(sdev, SSB_TMSLOW);
2446 tmslow &= ~SSB_TMSLOW_FGC;
2447 tmslow |= B43legacy_TMSLOW_PHYRESET;
2448 ssb_write32(sdev, SSB_TMSLOW, tmslow);
2449 msleep(1);
2450 }
2451
2452 /* Expects wl->mutex locked */
2453 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2454 unsigned int new_mode)
2455 {
2456 struct b43legacy_wldev *up_dev;
2457 struct b43legacy_wldev *down_dev;
2458 int err;
2459 bool gmode = 0;
2460 int prev_status;
2461
2462 err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2463 if (err) {
2464 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2465 phymode_to_string(new_mode));
2466 return err;
2467 }
2468 if ((up_dev == wl->current_dev) &&
2469 (!!wl->current_dev->phy.gmode == !!gmode))
2470 /* This device is already running. */
2471 return 0;
2472 b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2473 phymode_to_string(new_mode));
2474 down_dev = wl->current_dev;
2475
2476 prev_status = b43legacy_status(down_dev);
2477 /* Shutdown the currently running core. */
2478 if (prev_status >= B43legacy_STAT_STARTED)
2479 b43legacy_wireless_core_stop(down_dev);
2480 if (prev_status >= B43legacy_STAT_INITIALIZED)
2481 b43legacy_wireless_core_exit(down_dev);
2482
2483 if (down_dev != up_dev)
2484 /* We switch to a different core, so we put PHY into
2485 * RESET on the old core. */
2486 b43legacy_put_phy_into_reset(down_dev);
2487
2488 /* Now start the new core. */
2489 up_dev->phy.gmode = gmode;
2490 if (prev_status >= B43legacy_STAT_INITIALIZED) {
2491 err = b43legacy_wireless_core_init(up_dev);
2492 if (err) {
2493 b43legacyerr(wl, "Fatal: Could not initialize device"
2494 " for newly selected %s-PHY mode\n",
2495 phymode_to_string(new_mode));
2496 goto init_failure;
2497 }
2498 }
2499 if (prev_status >= B43legacy_STAT_STARTED) {
2500 err = b43legacy_wireless_core_start(up_dev);
2501 if (err) {
2502 b43legacyerr(wl, "Fatal: Coult not start device for "
2503 "newly selected %s-PHY mode\n",
2504 phymode_to_string(new_mode));
2505 b43legacy_wireless_core_exit(up_dev);
2506 goto init_failure;
2507 }
2508 }
2509 B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2510
2511 b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2512
2513 wl->current_dev = up_dev;
2514
2515 return 0;
2516 init_failure:
2517 /* Whoops, failed to init the new core. No core is operating now. */
2518 wl->current_dev = NULL;
2519 return err;
2520 }
2521
2522 static int b43legacy_antenna_from_ieee80211(u8 antenna)
2523 {
2524 switch (antenna) {
2525 case 0: /* default/diversity */
2526 return B43legacy_ANTENNA_DEFAULT;
2527 case 1: /* Antenna 0 */
2528 return B43legacy_ANTENNA0;
2529 case 2: /* Antenna 1 */
2530 return B43legacy_ANTENNA1;
2531 default:
2532 return B43legacy_ANTENNA_DEFAULT;
2533 }
2534 }
2535
2536 static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2537 struct ieee80211_conf *conf)
2538 {
2539 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2540 struct b43legacy_wldev *dev;
2541 struct b43legacy_phy *phy;
2542 unsigned long flags;
2543 unsigned int new_phymode = 0xFFFF;
2544 int antenna_tx;
2545 int antenna_rx;
2546 int err = 0;
2547 u32 savedirqs;
2548
2549 antenna_tx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_tx);
2550 antenna_rx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_rx);
2551
2552 mutex_lock(&wl->mutex);
2553
2554 /* Switch the PHY mode (if necessary). */
2555 switch (conf->phymode) {
2556 case MODE_IEEE80211B:
2557 new_phymode = B43legacy_PHYMODE_B;
2558 break;
2559 case MODE_IEEE80211G:
2560 new_phymode = B43legacy_PHYMODE_G;
2561 break;
2562 default:
2563 B43legacy_WARN_ON(1);
2564 }
2565 err = b43legacy_switch_phymode(wl, new_phymode);
2566 if (err)
2567 goto out_unlock_mutex;
2568 dev = wl->current_dev;
2569 phy = &dev->phy;
2570
2571 /* Disable IRQs while reconfiguring the device.
2572 * This makes it possible to drop the spinlock throughout
2573 * the reconfiguration process. */
2574 spin_lock_irqsave(&wl->irq_lock, flags);
2575 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2576 spin_unlock_irqrestore(&wl->irq_lock, flags);
2577 goto out_unlock_mutex;
2578 }
2579 savedirqs = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
2580 spin_unlock_irqrestore(&wl->irq_lock, flags);
2581 b43legacy_synchronize_irq(dev);
2582
2583 /* Switch to the requested channel.
2584 * The firmware takes care of races with the TX handler. */
2585 if (conf->channel_val != phy->channel)
2586 b43legacy_radio_selectchannel(dev, conf->channel_val, 0);
2587
2588 /* Enable/Disable ShortSlot timing. */
2589 if ((!!(conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME))
2590 != dev->short_slot) {
2591 B43legacy_WARN_ON(phy->type != B43legacy_PHYTYPE_G);
2592 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME)
2593 b43legacy_short_slot_timing_enable(dev);
2594 else
2595 b43legacy_short_slot_timing_disable(dev);
2596 }
2597
2598 dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
2599
2600 /* Adjust the desired TX power level. */
2601 if (conf->power_level != 0) {
2602 if (conf->power_level != phy->power_level) {
2603 phy->power_level = conf->power_level;
2604 b43legacy_phy_xmitpower(dev);
2605 }
2606 }
2607
2608 /* Antennas for RX and management frame TX. */
2609 b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2610
2611 /* Update templates for AP mode. */
2612 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
2613 b43legacy_set_beacon_int(dev, conf->beacon_int);
2614
2615
2616 if (!!conf->radio_enabled != phy->radio_on) {
2617 if (conf->radio_enabled) {
2618 b43legacy_radio_turn_on(dev);
2619 b43legacyinfo(dev->wl, "Radio turned on by software\n");
2620 if (!dev->radio_hw_enable)
2621 b43legacyinfo(dev->wl, "The hardware RF-kill"
2622 " button still turns the radio"
2623 " physically off. Press the"
2624 " button to turn it on.\n");
2625 } else {
2626 b43legacy_radio_turn_off(dev, 0);
2627 b43legacyinfo(dev->wl, "Radio turned off by"
2628 " software\n");
2629 }
2630 }
2631
2632 spin_lock_irqsave(&wl->irq_lock, flags);
2633 b43legacy_interrupt_enable(dev, savedirqs);
2634 mmiowb();
2635 spin_unlock_irqrestore(&wl->irq_lock, flags);
2636 out_unlock_mutex:
2637 mutex_unlock(&wl->mutex);
2638
2639 return err;
2640 }
2641
2642 static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2643 unsigned int changed,
2644 unsigned int *fflags,
2645 int mc_count,
2646 struct dev_addr_list *mc_list)
2647 {
2648 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2649 struct b43legacy_wldev *dev = wl->current_dev;
2650 unsigned long flags;
2651
2652 if (!dev) {
2653 *fflags = 0;
2654 return;
2655 }
2656
2657 spin_lock_irqsave(&wl->irq_lock, flags);
2658 *fflags &= FIF_PROMISC_IN_BSS |
2659 FIF_ALLMULTI |
2660 FIF_FCSFAIL |
2661 FIF_PLCPFAIL |
2662 FIF_CONTROL |
2663 FIF_OTHER_BSS |
2664 FIF_BCN_PRBRESP_PROMISC;
2665
2666 changed &= FIF_PROMISC_IN_BSS |
2667 FIF_ALLMULTI |
2668 FIF_FCSFAIL |
2669 FIF_PLCPFAIL |
2670 FIF_CONTROL |
2671 FIF_OTHER_BSS |
2672 FIF_BCN_PRBRESP_PROMISC;
2673
2674 wl->filter_flags = *fflags;
2675
2676 if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2677 b43legacy_adjust_opmode(dev);
2678 spin_unlock_irqrestore(&wl->irq_lock, flags);
2679 }
2680
2681 static int b43legacy_op_config_interface(struct ieee80211_hw *hw,
2682 struct ieee80211_vif *vif,
2683 struct ieee80211_if_conf *conf)
2684 {
2685 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2686 struct b43legacy_wldev *dev = wl->current_dev;
2687 unsigned long flags;
2688
2689 if (!dev)
2690 return -ENODEV;
2691 mutex_lock(&wl->mutex);
2692 spin_lock_irqsave(&wl->irq_lock, flags);
2693 B43legacy_WARN_ON(wl->vif != vif);
2694 if (conf->bssid)
2695 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2696 else
2697 memset(wl->bssid, 0, ETH_ALEN);
2698 if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2699 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP)) {
2700 B43legacy_WARN_ON(conf->type != IEEE80211_IF_TYPE_AP);
2701 b43legacy_set_ssid(dev, conf->ssid, conf->ssid_len);
2702 if (conf->beacon)
2703 b43legacy_refresh_templates(dev, conf->beacon);
2704 }
2705 b43legacy_write_mac_bssid_templates(dev);
2706 }
2707 spin_unlock_irqrestore(&wl->irq_lock, flags);
2708 mutex_unlock(&wl->mutex);
2709
2710 return 0;
2711 }
2712
2713 /* Locking: wl->mutex */
2714 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2715 {
2716 struct b43legacy_wl *wl = dev->wl;
2717 unsigned long flags;
2718
2719 if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2720 return;
2721
2722 /* Disable and sync interrupts. We must do this before than
2723 * setting the status to INITIALIZED, as the interrupt handler
2724 * won't care about IRQs then. */
2725 spin_lock_irqsave(&wl->irq_lock, flags);
2726 dev->irq_savedstate = b43legacy_interrupt_disable(dev,
2727 B43legacy_IRQ_ALL);
2728 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2729 spin_unlock_irqrestore(&wl->irq_lock, flags);
2730 b43legacy_synchronize_irq(dev);
2731
2732 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2733
2734 mutex_unlock(&wl->mutex);
2735 /* Must unlock as it would otherwise deadlock. No races here.
2736 * Cancel the possibly running self-rearming periodic work. */
2737 cancel_delayed_work_sync(&dev->periodic_work);
2738 mutex_lock(&wl->mutex);
2739
2740 ieee80211_stop_queues(wl->hw); /* FIXME this could cause a deadlock */
2741
2742 b43legacy_mac_suspend(dev);
2743 free_irq(dev->dev->irq, dev);
2744 b43legacydbg(wl, "Wireless interface stopped\n");
2745 }
2746
2747 /* Locking: wl->mutex */
2748 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2749 {
2750 int err;
2751
2752 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2753
2754 drain_txstatus_queue(dev);
2755 err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2756 IRQF_SHARED, KBUILD_MODNAME, dev);
2757 if (err) {
2758 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2759 dev->dev->irq);
2760 goto out;
2761 }
2762 /* We are ready to run. */
2763 b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2764
2765 /* Start data flow (TX/RX) */
2766 b43legacy_mac_enable(dev);
2767 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
2768 ieee80211_start_queues(dev->wl->hw);
2769
2770 /* Start maintenance work */
2771 b43legacy_periodic_tasks_setup(dev);
2772
2773 b43legacydbg(dev->wl, "Wireless interface started\n");
2774 out:
2775 return err;
2776 }
2777
2778 /* Get PHY and RADIO versioning numbers */
2779 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2780 {
2781 struct b43legacy_phy *phy = &dev->phy;
2782 u32 tmp;
2783 u8 analog_type;
2784 u8 phy_type;
2785 u8 phy_rev;
2786 u16 radio_manuf;
2787 u16 radio_ver;
2788 u16 radio_rev;
2789 int unsupported = 0;
2790
2791 /* Get PHY versioning */
2792 tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2793 analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2794 >> B43legacy_PHYVER_ANALOG_SHIFT;
2795 phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
2796 phy_rev = (tmp & B43legacy_PHYVER_VERSION);
2797 switch (phy_type) {
2798 case B43legacy_PHYTYPE_B:
2799 if (phy_rev != 2 && phy_rev != 4
2800 && phy_rev != 6 && phy_rev != 7)
2801 unsupported = 1;
2802 break;
2803 case B43legacy_PHYTYPE_G:
2804 if (phy_rev > 8)
2805 unsupported = 1;
2806 break;
2807 default:
2808 unsupported = 1;
2809 };
2810 if (unsupported) {
2811 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
2812 "(Analog %u, Type %u, Revision %u)\n",
2813 analog_type, phy_type, phy_rev);
2814 return -EOPNOTSUPP;
2815 }
2816 b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
2817 analog_type, phy_type, phy_rev);
2818
2819
2820 /* Get RADIO versioning */
2821 if (dev->dev->bus->chip_id == 0x4317) {
2822 if (dev->dev->bus->chip_rev == 0)
2823 tmp = 0x3205017F;
2824 else if (dev->dev->bus->chip_rev == 1)
2825 tmp = 0x4205017F;
2826 else
2827 tmp = 0x5205017F;
2828 } else {
2829 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2830 B43legacy_RADIOCTL_ID);
2831 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
2832 tmp <<= 16;
2833 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2834 B43legacy_RADIOCTL_ID);
2835 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
2836 }
2837 radio_manuf = (tmp & 0x00000FFF);
2838 radio_ver = (tmp & 0x0FFFF000) >> 12;
2839 radio_rev = (tmp & 0xF0000000) >> 28;
2840 switch (phy_type) {
2841 case B43legacy_PHYTYPE_B:
2842 if ((radio_ver & 0xFFF0) != 0x2050)
2843 unsupported = 1;
2844 break;
2845 case B43legacy_PHYTYPE_G:
2846 if (radio_ver != 0x2050)
2847 unsupported = 1;
2848 break;
2849 default:
2850 B43legacy_BUG_ON(1);
2851 }
2852 if (unsupported) {
2853 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
2854 "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
2855 radio_manuf, radio_ver, radio_rev);
2856 return -EOPNOTSUPP;
2857 }
2858 b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
2859 " Revision %u\n", radio_manuf, radio_ver, radio_rev);
2860
2861
2862 phy->radio_manuf = radio_manuf;
2863 phy->radio_ver = radio_ver;
2864 phy->radio_rev = radio_rev;
2865
2866 phy->analog = analog_type;
2867 phy->type = phy_type;
2868 phy->rev = phy_rev;
2869
2870 return 0;
2871 }
2872
2873 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
2874 struct b43legacy_phy *phy)
2875 {
2876 struct b43legacy_lopair *lo;
2877 int i;
2878
2879 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
2880 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
2881
2882 /* Assume the radio is enabled. If it's not enabled, the state will
2883 * immediately get fixed on the first periodic work run. */
2884 dev->radio_hw_enable = 1;
2885
2886 phy->savedpctlreg = 0xFFFF;
2887 phy->aci_enable = 0;
2888 phy->aci_wlan_automatic = 0;
2889 phy->aci_hw_rssi = 0;
2890
2891 lo = phy->_lo_pairs;
2892 if (lo)
2893 memset(lo, 0, sizeof(struct b43legacy_lopair) *
2894 B43legacy_LO_COUNT);
2895 phy->max_lb_gain = 0;
2896 phy->trsw_rx_gain = 0;
2897
2898 /* Set default attenuation values. */
2899 phy->bbatt = b43legacy_default_baseband_attenuation(dev);
2900 phy->rfatt = b43legacy_default_radio_attenuation(dev);
2901 phy->txctl1 = b43legacy_default_txctl1(dev);
2902 phy->txpwr_offset = 0;
2903
2904 /* NRSSI */
2905 phy->nrssislope = 0;
2906 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
2907 phy->nrssi[i] = -1000;
2908 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
2909 phy->nrssi_lt[i] = i;
2910
2911 phy->lofcal = 0xFFFF;
2912 phy->initval = 0xFFFF;
2913
2914 phy->interfmode = B43legacy_INTERFMODE_NONE;
2915 phy->channel = 0xFF;
2916 }
2917
2918 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
2919 {
2920 /* Flags */
2921 dev->reg124_set_0x4 = 0;
2922
2923 /* Stats */
2924 memset(&dev->stats, 0, sizeof(dev->stats));
2925
2926 setup_struct_phy_for_init(dev, &dev->phy);
2927
2928 /* IRQ related flags */
2929 dev->irq_reason = 0;
2930 memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
2931 dev->irq_savedstate = B43legacy_IRQ_MASKTEMPLATE;
2932
2933 dev->mac_suspended = 1;
2934
2935 /* Noise calculation context */
2936 memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
2937 }
2938
2939 static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev *dev)
2940 {
2941 #ifdef CONFIG_SSB_DRIVER_PCICORE
2942 struct ssb_bus *bus = dev->dev->bus;
2943 u32 tmp;
2944
2945 if (bus->pcicore.dev &&
2946 bus->pcicore.dev->id.coreid == SSB_DEV_PCI &&
2947 bus->pcicore.dev->id.revision <= 5) {
2948 /* IMCFGLO timeouts workaround. */
2949 tmp = ssb_read32(dev->dev, SSB_IMCFGLO);
2950 tmp &= ~SSB_IMCFGLO_REQTO;
2951 tmp &= ~SSB_IMCFGLO_SERTO;
2952 switch (bus->bustype) {
2953 case SSB_BUSTYPE_PCI:
2954 case SSB_BUSTYPE_PCMCIA:
2955 tmp |= 0x32;
2956 break;
2957 case SSB_BUSTYPE_SSB:
2958 tmp |= 0x53;
2959 break;
2960 }
2961 ssb_write32(dev->dev, SSB_IMCFGLO, tmp);
2962 }
2963 #endif /* CONFIG_SSB_DRIVER_PCICORE */
2964 }
2965
2966 /* Write the short and long frame retry limit values. */
2967 static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2968 unsigned int short_retry,
2969 unsigned int long_retry)
2970 {
2971 /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2972 * the chip-internal counter. */
2973 short_retry = min(short_retry, (unsigned int)0xF);
2974 long_retry = min(long_retry, (unsigned int)0xF);
2975
2976 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
2977 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
2978 }
2979
2980 /* Shutdown a wireless core */
2981 /* Locking: wl->mutex */
2982 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
2983 {
2984 struct b43legacy_wl *wl = dev->wl;
2985 struct b43legacy_phy *phy = &dev->phy;
2986 u32 macctl;
2987
2988 B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
2989 if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
2990 return;
2991 b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
2992
2993 /* Stop the microcode PSM. */
2994 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2995 macctl &= ~B43legacy_MACCTL_PSM_RUN;
2996 macctl |= B43legacy_MACCTL_PSM_JMP0;
2997 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2998
2999 mutex_unlock(&wl->mutex);
3000 /* Must unlock as it would otherwise deadlock. No races here.
3001 * Cancel possibly pending workqueues. */
3002 cancel_work_sync(&dev->restart_work);
3003 mutex_lock(&wl->mutex);
3004
3005 b43legacy_leds_exit(dev);
3006 b43legacy_rng_exit(dev->wl);
3007 b43legacy_pio_free(dev);
3008 b43legacy_dma_free(dev);
3009 b43legacy_chip_exit(dev);
3010 b43legacy_radio_turn_off(dev, 1);
3011 b43legacy_switch_analog(dev, 0);
3012 if (phy->dyn_tssi_tbl)
3013 kfree(phy->tssi2dbm);
3014 kfree(phy->lo_control);
3015 phy->lo_control = NULL;
3016 ssb_device_disable(dev->dev, 0);
3017 ssb_bus_may_powerdown(dev->dev->bus);
3018 }
3019
3020 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3021 {
3022 struct b43legacy_phy *phy = &dev->phy;
3023 int i;
3024
3025 /* Set default attenuation values. */
3026 phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3027 phy->rfatt = b43legacy_default_radio_attenuation(dev);
3028 phy->txctl1 = b43legacy_default_txctl1(dev);
3029 phy->txctl2 = 0xFFFF;
3030 phy->txpwr_offset = 0;
3031
3032 /* NRSSI */
3033 phy->nrssislope = 0;
3034 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3035 phy->nrssi[i] = -1000;
3036 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3037 phy->nrssi_lt[i] = i;
3038
3039 phy->lofcal = 0xFFFF;
3040 phy->initval = 0xFFFF;
3041
3042 phy->aci_enable = 0;
3043 phy->aci_wlan_automatic = 0;
3044 phy->aci_hw_rssi = 0;
3045
3046 phy->antenna_diversity = 0xFFFF;
3047 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3048 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3049
3050 /* Flags */
3051 phy->calibrated = 0;
3052
3053 if (phy->_lo_pairs)
3054 memset(phy->_lo_pairs, 0,
3055 sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3056 memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3057 }
3058
3059 /* Initialize a wireless core */
3060 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3061 {
3062 struct b43legacy_wl *wl = dev->wl;
3063 struct ssb_bus *bus = dev->dev->bus;
3064 struct b43legacy_phy *phy = &dev->phy;
3065 struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3066 int err;
3067 u32 hf;
3068 u32 tmp;
3069
3070 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3071
3072 err = ssb_bus_powerup(bus, 0);
3073 if (err)
3074 goto out;
3075 if (!ssb_device_is_enabled(dev->dev)) {
3076 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3077 b43legacy_wireless_core_reset(dev, tmp);
3078 }
3079
3080 if ((phy->type == B43legacy_PHYTYPE_B) ||
3081 (phy->type == B43legacy_PHYTYPE_G)) {
3082 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3083 * B43legacy_LO_COUNT,
3084 GFP_KERNEL);
3085 if (!phy->_lo_pairs)
3086 return -ENOMEM;
3087 }
3088 setup_struct_wldev_for_init(dev);
3089
3090 err = b43legacy_phy_init_tssi2dbm_table(dev);
3091 if (err)
3092 goto err_kfree_lo_control;
3093
3094 /* Enable IRQ routing to this device. */
3095 ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3096
3097 b43legacy_imcfglo_timeouts_workaround(dev);
3098 prepare_phy_data_for_init(dev);
3099 b43legacy_phy_calibrate(dev);
3100 err = b43legacy_chip_init(dev);
3101 if (err)
3102 goto err_kfree_tssitbl;
3103 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3104 B43legacy_SHM_SH_WLCOREREV,
3105 dev->dev->id.revision);
3106 hf = b43legacy_hf_read(dev);
3107 if (phy->type == B43legacy_PHYTYPE_G) {
3108 hf |= B43legacy_HF_SYMW;
3109 if (phy->rev == 1)
3110 hf |= B43legacy_HF_GDCW;
3111 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3112 hf |= B43legacy_HF_OFDMPABOOST;
3113 } else if (phy->type == B43legacy_PHYTYPE_B) {
3114 hf |= B43legacy_HF_SYMW;
3115 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3116 hf &= ~B43legacy_HF_GDCW;
3117 }
3118 b43legacy_hf_write(dev, hf);
3119
3120 b43legacy_set_retry_limits(dev,
3121 B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3122 B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3123
3124 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3125 0x0044, 3);
3126 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3127 0x0046, 2);
3128
3129 /* Disable sending probe responses from firmware.
3130 * Setting the MaxTime to one usec will always trigger
3131 * a timeout, so we never send any probe resp.
3132 * A timeout of zero is infinite. */
3133 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3134 B43legacy_SHM_SH_PRMAXTIME, 1);
3135
3136 b43legacy_rate_memory_init(dev);
3137
3138 /* Minimum Contention Window */
3139 if (phy->type == B43legacy_PHYTYPE_B)
3140 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3141 0x0003, 31);
3142 else
3143 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3144 0x0003, 15);
3145 /* Maximum Contention Window */
3146 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3147 0x0004, 1023);
3148
3149 do {
3150 if (b43legacy_using_pio(dev))
3151 err = b43legacy_pio_init(dev);
3152 else {
3153 err = b43legacy_dma_init(dev);
3154 if (!err)
3155 b43legacy_qos_init(dev);
3156 }
3157 } while (err == -EAGAIN);
3158 if (err)
3159 goto err_chip_exit;
3160
3161 b43legacy_write16(dev, 0x0612, 0x0050);
3162 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0416, 0x0050);
3163 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0414, 0x01F4);
3164
3165 ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3166 b43legacy_upload_card_macaddress(dev);
3167 b43legacy_security_init(dev);
3168 b43legacy_rng_init(wl);
3169
3170 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3171
3172 b43legacy_leds_init(dev);
3173 out:
3174 return err;
3175
3176 err_chip_exit:
3177 b43legacy_chip_exit(dev);
3178 err_kfree_tssitbl:
3179 if (phy->dyn_tssi_tbl)
3180 kfree(phy->tssi2dbm);
3181 err_kfree_lo_control:
3182 kfree(phy->lo_control);
3183 phy->lo_control = NULL;
3184 ssb_bus_may_powerdown(bus);
3185 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3186 return err;
3187 }
3188
3189 static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3190 struct ieee80211_if_init_conf *conf)
3191 {
3192 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3193 struct b43legacy_wldev *dev;
3194 unsigned long flags;
3195 int err = -EOPNOTSUPP;
3196
3197 /* TODO: allow WDS/AP devices to coexist */
3198
3199 if (conf->type != IEEE80211_IF_TYPE_AP &&
3200 conf->type != IEEE80211_IF_TYPE_STA &&
3201 conf->type != IEEE80211_IF_TYPE_WDS &&
3202 conf->type != IEEE80211_IF_TYPE_IBSS)
3203 return -EOPNOTSUPP;
3204
3205 mutex_lock(&wl->mutex);
3206 if (wl->operating)
3207 goto out_mutex_unlock;
3208
3209 b43legacydbg(wl, "Adding Interface type %d\n", conf->type);
3210
3211 dev = wl->current_dev;
3212 wl->operating = 1;
3213 wl->vif = conf->vif;
3214 wl->if_type = conf->type;
3215 memcpy(wl->mac_addr, conf->mac_addr, ETH_ALEN);
3216
3217 spin_lock_irqsave(&wl->irq_lock, flags);
3218 b43legacy_adjust_opmode(dev);
3219 b43legacy_upload_card_macaddress(dev);
3220 spin_unlock_irqrestore(&wl->irq_lock, flags);
3221
3222 err = 0;
3223 out_mutex_unlock:
3224 mutex_unlock(&wl->mutex);
3225
3226 return err;
3227 }
3228
3229 static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3230 struct ieee80211_if_init_conf *conf)
3231 {
3232 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3233 struct b43legacy_wldev *dev = wl->current_dev;
3234 unsigned long flags;
3235
3236 b43legacydbg(wl, "Removing Interface type %d\n", conf->type);
3237
3238 mutex_lock(&wl->mutex);
3239
3240 B43legacy_WARN_ON(!wl->operating);
3241 B43legacy_WARN_ON(wl->vif != conf->vif);
3242 wl->vif = NULL;
3243
3244 wl->operating = 0;
3245
3246 spin_lock_irqsave(&wl->irq_lock, flags);
3247 b43legacy_adjust_opmode(dev);
3248 memset(wl->mac_addr, 0, ETH_ALEN);
3249 b43legacy_upload_card_macaddress(dev);
3250 spin_unlock_irqrestore(&wl->irq_lock, flags);
3251
3252 mutex_unlock(&wl->mutex);
3253 }
3254
3255 static int b43legacy_op_start(struct ieee80211_hw *hw)
3256 {
3257 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3258 struct b43legacy_wldev *dev = wl->current_dev;
3259 int did_init = 0;
3260 int err = 0;
3261 bool do_rfkill_exit = 0;
3262
3263 /* First register RFkill.
3264 * LEDs that are registered later depend on it. */
3265 b43legacy_rfkill_init(dev);
3266
3267 /* Kill all old instance specific information to make sure
3268 * the card won't use it in the short timeframe between start
3269 * and mac80211 reconfiguring it. */
3270 memset(wl->bssid, 0, ETH_ALEN);
3271 memset(wl->mac_addr, 0, ETH_ALEN);
3272 wl->filter_flags = 0;
3273
3274 mutex_lock(&wl->mutex);
3275
3276 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3277 err = b43legacy_wireless_core_init(dev);
3278 if (err) {
3279 do_rfkill_exit = 1;
3280 goto out_mutex_unlock;
3281 }
3282 did_init = 1;
3283 }
3284
3285 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3286 err = b43legacy_wireless_core_start(dev);
3287 if (err) {
3288 if (did_init)
3289 b43legacy_wireless_core_exit(dev);
3290 do_rfkill_exit = 1;
3291 goto out_mutex_unlock;
3292 }
3293 }
3294
3295 out_mutex_unlock:
3296 mutex_unlock(&wl->mutex);
3297
3298 if (do_rfkill_exit)
3299 b43legacy_rfkill_exit(dev);
3300
3301 return err;
3302 }
3303
3304 static void b43legacy_op_stop(struct ieee80211_hw *hw)
3305 {
3306 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3307 struct b43legacy_wldev *dev = wl->current_dev;
3308
3309 b43legacy_rfkill_exit(dev);
3310
3311 mutex_lock(&wl->mutex);
3312 if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3313 b43legacy_wireless_core_stop(dev);
3314 b43legacy_wireless_core_exit(dev);
3315 mutex_unlock(&wl->mutex);
3316 }
3317
3318 static int b43legacy_op_set_retry_limit(struct ieee80211_hw *hw,
3319 u32 short_retry_limit,
3320 u32 long_retry_limit)
3321 {
3322 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3323 struct b43legacy_wldev *dev;
3324 int err = 0;
3325
3326 mutex_lock(&wl->mutex);
3327 dev = wl->current_dev;
3328 if (unlikely(!dev ||
3329 (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED))) {
3330 err = -ENODEV;
3331 goto out_unlock;
3332 }
3333 b43legacy_set_retry_limits(dev, short_retry_limit, long_retry_limit);
3334 out_unlock:
3335 mutex_unlock(&wl->mutex);
3336
3337 return err;
3338 }
3339
3340 static const struct ieee80211_ops b43legacy_hw_ops = {
3341 .tx = b43legacy_op_tx,
3342 .conf_tx = b43legacy_op_conf_tx,
3343 .add_interface = b43legacy_op_add_interface,
3344 .remove_interface = b43legacy_op_remove_interface,
3345 .config = b43legacy_op_dev_config,
3346 .config_interface = b43legacy_op_config_interface,
3347 .configure_filter = b43legacy_op_configure_filter,
3348 .get_stats = b43legacy_op_get_stats,
3349 .get_tx_stats = b43legacy_op_get_tx_stats,
3350 .start = b43legacy_op_start,
3351 .stop = b43legacy_op_stop,
3352 .set_retry_limit = b43legacy_op_set_retry_limit,
3353 };
3354
3355 /* Hard-reset the chip. Do not call this directly.
3356 * Use b43legacy_controller_restart()
3357 */
3358 static void b43legacy_chip_reset(struct work_struct *work)
3359 {
3360 struct b43legacy_wldev *dev =
3361 container_of(work, struct b43legacy_wldev, restart_work);
3362 struct b43legacy_wl *wl = dev->wl;
3363 int err = 0;
3364 int prev_status;
3365
3366 mutex_lock(&wl->mutex);
3367
3368 prev_status = b43legacy_status(dev);
3369 /* Bring the device down... */
3370 if (prev_status >= B43legacy_STAT_STARTED)
3371 b43legacy_wireless_core_stop(dev);
3372 if (prev_status >= B43legacy_STAT_INITIALIZED)
3373 b43legacy_wireless_core_exit(dev);
3374
3375 /* ...and up again. */
3376 if (prev_status >= B43legacy_STAT_INITIALIZED) {
3377 err = b43legacy_wireless_core_init(dev);
3378 if (err)
3379 goto out;
3380 }
3381 if (prev_status >= B43legacy_STAT_STARTED) {
3382 err = b43legacy_wireless_core_start(dev);
3383 if (err) {
3384 b43legacy_wireless_core_exit(dev);
3385 goto out;
3386 }
3387 }
3388 out:
3389 mutex_unlock(&wl->mutex);
3390 if (err)
3391 b43legacyerr(wl, "Controller restart FAILED\n");
3392 else
3393 b43legacyinfo(wl, "Controller restarted\n");
3394 }
3395
3396 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3397 int have_bphy,
3398 int have_gphy)
3399 {
3400 struct ieee80211_hw *hw = dev->wl->hw;
3401 struct ieee80211_hw_mode *mode;
3402 struct b43legacy_phy *phy = &dev->phy;
3403 int cnt = 0;
3404 int err;
3405
3406 phy->possible_phymodes = 0;
3407 for (; 1; cnt++) {
3408 if (have_bphy) {
3409 B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3410 mode = &phy->hwmodes[cnt];
3411
3412 mode->mode = MODE_IEEE80211B;
3413 mode->num_channels = b43legacy_bg_chantable_size;
3414 mode->channels = b43legacy_bg_chantable;
3415 mode->num_rates = b43legacy_b_ratetable_size;
3416 mode->rates = b43legacy_b_ratetable;
3417 err = ieee80211_register_hwmode(hw, mode);
3418 if (err)
3419 return err;
3420
3421 phy->possible_phymodes |= B43legacy_PHYMODE_B;
3422 have_bphy = 0;
3423 continue;
3424 }
3425 if (have_gphy) {
3426 B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3427 mode = &phy->hwmodes[cnt];
3428
3429 mode->mode = MODE_IEEE80211G;
3430 mode->num_channels = b43legacy_bg_chantable_size;
3431 mode->channels = b43legacy_bg_chantable;
3432 mode->num_rates = b43legacy_g_ratetable_size;
3433 mode->rates = b43legacy_g_ratetable;
3434 err = ieee80211_register_hwmode(hw, mode);
3435 if (err)
3436 return err;
3437
3438 phy->possible_phymodes |= B43legacy_PHYMODE_G;
3439 have_gphy = 0;
3440 continue;
3441 }
3442 break;
3443 }
3444
3445 return 0;
3446 }
3447
3448 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3449 {
3450 /* We release firmware that late to not be required to re-request
3451 * is all the time when we reinit the core. */
3452 b43legacy_release_firmware(dev);
3453 }
3454
3455 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3456 {
3457 struct b43legacy_wl *wl = dev->wl;
3458 struct ssb_bus *bus = dev->dev->bus;
3459 struct pci_dev *pdev = bus->host_pci;
3460 int err;
3461 int have_bphy = 0;
3462 int have_gphy = 0;
3463 u32 tmp;
3464
3465 /* Do NOT do any device initialization here.
3466 * Do it in wireless_core_init() instead.
3467 * This function is for gathering basic information about the HW, only.
3468 * Also some structs may be set up here. But most likely you want to
3469 * have that in core_init(), too.
3470 */
3471
3472 err = ssb_bus_powerup(bus, 0);
3473 if (err) {
3474 b43legacyerr(wl, "Bus powerup failed\n");
3475 goto out;
3476 }
3477 /* Get the PHY type. */
3478 if (dev->dev->id.revision >= 5) {
3479 u32 tmshigh;
3480
3481 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3482 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3483 if (!have_gphy)
3484 have_bphy = 1;
3485 } else if (dev->dev->id.revision == 4)
3486 have_gphy = 1;
3487 else
3488 have_bphy = 1;
3489
3490 dev->phy.gmode = (have_gphy || have_bphy);
3491 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3492 b43legacy_wireless_core_reset(dev, tmp);
3493
3494 err = b43legacy_phy_versioning(dev);
3495 if (err)
3496 goto err_powerdown;
3497 /* Check if this device supports multiband. */
3498 if (!pdev ||
3499 (pdev->device != 0x4312 &&
3500 pdev->device != 0x4319 &&
3501 pdev->device != 0x4324)) {
3502 /* No multiband support. */
3503 have_bphy = 0;
3504 have_gphy = 0;
3505 switch (dev->phy.type) {
3506 case B43legacy_PHYTYPE_B:
3507 have_bphy = 1;
3508 break;
3509 case B43legacy_PHYTYPE_G:
3510 have_gphy = 1;
3511 break;
3512 default:
3513 B43legacy_BUG_ON(1);
3514 }
3515 }
3516 dev->phy.gmode = (have_gphy || have_bphy);
3517 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3518 b43legacy_wireless_core_reset(dev, tmp);
3519
3520 err = b43legacy_validate_chipaccess(dev);
3521 if (err)
3522 goto err_powerdown;
3523 err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3524 if (err)
3525 goto err_powerdown;
3526
3527 /* Now set some default "current_dev" */
3528 if (!wl->current_dev)
3529 wl->current_dev = dev;
3530 INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3531
3532 b43legacy_radio_turn_off(dev, 1);
3533 b43legacy_switch_analog(dev, 0);
3534 ssb_device_disable(dev->dev, 0);
3535 ssb_bus_may_powerdown(bus);
3536
3537 out:
3538 return err;
3539
3540 err_powerdown:
3541 ssb_bus_may_powerdown(bus);
3542 return err;
3543 }
3544
3545 static void b43legacy_one_core_detach(struct ssb_device *dev)
3546 {
3547 struct b43legacy_wldev *wldev;
3548 struct b43legacy_wl *wl;
3549
3550 wldev = ssb_get_drvdata(dev);
3551 wl = wldev->wl;
3552 cancel_work_sync(&wldev->restart_work);
3553 b43legacy_debugfs_remove_device(wldev);
3554 b43legacy_wireless_core_detach(wldev);
3555 list_del(&wldev->list);
3556 wl->nr_devs--;
3557 ssb_set_drvdata(dev, NULL);
3558 kfree(wldev);
3559 }
3560
3561 static int b43legacy_one_core_attach(struct ssb_device *dev,
3562 struct b43legacy_wl *wl)
3563 {
3564 struct b43legacy_wldev *wldev;
3565 struct pci_dev *pdev;
3566 int err = -ENOMEM;
3567
3568 if (!list_empty(&wl->devlist)) {
3569 /* We are not the first core on this chip. */
3570 pdev = dev->bus->host_pci;
3571 /* Only special chips support more than one wireless
3572 * core, although some of the other chips have more than
3573 * one wireless core as well. Check for this and
3574 * bail out early.
3575 */
3576 if (!pdev ||
3577 ((pdev->device != 0x4321) &&
3578 (pdev->device != 0x4313) &&
3579 (pdev->device != 0x431A))) {
3580 b43legacydbg(wl, "Ignoring unconnected 802.11 core\n");
3581 return -ENODEV;
3582 }
3583 }
3584
3585 wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3586 if (!wldev)
3587 goto out;
3588
3589 wldev->dev = dev;
3590 wldev->wl = wl;
3591 b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3592 wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3593 tasklet_init(&wldev->isr_tasklet,
3594 (void (*)(unsigned long))b43legacy_interrupt_tasklet,
3595 (unsigned long)wldev);
3596 if (modparam_pio)
3597 wldev->__using_pio = 1;
3598 INIT_LIST_HEAD(&wldev->list);
3599
3600 err = b43legacy_wireless_core_attach(wldev);
3601 if (err)
3602 goto err_kfree_wldev;
3603
3604 list_add(&wldev->list, &wl->devlist);
3605 wl->nr_devs++;
3606 ssb_set_drvdata(dev, wldev);
3607 b43legacy_debugfs_add_device(wldev);
3608 out:
3609 return err;
3610
3611 err_kfree_wldev:
3612 kfree(wldev);
3613 return err;
3614 }
3615
3616 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3617 {
3618 /* boardflags workarounds */
3619 if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3620 bus->boardinfo.type == 0x4E &&
3621 bus->boardinfo.rev > 0x40)
3622 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3623 }
3624
3625 static void b43legacy_wireless_exit(struct ssb_device *dev,
3626 struct b43legacy_wl *wl)
3627 {
3628 struct ieee80211_hw *hw = wl->hw;
3629
3630 ssb_set_devtypedata(dev, NULL);
3631 ieee80211_free_hw(hw);
3632 }
3633
3634 static int b43legacy_wireless_init(struct ssb_device *dev)
3635 {
3636 struct ssb_sprom *sprom = &dev->bus->sprom;
3637 struct ieee80211_hw *hw;
3638 struct b43legacy_wl *wl;
3639 int err = -ENOMEM;
3640
3641 b43legacy_sprom_fixup(dev->bus);
3642
3643 hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3644 if (!hw) {
3645 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3646 goto out;
3647 }
3648
3649 /* fill hw info */
3650 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
3651 IEEE80211_HW_RX_INCLUDES_FCS;
3652 hw->max_signal = 100;
3653 hw->max_rssi = -110;
3654 hw->max_noise = -110;
3655 hw->queues = 1; /* FIXME: hardware has more queues */
3656 SET_IEEE80211_DEV(hw, dev->dev);
3657 if (is_valid_ether_addr(sprom->et1mac))
3658 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3659 else
3660 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3661
3662 /* Get and initialize struct b43legacy_wl */
3663 wl = hw_to_b43legacy_wl(hw);
3664 memset(wl, 0, sizeof(*wl));
3665 wl->hw = hw;
3666 spin_lock_init(&wl->irq_lock);
3667 spin_lock_init(&wl->leds_lock);
3668 mutex_init(&wl->mutex);
3669 INIT_LIST_HEAD(&wl->devlist);
3670
3671 ssb_set_devtypedata(dev, wl);
3672 b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id);
3673 err = 0;
3674 out:
3675 return err;
3676 }
3677
3678 static int b43legacy_probe(struct ssb_device *dev,
3679 const struct ssb_device_id *id)
3680 {
3681 struct b43legacy_wl *wl;
3682 int err;
3683 int first = 0;
3684
3685 wl = ssb_get_devtypedata(dev);
3686 if (!wl) {
3687 /* Probing the first core - setup common struct b43legacy_wl */
3688 first = 1;
3689 err = b43legacy_wireless_init(dev);
3690 if (err)
3691 goto out;
3692 wl = ssb_get_devtypedata(dev);
3693 B43legacy_WARN_ON(!wl);
3694 }
3695 err = b43legacy_one_core_attach(dev, wl);
3696 if (err)
3697 goto err_wireless_exit;
3698
3699 if (first) {
3700 err = ieee80211_register_hw(wl->hw);
3701 if (err)
3702 goto err_one_core_detach;
3703 }
3704
3705 out:
3706 return err;
3707
3708 err_one_core_detach:
3709 b43legacy_one_core_detach(dev);
3710 err_wireless_exit:
3711 if (first)
3712 b43legacy_wireless_exit(dev, wl);
3713 return err;
3714 }
3715
3716 static void b43legacy_remove(struct ssb_device *dev)
3717 {
3718 struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3719 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3720
3721 B43legacy_WARN_ON(!wl);
3722 if (wl->current_dev == wldev)
3723 ieee80211_unregister_hw(wl->hw);
3724
3725 b43legacy_one_core_detach(dev);
3726
3727 if (list_empty(&wl->devlist))
3728 /* Last core on the chip unregistered.
3729 * We can destroy common struct b43legacy_wl.
3730 */
3731 b43legacy_wireless_exit(dev, wl);
3732 }
3733
3734 /* Perform a hardware reset. This can be called from any context. */
3735 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3736 const char *reason)
3737 {
3738 /* Must avoid requeueing, if we are in shutdown. */
3739 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3740 return;
3741 b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3742 queue_work(dev->wl->hw->workqueue, &dev->restart_work);
3743 }
3744
3745 #ifdef CONFIG_PM
3746
3747 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3748 {
3749 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3750 struct b43legacy_wl *wl = wldev->wl;
3751
3752 b43legacydbg(wl, "Suspending...\n");
3753
3754 mutex_lock(&wl->mutex);
3755 wldev->suspend_init_status = b43legacy_status(wldev);
3756 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3757 b43legacy_wireless_core_stop(wldev);
3758 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3759 b43legacy_wireless_core_exit(wldev);
3760 mutex_unlock(&wl->mutex);
3761
3762 b43legacydbg(wl, "Device suspended.\n");
3763
3764 return 0;
3765 }
3766
3767 static int b43legacy_resume(struct ssb_device *dev)
3768 {
3769 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3770 struct b43legacy_wl *wl = wldev->wl;
3771 int err = 0;
3772
3773 b43legacydbg(wl, "Resuming...\n");
3774
3775 mutex_lock(&wl->mutex);
3776 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3777 err = b43legacy_wireless_core_init(wldev);
3778 if (err) {
3779 b43legacyerr(wl, "Resume failed at core init\n");
3780 goto out;
3781 }
3782 }
3783 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3784 err = b43legacy_wireless_core_start(wldev);
3785 if (err) {
3786 b43legacy_wireless_core_exit(wldev);
3787 b43legacyerr(wl, "Resume failed at core start\n");
3788 goto out;
3789 }
3790 }
3791 mutex_unlock(&wl->mutex);
3792
3793 b43legacydbg(wl, "Device resumed.\n");
3794 out:
3795 return err;
3796 }
3797
3798 #else /* CONFIG_PM */
3799 # define b43legacy_suspend NULL
3800 # define b43legacy_resume NULL
3801 #endif /* CONFIG_PM */
3802
3803 static struct ssb_driver b43legacy_ssb_driver = {
3804 .name = KBUILD_MODNAME,
3805 .id_table = b43legacy_ssb_tbl,
3806 .probe = b43legacy_probe,
3807 .remove = b43legacy_remove,
3808 .suspend = b43legacy_suspend,
3809 .resume = b43legacy_resume,
3810 };
3811
3812 static void b43legacy_print_driverinfo(void)
3813 {
3814 const char *feat_pci = "", *feat_leds = "", *feat_rfkill = "",
3815 *feat_pio = "", *feat_dma = "";
3816
3817 #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
3818 feat_pci = "P";
3819 #endif
3820 #ifdef CONFIG_B43LEGACY_LEDS
3821 feat_leds = "L";
3822 #endif
3823 #ifdef CONFIG_B43LEGACY_RFKILL
3824 feat_rfkill = "R";
3825 #endif
3826 #ifdef CONFIG_B43LEGACY_PIO
3827 feat_pio = "I";
3828 #endif
3829 #ifdef CONFIG_B43LEGACY_DMA
3830 feat_dma = "D";
3831 #endif
3832 printk(KERN_INFO "Broadcom 43xx-legacy driver loaded "
3833 "[ Features: %s%s%s%s%s, Firmware-ID: "
3834 B43legacy_SUPPORTED_FIRMWARE_ID " ]\n",
3835 feat_pci, feat_leds, feat_rfkill, feat_pio, feat_dma);
3836 }
3837
3838 static int __init b43legacy_init(void)
3839 {
3840 int err;
3841
3842 b43legacy_debugfs_init();
3843
3844 err = ssb_driver_register(&b43legacy_ssb_driver);
3845 if (err)
3846 goto err_dfs_exit;
3847
3848 b43legacy_print_driverinfo();
3849
3850 return err;
3851
3852 err_dfs_exit:
3853 b43legacy_debugfs_exit();
3854 return err;
3855 }
3856
3857 static void __exit b43legacy_exit(void)
3858 {
3859 ssb_driver_unregister(&b43legacy_ssb_driver);
3860 b43legacy_debugfs_exit();
3861 }
3862
3863 module_init(b43legacy_init)
3864 module_exit(b43legacy_exit)
WRT350N Kernel Patches