powerpc: use consistent types in mktree
[zen-stable.git] / drivers / gpu / drm / i915 / dvo_sil164.c
blobe1c1f7341e5cff60a15fb568e7a0dd322782ef91
1 /**************************************************************************
3 Copyright © 2006 Dave Airlie
5 All Rights Reserved.
7 Permission is hereby granted, free of charge, to any person obtaining a
8 copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sub license, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial portions
17 of the Software.
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
23 ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **************************************************************************/
29 #include "dvo.h"
31 #define SIL164_VID 0x0001
32 #define SIL164_DID 0x0006
34 #define SIL164_VID_LO 0x00
35 #define SIL164_VID_HI 0x01
36 #define SIL164_DID_LO 0x02
37 #define SIL164_DID_HI 0x03
38 #define SIL164_REV 0x04
39 #define SIL164_RSVD 0x05
40 #define SIL164_FREQ_LO 0x06
41 #define SIL164_FREQ_HI 0x07
43 #define SIL164_REG8 0x08
44 #define SIL164_8_VEN (1<<5)
45 #define SIL164_8_HEN (1<<4)
46 #define SIL164_8_DSEL (1<<3)
47 #define SIL164_8_BSEL (1<<2)
48 #define SIL164_8_EDGE (1<<1)
49 #define SIL164_8_PD (1<<0)
51 #define SIL164_REG9 0x09
52 #define SIL164_9_VLOW (1<<7)
53 #define SIL164_9_MSEL_MASK (0x7<<4)
54 #define SIL164_9_TSEL (1<<3)
55 #define SIL164_9_RSEN (1<<2)
56 #define SIL164_9_HTPLG (1<<1)
57 #define SIL164_9_MDI (1<<0)
59 #define SIL164_REGC 0x0c
61 struct sil164_save_rec {
62 uint8_t reg8;
63 uint8_t reg9;
64 uint8_t regc;
67 struct sil164_priv {
68 //I2CDevRec d;
69 bool quiet;
70 struct sil164_save_rec save_regs;
71 struct sil164_save_rec mode_regs;
74 #define SILPTR(d) ((SIL164Ptr)(d->DriverPrivate.ptr))
76 static bool sil164_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
78 struct sil164_priv *sil = dvo->dev_priv;
79 struct i2c_adapter *adapter = dvo->i2c_bus;
80 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
81 u8 out_buf[2];
82 u8 in_buf[2];
84 struct i2c_msg msgs[] = {
86 .addr = dvo->slave_addr,
87 .flags = 0,
88 .len = 1,
89 .buf = out_buf,
92 .addr = dvo->slave_addr,
93 .flags = I2C_M_RD,
94 .len = 1,
95 .buf = in_buf,
99 out_buf[0] = addr;
100 out_buf[1] = 0;
102 if (i2c_transfer(&i2cbus->adapter, msgs, 2) == 2) {
103 *ch = in_buf[0];
104 return true;
107 if (!sil->quiet) {
108 DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
109 addr, i2cbus->adapter.name, dvo->slave_addr);
111 return false;
114 static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
116 struct sil164_priv *sil= dvo->dev_priv;
117 struct i2c_adapter *adapter = dvo->i2c_bus;
118 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
119 uint8_t out_buf[2];
120 struct i2c_msg msg = {
121 .addr = dvo->slave_addr,
122 .flags = 0,
123 .len = 2,
124 .buf = out_buf,
127 out_buf[0] = addr;
128 out_buf[1] = ch;
130 if (i2c_transfer(&i2cbus->adapter, &msg, 1) == 1)
131 return true;
133 if (!sil->quiet) {
134 DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
135 addr, i2cbus->adapter.name, dvo->slave_addr);
138 return false;
141 /* Silicon Image 164 driver for chip on i2c bus */
142 static bool sil164_init(struct intel_dvo_device *dvo,
143 struct i2c_adapter *adapter)
145 /* this will detect the SIL164 chip on the specified i2c bus */
146 struct sil164_priv *sil;
147 unsigned char ch;
149 sil = kzalloc(sizeof(struct sil164_priv), GFP_KERNEL);
150 if (sil == NULL)
151 return false;
153 dvo->i2c_bus = adapter;
154 dvo->dev_priv = sil;
155 sil->quiet = true;
157 if (!sil164_readb(dvo, SIL164_VID_LO, &ch))
158 goto out;
160 if (ch != (SIL164_VID & 0xff)) {
161 DRM_DEBUG("sil164 not detected got %d: from %s Slave %d.\n",
162 ch, adapter->name, dvo->slave_addr);
163 goto out;
166 if (!sil164_readb(dvo, SIL164_DID_LO, &ch))
167 goto out;
169 if (ch != (SIL164_DID & 0xff)) {
170 DRM_DEBUG("sil164 not detected got %d: from %s Slave %d.\n",
171 ch, adapter->name, dvo->slave_addr);
172 goto out;
174 sil->quiet = false;
176 DRM_DEBUG("init sil164 dvo controller successfully!\n");
177 return true;
179 out:
180 kfree(sil);
181 return false;
184 static enum drm_connector_status sil164_detect(struct intel_dvo_device *dvo)
186 uint8_t reg9;
188 sil164_readb(dvo, SIL164_REG9, &reg9);
190 if (reg9 & SIL164_9_HTPLG)
191 return connector_status_connected;
192 else
193 return connector_status_disconnected;
196 static enum drm_mode_status sil164_mode_valid(struct intel_dvo_device *dvo,
197 struct drm_display_mode *mode)
199 return MODE_OK;
202 static void sil164_mode_set(struct intel_dvo_device *dvo,
203 struct drm_display_mode *mode,
204 struct drm_display_mode *adjusted_mode)
206 /* As long as the basics are set up, since we don't have clock
207 * dependencies in the mode setup, we can just leave the
208 * registers alone and everything will work fine.
210 /* recommended programming sequence from doc */
211 /*sil164_writeb(sil, 0x08, 0x30);
212 sil164_writeb(sil, 0x09, 0x00);
213 sil164_writeb(sil, 0x0a, 0x90);
214 sil164_writeb(sil, 0x0c, 0x89);
215 sil164_writeb(sil, 0x08, 0x31);*/
216 /* don't do much */
217 return;
220 /* set the SIL164 power state */
221 static void sil164_dpms(struct intel_dvo_device *dvo, int mode)
223 int ret;
224 unsigned char ch;
226 ret = sil164_readb(dvo, SIL164_REG8, &ch);
227 if (ret == false)
228 return;
230 if (mode == DRM_MODE_DPMS_ON)
231 ch |= SIL164_8_PD;
232 else
233 ch &= ~SIL164_8_PD;
235 sil164_writeb(dvo, SIL164_REG8, ch);
236 return;
239 static void sil164_dump_regs(struct intel_dvo_device *dvo)
241 uint8_t val;
243 sil164_readb(dvo, SIL164_FREQ_LO, &val);
244 DRM_DEBUG("SIL164_FREQ_LO: 0x%02x\n", val);
245 sil164_readb(dvo, SIL164_FREQ_HI, &val);
246 DRM_DEBUG("SIL164_FREQ_HI: 0x%02x\n", val);
247 sil164_readb(dvo, SIL164_REG8, &val);
248 DRM_DEBUG("SIL164_REG8: 0x%02x\n", val);
249 sil164_readb(dvo, SIL164_REG9, &val);
250 DRM_DEBUG("SIL164_REG9: 0x%02x\n", val);
251 sil164_readb(dvo, SIL164_REGC, &val);
252 DRM_DEBUG("SIL164_REGC: 0x%02x\n", val);
255 static void sil164_save(struct intel_dvo_device *dvo)
257 struct sil164_priv *sil= dvo->dev_priv;
259 if (!sil164_readb(dvo, SIL164_REG8, &sil->save_regs.reg8))
260 return;
262 if (!sil164_readb(dvo, SIL164_REG9, &sil->save_regs.reg9))
263 return;
265 if (!sil164_readb(dvo, SIL164_REGC, &sil->save_regs.regc))
266 return;
268 return;
271 static void sil164_restore(struct intel_dvo_device *dvo)
273 struct sil164_priv *sil = dvo->dev_priv;
275 /* Restore it powered down initially */
276 sil164_writeb(dvo, SIL164_REG8, sil->save_regs.reg8 & ~0x1);
278 sil164_writeb(dvo, SIL164_REG9, sil->save_regs.reg9);
279 sil164_writeb(dvo, SIL164_REGC, sil->save_regs.regc);
280 sil164_writeb(dvo, SIL164_REG8, sil->save_regs.reg8);
283 static void sil164_destroy(struct intel_dvo_device *dvo)
285 struct sil164_priv *sil = dvo->dev_priv;
287 if (sil) {
288 kfree(sil);
289 dvo->dev_priv = NULL;
293 struct intel_dvo_dev_ops sil164_ops = {
294 .init = sil164_init,
295 .detect = sil164_detect,
296 .mode_valid = sil164_mode_valid,
297 .mode_set = sil164_mode_set,
298 .dpms = sil164_dpms,
299 .dump_regs = sil164_dump_regs,
300 .save = sil164_save,
301 .restore = sil164_restore,
302 .destroy = sil164_destroy,