arch/powerpc/boot/dts/p2020ds.dts

   1 /*
   2  * P2020 DS Device Tree Source
   3  *
   4  * Copyright 2009-2011 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /include/ "p2020si.dtsi"
  13
  14 / {
  15         model = "fsl,P2020DS";
  16         compatible = "fsl,P2020DS";
  17
  18         aliases {
  19                 ethernet0 = &enet0;
  20                 ethernet1 = &enet1;
  21                 ethernet2 = &enet2;
  22                 serial0 = &serial0;
  23                 serial1 = &serial1;
  24                 pci0 = &pci0;
  25                 pci1 = &pci1;
  26                 pci2 = &pci2;
  27         };
  28
  29
  30         memory {
  31                 device_type = "memory";
  32         };
  33
  34         localbus@ffe05000 {
  35                 compatible = "fsl,elbc", "simple-bus";
  36                 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
  37                           0x1 0x0 0x0 0xe0000000 0x08000000
  38                           0x2 0x0 0x0 0xffa00000 0x00040000
  39                           0x3 0x0 0x0 0xffdf0000 0x00008000
  40                           0x4 0x0 0x0 0xffa40000 0x00040000
  41                           0x5 0x0 0x0 0xffa80000 0x00040000
  42                           0x6 0x0 0x0 0xffac0000 0x00040000>;
  43
  44                 nor@0,0 {
  45                         #address-cells = <1>;
  46                         #size-cells = <1>;
  47                         compatible = "cfi-flash";
  48                         reg = <0x0 0x0 0x8000000>;
  49                         bank-width = <2>;
  50                         device-width = <1>;
  51
  52                         ramdisk@0 {
  53                                 reg = <0x0 0x03000000>;
  54                                 read-only;
  55                         };
  56
  57                         diagnostic@3000000 {
  58                                 reg = <0x03000000 0x00e00000>;
  59                                 read-only;
  60                         };
  61
  62                         dink@3e00000 {
  63                                 reg = <0x03e00000 0x00200000>;
  64                                 read-only;
  65                         };
  66
  67                         kernel@4000000 {
  68                                 reg = <0x04000000 0x00400000>;
  69                                 read-only;
  70                         };
  71
  72                         jffs2@4400000 {
  73                                 reg = <0x04400000 0x03b00000>;
  74                         };
  75
  76                         dtb@7f00000 {
  77                                 reg = <0x07f00000 0x00080000>;
  78                                 read-only;
  79                         };
  80
  81                         u-boot@7f80000 {
  82                                 reg = <0x07f80000 0x00080000>;
  83                                 read-only;
  84                         };
  85                 };
  86
  87                 nand@2,0 {
  88                         #address-cells = <1>;
  89                         #size-cells = <1>;
  90                         compatible = "fsl,elbc-fcm-nand";
  91                         reg = <0x2 0x0 0x40000>;
  92
  93                         u-boot@0 {
  94                                 reg = <0x0 0x02000000>;
  95                                 read-only;
  96                         };
  97
  98                         jffs2@2000000 {
  99                                 reg = <0x02000000 0x10000000>;
 100                         };
 101
 102                         ramdisk@12000000 {
 103                                 reg = <0x12000000 0x08000000>;
 104                                 read-only;
 105                         };
 106
 107                         kernel@1a000000 {
 108                                 reg = <0x1a000000 0x04000000>;
 109                         };
 110
 111                         dtb@1e000000 {
 112                                 reg = <0x1e000000 0x01000000>;
 113                                 read-only;
 114                         };
 115
 116                         empty@1f000000 {
 117                                 reg = <0x1f000000 0x21000000>;
 118                         };
 119                 };
 120
 121                 nand@4,0 {
 122                         compatible = "fsl,elbc-fcm-nand";
 123                         reg = <0x4 0x0 0x40000>;
 124                 };
 125
 126                 nand@5,0 {
 127                         compatible = "fsl,elbc-fcm-nand";
 128                         reg = <0x5 0x0 0x40000>;
 129                 };
 130
 131                 nand@6,0 {
 132                         compatible = "fsl,elbc-fcm-nand";
 133                         reg = <0x6 0x0 0x40000>;
 134                 };
 135         };
 136
 137         soc@ffe00000 {
 138
 139                 usb@22000 {
 140                         phy_type = "ulpi";
 141                 };
 142
 143                 mdio@24520 {
 144                         phy0: ethernet-phy@0 {
 145                                 interrupt-parent = <&mpic>;
 146                                 interrupts = <3 1>;
 147                                 reg = <0x0>;
 148                         };
 149                         phy1: ethernet-phy@1 {
 150                                 interrupt-parent = <&mpic>;
 151                                 interrupts = <3 1>;
 152                                 reg = <0x1>;
 153                         };
 154                         phy2: ethernet-phy@2 {
 155                                 interrupt-parent = <&mpic>;
 156                                 interrupts = <3 1>;
 157                                 reg = <0x2>;
 158                         };
 159                         tbi0: tbi-phy@11 {
 160                                 reg = <0x11>;
 161                                 device_type = "tbi-phy";
 162                         };
 163
 164                 };
 165
 166                 mdio@25520 {
 167                         tbi1: tbi-phy@11 {
 168                                 reg = <0x11>;
 169                                 device_type = "tbi-phy";
 170                         };
 171                 };
 172
 173                 mdio@26520 {
 174                         tbi2: tbi-phy@11 {
 175                                 reg = <0x11>;
 176                                 device_type = "tbi-phy";
 177                         };
 178
 179                 };
 180
 181                 ptp_clock@24E00 {
 182                         compatible = "fsl,etsec-ptp";
 183                         reg = <0x24E00 0xB0>;
 184                         interrupts = <68 2 69 2 70 2>;
 185                         interrupt-parent = < &mpic >;
 186                         fsl,tclk-period = <5>;
 187                         fsl,tmr-prsc = <200>;
 188                         fsl,tmr-add = <0xCCCCCCCD>;
 189                         fsl,tmr-fiper1 = <0x3B9AC9FB>;
 190                         fsl,tmr-fiper2 = <0x0001869B>;
 191                         fsl,max-adj = <249999999>;
 192                 };
 193
 194                 enet0: ethernet@24000 {
 195                         tbi-handle = <&tbi0>;
 196                         phy-handle = <&phy0>;
 197                         phy-connection-type = "rgmii-id";
 198                 };
 199
 200                 enet1: ethernet@25000 {
 201                         tbi-handle = <&tbi1>;
 202                         phy-handle = <&phy1>;
 203                         phy-connection-type = "rgmii-id";
 204
 205                 };
 206
 207                 enet2: ethernet@26000 {
 208                         tbi-handle = <&tbi2>;
 209                         phy-handle = <&phy2>;
 210                         phy-connection-type = "rgmii-id";
 211                 };
 212
 213
 214                 msi@41600 {
 215                         compatible = "fsl,mpic-msi";
 216                 };
 217         };
 218
 219         pci0: pcie@ffe08000 {
 220                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
 221                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
 222                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 223                 interrupt-map = <
 224                         /* IDSEL 0x0 */
 225                         0000 0x0 0x0 0x1 &mpic 0x8 0x1
 226                         0000 0x0 0x0 0x2 &mpic 0x9 0x1
 227                         0000 0x0 0x0 0x3 &mpic 0xa 0x1
 228                         0000 0x0 0x0 0x4 &mpic 0xb 0x1
 229                         >;
 230                 pcie@0 {
 231                         reg = <0x0 0x0 0x0 0x0 0x0>;
 232                         #size-cells = <2>;
 233                         #address-cells = <3>;
 234                         device_type = "pci";
 235                         ranges = <0x2000000 0x0 0x80000000
 236                                   0x2000000 0x0 0x80000000
 237                                   0x0 0x20000000
 238
 239                                   0x1000000 0x0 0x0
 240                                   0x1000000 0x0 0x0
 241                                   0x0 0x10000>;
 242                 };
 243         };
 244
 245         pci1: pcie@ffe09000 {
 246                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
 247                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
 248                 interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
 249                 interrupt-map = <
 250
 251                         // IDSEL 0x11 func 0 - PCI slot 1
 252                         0x8800 0x0 0x0 0x1 &i8259 0x9 0x2
 253                         0x8800 0x0 0x0 0x2 &i8259 0xa 0x2
 254
 255                         // IDSEL 0x11 func 1 - PCI slot 1
 256                         0x8900 0x0 0x0 0x1 &i8259 0x9 0x2
 257                         0x8900 0x0 0x0 0x2 &i8259 0xa 0x2
 258
 259                         // IDSEL 0x11 func 2 - PCI slot 1
 260                         0x8a00 0x0 0x0 0x1 &i8259 0x9 0x2
 261                         0x8a00 0x0 0x0 0x2 &i8259 0xa 0x2
 262
 263                         // IDSEL 0x11 func 3 - PCI slot 1
 264                         0x8b00 0x0 0x0 0x1 &i8259 0x9 0x2
 265                         0x8b00 0x0 0x0 0x2 &i8259 0xa 0x2
 266
 267                         // IDSEL 0x11 func 4 - PCI slot 1
 268                         0x8c00 0x0 0x0 0x1 &i8259 0x9 0x2
 269                         0x8c00 0x0 0x0 0x2 &i8259 0xa 0x2
 270
 271                         // IDSEL 0x11 func 5 - PCI slot 1
 272                         0x8d00 0x0 0x0 0x1 &i8259 0x9 0x2
 273                         0x8d00 0x0 0x0 0x2 &i8259 0xa 0x2
 274
 275                         // IDSEL 0x11 func 6 - PCI slot 1
 276                         0x8e00 0x0 0x0 0x1 &i8259 0x9 0x2
 277                         0x8e00 0x0 0x0 0x2 &i8259 0xa 0x2
 278
 279                         // IDSEL 0x11 func 7 - PCI slot 1
 280                         0x8f00 0x0 0x0 0x1 &i8259 0x9 0x2
 281                         0x8f00 0x0 0x0 0x2 &i8259 0xa 0x2
 282
 283                         // IDSEL 0x1d  Audio
 284                         0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
 285
 286                         // IDSEL 0x1e Legacy
 287                         0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
 288                         0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
 289
 290                         // IDSEL 0x1f IDE/SATA
 291                         0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
 292                         0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
 293                         >;
 294
 295                 pcie@0 {
 296                         reg = <0x0 0x0 0x0 0x0 0x0>;
 297                         #size-cells = <2>;
 298                         #address-cells = <3>;
 299                         device_type = "pci";
 300                         ranges = <0x2000000 0x0 0xa0000000
 301                                   0x2000000 0x0 0xa0000000
 302                                   0x0 0x20000000
 303
 304                                   0x1000000 0x0 0x0
 305                                   0x1000000 0x0 0x0
 306                                   0x0 0x10000>;
 307                         uli1575@0 {
 308                                 reg = <0x0 0x0 0x0 0x0 0x0>;
 309                                 #size-cells = <2>;
 310                                 #address-cells = <3>;
 311                                 ranges = <0x2000000 0x0 0xa0000000
 312                                           0x2000000 0x0 0xa0000000
 313                                           0x0 0x20000000
 314
 315                                           0x1000000 0x0 0x0
 316                                           0x1000000 0x0 0x0
 317                                           0x0 0x10000>;
 318                                 isa@1e {
 319                                         device_type = "isa";
 320                                         #interrupt-cells = <2>;
 321                                         #size-cells = <1>;
 322                                         #address-cells = <2>;
 323                                         reg = <0xf000 0x0 0x0 0x0 0x0>;
 324                                         ranges = <0x1 0x0 0x1000000 0x0 0x0
 325                                                   0x1000>;
 326                                         interrupt-parent = <&i8259>;
 327
 328                                         i8259: interrupt-controller@20 {
 329                                                 reg = <0x1 0x20 0x2
 330                                                        0x1 0xa0 0x2
 331                                                        0x1 0x4d0 0x2>;
 332                                                 interrupt-controller;
 333                                                 device_type = "interrupt-controller";
 334                                                 #address-cells = <0>;
 335                                                 #interrupt-cells = <2>;
 336                                                 compatible = "chrp,iic";
 337                                                 interrupts = <4 1>;
 338                                                 interrupt-parent = <&mpic>;
 339                                         };
 340
 341                                         i8042@60 {
 342                                                 #size-cells = <0>;
 343                                                 #address-cells = <1>;
 344                                                 reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
 345                                                 interrupts = <1 3 12 3>;
 346                                                 interrupt-parent =
 347                                                         <&i8259>;
 348
 349                                                 keyboard@0 {
 350                                                         reg = <0x0>;
 351                                                         compatible = "pnpPNP,303";
 352                                                 };
 353
 354                                                 mouse@1 {
 355                                                         reg = <0x1>;
 356                                                         compatible = "pnpPNP,f03";
 357                                                 };
 358                                         };
 359
 360                                         rtc@70 {
 361                                                 compatible = "pnpPNP,b00";
 362                                                 reg = <0x1 0x70 0x2>;
 363                                         };
 364
 365                                         gpio@400 {
 366                                                 reg = <0x1 0x400 0x80>;
 367                                         };
 368                                 };
 369                         };
 370                 };
 371
 372         };
 373
 374         pci2: pcie@ffe0a000 {
 375                 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
 376                           0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
 377                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 378                 interrupt-map = <
 379                         /* IDSEL 0x0 */
 380                         0000 0x0 0x0 0x1 &mpic 0x0 0x1
 381                         0000 0x0 0x0 0x2 &mpic 0x1 0x1
 382                         0000 0x0 0x0 0x3 &mpic 0x2 0x1
 383                         0000 0x0 0x0 0x4 &mpic 0x3 0x1
 384                         >;
 385                 pcie@0 {
 386                         reg = <0x0 0x0 0x0 0x0 0x0>;
 387                         #size-cells = <2>;
 388                         #address-cells = <3>;
 389                         device_type = "pci";
 390                         ranges = <0x2000000 0x0 0xc0000000
 391                                   0x2000000 0x0 0xc0000000
 392                                   0x0 0x20000000
 393
 394                                   0x1000000 0x0 0x0
 395                                   0x1000000 0x0 0x0
 396                                   0x0 0x10000>;
 397                 };
 398         };
 399 };