mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / northbridge / intel / haswell / native_raminit / Makefile.mk
blobebf7abc6ec47399793d76761a524f6737d99623c
1 ## SPDX-License-Identifier: GPL-2.0-or-later
3 romstage-y += raminit_main.c
4 romstage-y += raminit_native.c
5 romstage-y += spd_bitmunching.c