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mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git]
/
src
/
northbridge
/
intel
/
haswell
/
native_raminit
/
Makefile.mk
blob
ebf7abc6ec47399793d76761a524f6737d99623c
1
## SPDX-License-Identifier: GPL-2.0-or-later
2
3
romstage-y
+=
raminit_main.c
4
romstage-y
+=
raminit_native.c
5
romstage-y
+=
spd_bitmunching.c