[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git] / test / CodeGen / MIR / AMDGPU / mfi-parse-error-scratch-wave-offset-reg.mir
blobbbf58085cfa03efae0e661537c50f3f783c12257
1 # RUN: not llc -march=amdgcn -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
2 # CHECK: :7:27: expected a named register
3 # CHECK: scratchWaveOffsetReg:  ''
4 ---
5 name: empty_scratch_wave_offset_reg
6 machineFunctionInfo:
7   scratchWaveOffsetReg:  ''
8 body:             |
9   bb.0:
11     S_ENDPGM
12 ...