[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git] / test / CodeGen / MIR / ARM / 
tree0c58b358bffd45b0f23c6b04f1fc46ead4a8d000
drwxr-xr-x   ..
-rw-r--r-- 2565 bundled-instructions.mir
-rw-r--r-- 2394 cfi-same-value.mir
-rw-r--r-- 1131 expected-closing-brace.mir
-rw-r--r-- 386 extraneous-closing-brace-error.mir
-rw-r--r-- 67 lit.local.cfg
-rw-r--r-- 763 nested-instruction-bundle-error.mir
-rw-r--r-- 851 target-constant-pools-error.mir