[llvm-exegesis][NFC] Pass Instruction instead of bare Opcode
[llvm-core.git] / lib / Target / Mips / MipsRegisterInfo.h
blobb84aaad05eb5a32591b00eced55279001d590710
1 //===- MipsRegisterInfo.h - Mips Register Information Impl ------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the Mips implementation of the TargetRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
15 #define LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
17 #include "Mips.h"
18 #include "llvm/CodeGen/MachineBasicBlock.h"
19 #include <cstdint>
21 #define GET_REGINFO_HEADER
22 #include "MipsGenRegisterInfo.inc"
24 namespace llvm {
26 class TargetRegisterClass;
28 class MipsRegisterInfo : public MipsGenRegisterInfo {
29 public:
30 enum class MipsPtrClass {
31 /// The default register class for integer values.
32 Default = 0,
33 /// The subset of registers permitted in certain microMIPS instructions
34 /// such as lw16.
35 GPR16MM = 1,
36 /// The stack pointer only.
37 StackPointer = 2,
38 /// The global pointer only.
39 GlobalPointer = 3,
42 MipsRegisterInfo();
44 /// Get PIC indirect call register
45 static unsigned getPICCallReg();
47 /// Code Generation virtual methods...
48 const TargetRegisterClass *getPointerRegClass(const MachineFunction &MF,
49 unsigned Kind) const override;
51 unsigned getRegPressureLimit(const TargetRegisterClass *RC,
52 MachineFunction &MF) const override;
53 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
54 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
55 CallingConv::ID) const override;
56 static const uint32_t *getMips16RetHelperMask();
58 BitVector getReservedRegs(const MachineFunction &MF) const override;
60 bool requiresRegisterScavenging(const MachineFunction &MF) const override;
62 bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override;
64 /// Stack Frame Processing Methods
65 void eliminateFrameIndex(MachineBasicBlock::iterator II,
66 int SPAdj, unsigned FIOperandNum,
67 RegScavenger *RS = nullptr) const override;
69 // Stack realignment queries.
70 bool canRealignStack(const MachineFunction &MF) const override;
72 /// Debug information queries.
73 unsigned getFrameRegister(const MachineFunction &MF) const override;
75 /// Return GPR register class.
76 virtual const TargetRegisterClass *intRegClass(unsigned Size) const = 0;
78 private:
79 virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
80 int FrameIndex, uint64_t StackSize,
81 int64_t SPOffset) const = 0;
84 } // end namespace llvm
86 #endif // LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H