[RISCV] Split regalloc between RVV and other (#72096)
[llvm-project.git] / llvm / lib / Target / X86 / X86AsmPrinter.cpp
blob73c7450620966cd65acfb2d412e303353c976f93
1 //===-- X86AsmPrinter.cpp - Convert X86 LLVM code to AT&T assembly --------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains a printer that converts from our internal representation
10 // of machine-dependent LLVM code to X86 machine code.
12 //===----------------------------------------------------------------------===//
14 #include "X86AsmPrinter.h"
15 #include "MCTargetDesc/X86ATTInstPrinter.h"
16 #include "MCTargetDesc/X86BaseInfo.h"
17 #include "MCTargetDesc/X86TargetStreamer.h"
18 #include "TargetInfo/X86TargetInfo.h"
19 #include "X86InstrInfo.h"
20 #include "X86MachineFunctionInfo.h"
21 #include "X86Subtarget.h"
22 #include "llvm/BinaryFormat/COFF.h"
23 #include "llvm/BinaryFormat/ELF.h"
24 #include "llvm/CodeGen/MachineConstantPool.h"
25 #include "llvm/CodeGen/MachineModuleInfoImpls.h"
26 #include "llvm/CodeGen/MachineValueType.h"
27 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
28 #include "llvm/IR/DerivedTypes.h"
29 #include "llvm/IR/InlineAsm.h"
30 #include "llvm/IR/Mangler.h"
31 #include "llvm/IR/Module.h"
32 #include "llvm/IR/Type.h"
33 #include "llvm/MC/MCAsmInfo.h"
34 #include "llvm/MC/MCCodeEmitter.h"
35 #include "llvm/MC/MCContext.h"
36 #include "llvm/MC/MCExpr.h"
37 #include "llvm/MC/MCInstBuilder.h"
38 #include "llvm/MC/MCSectionCOFF.h"
39 #include "llvm/MC/MCSectionELF.h"
40 #include "llvm/MC/MCSectionMachO.h"
41 #include "llvm/MC/MCStreamer.h"
42 #include "llvm/MC/MCSymbol.h"
43 #include "llvm/MC/TargetRegistry.h"
44 #include "llvm/Support/Debug.h"
45 #include "llvm/Support/ErrorHandling.h"
46 #include "llvm/Target/TargetMachine.h"
48 using namespace llvm;
50 X86AsmPrinter::X86AsmPrinter(TargetMachine &TM,
51 std::unique_ptr<MCStreamer> Streamer)
52 : AsmPrinter(TM, std::move(Streamer)), FM(*this) {}
54 //===----------------------------------------------------------------------===//
55 // Primitive Helper Functions.
56 //===----------------------------------------------------------------------===//
58 /// runOnMachineFunction - Emit the function body.
59 ///
60 bool X86AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
61 Subtarget = &MF.getSubtarget<X86Subtarget>();
63 SMShadowTracker.startFunction(MF);
64 CodeEmitter.reset(TM.getTarget().createMCCodeEmitter(
65 *Subtarget->getInstrInfo(), MF.getContext()));
67 EmitFPOData =
68 Subtarget->isTargetWin32() && MF.getMMI().getModule()->getCodeViewFlag();
70 IndCSPrefix =
71 MF.getMMI().getModule()->getModuleFlag("indirect_branch_cs_prefix");
73 SetupMachineFunction(MF);
75 if (Subtarget->isTargetCOFF()) {
76 bool Local = MF.getFunction().hasLocalLinkage();
77 OutStreamer->beginCOFFSymbolDef(CurrentFnSym);
78 OutStreamer->emitCOFFSymbolStorageClass(
79 Local ? COFF::IMAGE_SYM_CLASS_STATIC : COFF::IMAGE_SYM_CLASS_EXTERNAL);
80 OutStreamer->emitCOFFSymbolType(COFF::IMAGE_SYM_DTYPE_FUNCTION
81 << COFF::SCT_COMPLEX_TYPE_SHIFT);
82 OutStreamer->endCOFFSymbolDef();
85 // Emit the rest of the function body.
86 emitFunctionBody();
88 // Emit the XRay table for this function.
89 emitXRayTable();
91 EmitFPOData = false;
93 IndCSPrefix = false;
95 // We didn't modify anything.
96 return false;
99 void X86AsmPrinter::emitFunctionBodyStart() {
100 if (EmitFPOData) {
101 auto *XTS =
102 static_cast<X86TargetStreamer *>(OutStreamer->getTargetStreamer());
103 XTS->emitFPOProc(
104 CurrentFnSym,
105 MF->getInfo<X86MachineFunctionInfo>()->getArgumentStackSize());
109 void X86AsmPrinter::emitFunctionBodyEnd() {
110 if (EmitFPOData) {
111 auto *XTS =
112 static_cast<X86TargetStreamer *>(OutStreamer->getTargetStreamer());
113 XTS->emitFPOEndProc();
117 uint32_t X86AsmPrinter::MaskKCFIType(uint32_t Value) {
118 // If the type hash matches an invalid pattern, mask the value.
119 const uint32_t InvalidValues[] = {
120 0xFA1E0FF3, /* ENDBR64 */
121 0xFB1E0FF3, /* ENDBR32 */
123 for (uint32_t N : InvalidValues) {
124 // LowerKCFI_CHECK emits -Value for indirect call checks, so we must also
125 // mask that. Note that -(Value + 1) == ~Value.
126 if (N == Value || -N == Value)
127 return Value + 1;
129 return Value;
132 void X86AsmPrinter::EmitKCFITypePadding(const MachineFunction &MF,
133 bool HasType) {
134 // Keep the function entry aligned, taking patchable-function-prefix into
135 // account if set.
136 int64_t PrefixBytes = 0;
137 (void)MF.getFunction()
138 .getFnAttribute("patchable-function-prefix")
139 .getValueAsString()
140 .getAsInteger(10, PrefixBytes);
142 // Also take the type identifier into account if we're emitting
143 // one. Otherwise, just pad with nops. The X86::MOV32ri instruction emitted
144 // in X86AsmPrinter::emitKCFITypeId is 5 bytes long.
145 if (HasType)
146 PrefixBytes += 5;
148 emitNops(offsetToAlignment(PrefixBytes, MF.getAlignment()));
151 /// emitKCFITypeId - Emit the KCFI type information in architecture specific
152 /// format.
153 void X86AsmPrinter::emitKCFITypeId(const MachineFunction &MF) {
154 const Function &F = MF.getFunction();
155 if (!F.getParent()->getModuleFlag("kcfi"))
156 return;
158 ConstantInt *Type = nullptr;
159 if (const MDNode *MD = F.getMetadata(LLVMContext::MD_kcfi_type))
160 Type = mdconst::extract<ConstantInt>(MD->getOperand(0));
162 // If we don't have a type to emit, just emit padding if needed to maintain
163 // the same alignment for all functions.
164 if (!Type) {
165 EmitKCFITypePadding(MF, /*HasType=*/false);
166 return;
169 // Emit a function symbol for the type data to avoid unreachable instruction
170 // warnings from binary validation tools, and use the same linkage as the
171 // parent function. Note that using local linkage would result in duplicate
172 // symbols for weak parent functions.
173 MCSymbol *FnSym = OutContext.getOrCreateSymbol("__cfi_" + MF.getName());
174 emitLinkage(&MF.getFunction(), FnSym);
175 if (MAI->hasDotTypeDotSizeDirective())
176 OutStreamer->emitSymbolAttribute(FnSym, MCSA_ELF_TypeFunction);
177 OutStreamer->emitLabel(FnSym);
179 // Embed the type hash in the X86::MOV32ri instruction to avoid special
180 // casing object file parsers.
181 EmitKCFITypePadding(MF);
182 EmitAndCountInstruction(MCInstBuilder(X86::MOV32ri)
183 .addReg(X86::EAX)
184 .addImm(MaskKCFIType(Type->getZExtValue())));
186 if (MAI->hasDotTypeDotSizeDirective()) {
187 MCSymbol *EndSym = OutContext.createTempSymbol("cfi_func_end");
188 OutStreamer->emitLabel(EndSym);
190 const MCExpr *SizeExp = MCBinaryExpr::createSub(
191 MCSymbolRefExpr::create(EndSym, OutContext),
192 MCSymbolRefExpr::create(FnSym, OutContext), OutContext);
193 OutStreamer->emitELFSize(FnSym, SizeExp);
197 /// PrintSymbolOperand - Print a raw symbol reference operand. This handles
198 /// jump tables, constant pools, global address and external symbols, all of
199 /// which print to a label with various suffixes for relocation types etc.
200 void X86AsmPrinter::PrintSymbolOperand(const MachineOperand &MO,
201 raw_ostream &O) {
202 switch (MO.getType()) {
203 default: llvm_unreachable("unknown symbol type!");
204 case MachineOperand::MO_ConstantPoolIndex:
205 GetCPISymbol(MO.getIndex())->print(O, MAI);
206 printOffset(MO.getOffset(), O);
207 break;
208 case MachineOperand::MO_GlobalAddress: {
209 const GlobalValue *GV = MO.getGlobal();
211 MCSymbol *GVSym;
212 if (MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY ||
213 MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY_PIC_BASE)
214 GVSym = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
215 else
216 GVSym = getSymbolPreferLocal(*GV);
218 // Handle dllimport linkage.
219 if (MO.getTargetFlags() == X86II::MO_DLLIMPORT)
220 GVSym = OutContext.getOrCreateSymbol(Twine("__imp_") + GVSym->getName());
221 else if (MO.getTargetFlags() == X86II::MO_COFFSTUB)
222 GVSym =
223 OutContext.getOrCreateSymbol(Twine(".refptr.") + GVSym->getName());
225 if (MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY ||
226 MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY_PIC_BASE) {
227 MCSymbol *Sym = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
228 MachineModuleInfoImpl::StubValueTy &StubSym =
229 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry(Sym);
230 if (!StubSym.getPointer())
231 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV),
232 !GV->hasInternalLinkage());
235 // If the name begins with a dollar-sign, enclose it in parens. We do this
236 // to avoid having it look like an integer immediate to the assembler.
237 if (GVSym->getName()[0] != '$')
238 GVSym->print(O, MAI);
239 else {
240 O << '(';
241 GVSym->print(O, MAI);
242 O << ')';
244 printOffset(MO.getOffset(), O);
245 break;
249 switch (MO.getTargetFlags()) {
250 default:
251 llvm_unreachable("Unknown target flag on GV operand");
252 case X86II::MO_NO_FLAG: // No flag.
253 break;
254 case X86II::MO_DARWIN_NONLAZY:
255 case X86II::MO_DLLIMPORT:
256 case X86II::MO_COFFSTUB:
257 // These affect the name of the symbol, not any suffix.
258 break;
259 case X86II::MO_GOT_ABSOLUTE_ADDRESS:
260 O << " + [.-";
261 MF->getPICBaseSymbol()->print(O, MAI);
262 O << ']';
263 break;
264 case X86II::MO_PIC_BASE_OFFSET:
265 case X86II::MO_DARWIN_NONLAZY_PIC_BASE:
266 O << '-';
267 MF->getPICBaseSymbol()->print(O, MAI);
268 break;
269 case X86II::MO_TLSGD: O << "@TLSGD"; break;
270 case X86II::MO_TLSLD: O << "@TLSLD"; break;
271 case X86II::MO_TLSLDM: O << "@TLSLDM"; break;
272 case X86II::MO_GOTTPOFF: O << "@GOTTPOFF"; break;
273 case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break;
274 case X86II::MO_TPOFF: O << "@TPOFF"; break;
275 case X86II::MO_DTPOFF: O << "@DTPOFF"; break;
276 case X86II::MO_NTPOFF: O << "@NTPOFF"; break;
277 case X86II::MO_GOTNTPOFF: O << "@GOTNTPOFF"; break;
278 case X86II::MO_GOTPCREL: O << "@GOTPCREL"; break;
279 case X86II::MO_GOTPCREL_NORELAX: O << "@GOTPCREL_NORELAX"; break;
280 case X86II::MO_GOT: O << "@GOT"; break;
281 case X86II::MO_GOTOFF: O << "@GOTOFF"; break;
282 case X86II::MO_PLT: O << "@PLT"; break;
283 case X86II::MO_TLVP: O << "@TLVP"; break;
284 case X86II::MO_TLVP_PIC_BASE:
285 O << "@TLVP" << '-';
286 MF->getPICBaseSymbol()->print(O, MAI);
287 break;
288 case X86II::MO_SECREL: O << "@SECREL32"; break;
292 void X86AsmPrinter::PrintOperand(const MachineInstr *MI, unsigned OpNo,
293 raw_ostream &O) {
294 const MachineOperand &MO = MI->getOperand(OpNo);
295 const bool IsATT = MI->getInlineAsmDialect() == InlineAsm::AD_ATT;
296 switch (MO.getType()) {
297 default: llvm_unreachable("unknown operand type!");
298 case MachineOperand::MO_Register: {
299 if (IsATT)
300 O << '%';
301 O << X86ATTInstPrinter::getRegisterName(MO.getReg());
302 return;
305 case MachineOperand::MO_Immediate:
306 if (IsATT)
307 O << '$';
308 O << MO.getImm();
309 return;
311 case MachineOperand::MO_ConstantPoolIndex:
312 case MachineOperand::MO_GlobalAddress: {
313 switch (MI->getInlineAsmDialect()) {
314 case InlineAsm::AD_ATT:
315 O << '$';
316 break;
317 case InlineAsm::AD_Intel:
318 O << "offset ";
319 break;
321 PrintSymbolOperand(MO, O);
322 break;
324 case MachineOperand::MO_BlockAddress: {
325 MCSymbol *Sym = GetBlockAddressSymbol(MO.getBlockAddress());
326 Sym->print(O, MAI);
327 break;
332 /// PrintModifiedOperand - Print subregisters based on supplied modifier,
333 /// deferring to PrintOperand() if no modifier was supplied or if operand is not
334 /// a register.
335 void X86AsmPrinter::PrintModifiedOperand(const MachineInstr *MI, unsigned OpNo,
336 raw_ostream &O, const char *Modifier) {
337 const MachineOperand &MO = MI->getOperand(OpNo);
338 if (!Modifier || !MO.isReg())
339 return PrintOperand(MI, OpNo, O);
340 if (MI->getInlineAsmDialect() == InlineAsm::AD_ATT)
341 O << '%';
342 Register Reg = MO.getReg();
343 if (strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
344 unsigned Size = (strcmp(Modifier+6,"64") == 0) ? 64 :
345 (strcmp(Modifier+6,"32") == 0) ? 32 :
346 (strcmp(Modifier+6,"16") == 0) ? 16 : 8;
347 Reg = getX86SubSuperRegister(Reg, Size);
349 O << X86ATTInstPrinter::getRegisterName(Reg);
352 /// PrintPCRelImm - This is used to print an immediate value that ends up
353 /// being encoded as a pc-relative value. These print slightly differently, for
354 /// example, a $ is not emitted.
355 void X86AsmPrinter::PrintPCRelImm(const MachineInstr *MI, unsigned OpNo,
356 raw_ostream &O) {
357 const MachineOperand &MO = MI->getOperand(OpNo);
358 switch (MO.getType()) {
359 default: llvm_unreachable("Unknown pcrel immediate operand");
360 case MachineOperand::MO_Register:
361 // pc-relativeness was handled when computing the value in the reg.
362 PrintOperand(MI, OpNo, O);
363 return;
364 case MachineOperand::MO_Immediate:
365 O << MO.getImm();
366 return;
367 case MachineOperand::MO_GlobalAddress:
368 PrintSymbolOperand(MO, O);
369 return;
373 void X86AsmPrinter::PrintLeaMemReference(const MachineInstr *MI, unsigned OpNo,
374 raw_ostream &O, const char *Modifier) {
375 const MachineOperand &BaseReg = MI->getOperand(OpNo + X86::AddrBaseReg);
376 const MachineOperand &IndexReg = MI->getOperand(OpNo + X86::AddrIndexReg);
377 const MachineOperand &DispSpec = MI->getOperand(OpNo + X86::AddrDisp);
379 // If we really don't want to print out (rip), don't.
380 bool HasBaseReg = BaseReg.getReg() != 0;
381 if (HasBaseReg && Modifier && !strcmp(Modifier, "no-rip") &&
382 BaseReg.getReg() == X86::RIP)
383 HasBaseReg = false;
385 // HasParenPart - True if we will print out the () part of the mem ref.
386 bool HasParenPart = IndexReg.getReg() || HasBaseReg;
388 switch (DispSpec.getType()) {
389 default:
390 llvm_unreachable("unknown operand type!");
391 case MachineOperand::MO_Immediate: {
392 int DispVal = DispSpec.getImm();
393 if (DispVal || !HasParenPart)
394 O << DispVal;
395 break;
397 case MachineOperand::MO_GlobalAddress:
398 case MachineOperand::MO_ConstantPoolIndex:
399 PrintSymbolOperand(DispSpec, O);
400 break;
403 if (Modifier && strcmp(Modifier, "H") == 0)
404 O << "+8";
406 if (HasParenPart) {
407 assert(IndexReg.getReg() != X86::ESP &&
408 "X86 doesn't allow scaling by ESP");
410 O << '(';
411 if (HasBaseReg)
412 PrintModifiedOperand(MI, OpNo + X86::AddrBaseReg, O, Modifier);
414 if (IndexReg.getReg()) {
415 O << ',';
416 PrintModifiedOperand(MI, OpNo + X86::AddrIndexReg, O, Modifier);
417 unsigned ScaleVal = MI->getOperand(OpNo + X86::AddrScaleAmt).getImm();
418 if (ScaleVal != 1)
419 O << ',' << ScaleVal;
421 O << ')';
425 static bool isSimpleReturn(const MachineInstr &MI) {
426 // We exclude all tail calls here which set both isReturn and isCall.
427 return MI.getDesc().isReturn() && !MI.getDesc().isCall();
430 static bool isIndirectBranchOrTailCall(const MachineInstr &MI) {
431 unsigned Opc = MI.getOpcode();
432 return MI.getDesc().isIndirectBranch() /*Make below code in a good shape*/ ||
433 Opc == X86::TAILJMPr || Opc == X86::TAILJMPm ||
434 Opc == X86::TAILJMPr64 || Opc == X86::TAILJMPm64 ||
435 Opc == X86::TCRETURNri || Opc == X86::TCRETURNmi ||
436 Opc == X86::TCRETURNri64 || Opc == X86::TCRETURNmi64 ||
437 Opc == X86::TAILJMPr64_REX || Opc == X86::TAILJMPm64_REX;
440 void X86AsmPrinter::emitBasicBlockEnd(const MachineBasicBlock &MBB) {
441 if (Subtarget->hardenSlsRet() || Subtarget->hardenSlsIJmp()) {
442 auto I = MBB.getLastNonDebugInstr();
443 if (I != MBB.end()) {
444 if ((Subtarget->hardenSlsRet() && isSimpleReturn(*I)) ||
445 (Subtarget->hardenSlsIJmp() && isIndirectBranchOrTailCall(*I))) {
446 MCInst TmpInst;
447 TmpInst.setOpcode(X86::INT3);
448 EmitToStreamer(*OutStreamer, TmpInst);
452 AsmPrinter::emitBasicBlockEnd(MBB);
453 SMShadowTracker.emitShadowPadding(*OutStreamer, getSubtargetInfo());
456 void X86AsmPrinter::PrintMemReference(const MachineInstr *MI, unsigned OpNo,
457 raw_ostream &O, const char *Modifier) {
458 assert(isMem(*MI, OpNo) && "Invalid memory reference!");
459 const MachineOperand &Segment = MI->getOperand(OpNo + X86::AddrSegmentReg);
460 if (Segment.getReg()) {
461 PrintModifiedOperand(MI, OpNo + X86::AddrSegmentReg, O, Modifier);
462 O << ':';
464 PrintLeaMemReference(MI, OpNo, O, Modifier);
468 void X86AsmPrinter::PrintIntelMemReference(const MachineInstr *MI,
469 unsigned OpNo, raw_ostream &O,
470 const char *Modifier) {
471 const MachineOperand &BaseReg = MI->getOperand(OpNo + X86::AddrBaseReg);
472 unsigned ScaleVal = MI->getOperand(OpNo + X86::AddrScaleAmt).getImm();
473 const MachineOperand &IndexReg = MI->getOperand(OpNo + X86::AddrIndexReg);
474 const MachineOperand &DispSpec = MI->getOperand(OpNo + X86::AddrDisp);
475 const MachineOperand &SegReg = MI->getOperand(OpNo + X86::AddrSegmentReg);
477 // If we really don't want to print out (rip), don't.
478 bool HasBaseReg = BaseReg.getReg() != 0;
479 if (HasBaseReg && Modifier && !strcmp(Modifier, "no-rip") &&
480 BaseReg.getReg() == X86::RIP)
481 HasBaseReg = false;
483 // If we really just want to print out displacement.
484 if (Modifier && (DispSpec.isGlobal() || DispSpec.isSymbol()) &&
485 !strcmp(Modifier, "disp-only")) {
486 HasBaseReg = false;
489 // If this has a segment register, print it.
490 if (SegReg.getReg()) {
491 PrintOperand(MI, OpNo + X86::AddrSegmentReg, O);
492 O << ':';
495 O << '[';
497 bool NeedPlus = false;
498 if (HasBaseReg) {
499 PrintOperand(MI, OpNo + X86::AddrBaseReg, O);
500 NeedPlus = true;
503 if (IndexReg.getReg()) {
504 if (NeedPlus) O << " + ";
505 if (ScaleVal != 1)
506 O << ScaleVal << '*';
507 PrintOperand(MI, OpNo + X86::AddrIndexReg, O);
508 NeedPlus = true;
511 if (!DispSpec.isImm()) {
512 if (NeedPlus) O << " + ";
513 // Do not add `offset` operator. Matches the behaviour of
514 // X86IntelInstPrinter::printMemReference.
515 PrintSymbolOperand(DispSpec, O);
516 } else {
517 int64_t DispVal = DispSpec.getImm();
518 if (DispVal || (!IndexReg.getReg() && !HasBaseReg)) {
519 if (NeedPlus) {
520 if (DispVal > 0)
521 O << " + ";
522 else {
523 O << " - ";
524 DispVal = -DispVal;
527 O << DispVal;
530 O << ']';
533 static bool printAsmMRegister(const X86AsmPrinter &P, const MachineOperand &MO,
534 char Mode, raw_ostream &O) {
535 Register Reg = MO.getReg();
536 bool EmitPercent = MO.getParent()->getInlineAsmDialect() == InlineAsm::AD_ATT;
538 if (!X86::GR8RegClass.contains(Reg) &&
539 !X86::GR16RegClass.contains(Reg) &&
540 !X86::GR32RegClass.contains(Reg) &&
541 !X86::GR64RegClass.contains(Reg))
542 return true;
544 switch (Mode) {
545 default: return true; // Unknown mode.
546 case 'b': // Print QImode register
547 Reg = getX86SubSuperRegister(Reg, 8);
548 break;
549 case 'h': // Print QImode high register
550 Reg = getX86SubSuperRegister(Reg, 8, true);
551 if (!Reg.isValid())
552 return true;
553 break;
554 case 'w': // Print HImode register
555 Reg = getX86SubSuperRegister(Reg, 16);
556 break;
557 case 'k': // Print SImode register
558 Reg = getX86SubSuperRegister(Reg, 32);
559 break;
560 case 'V':
561 EmitPercent = false;
562 [[fallthrough]];
563 case 'q':
564 // Print 64-bit register names if 64-bit integer registers are available.
565 // Otherwise, print 32-bit register names.
566 Reg = getX86SubSuperRegister(Reg, P.getSubtarget().is64Bit() ? 64 : 32);
567 break;
570 if (EmitPercent)
571 O << '%';
573 O << X86ATTInstPrinter::getRegisterName(Reg);
574 return false;
577 static bool printAsmVRegister(const MachineOperand &MO, char Mode,
578 raw_ostream &O) {
579 Register Reg = MO.getReg();
580 bool EmitPercent = MO.getParent()->getInlineAsmDialect() == InlineAsm::AD_ATT;
582 unsigned Index;
583 if (X86::VR128XRegClass.contains(Reg))
584 Index = Reg - X86::XMM0;
585 else if (X86::VR256XRegClass.contains(Reg))
586 Index = Reg - X86::YMM0;
587 else if (X86::VR512RegClass.contains(Reg))
588 Index = Reg - X86::ZMM0;
589 else
590 return true;
592 switch (Mode) {
593 default: // Unknown mode.
594 return true;
595 case 'x': // Print V4SFmode register
596 Reg = X86::XMM0 + Index;
597 break;
598 case 't': // Print V8SFmode register
599 Reg = X86::YMM0 + Index;
600 break;
601 case 'g': // Print V16SFmode register
602 Reg = X86::ZMM0 + Index;
603 break;
606 if (EmitPercent)
607 O << '%';
609 O << X86ATTInstPrinter::getRegisterName(Reg);
610 return false;
613 /// PrintAsmOperand - Print out an operand for an inline asm expression.
615 bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
616 const char *ExtraCode, raw_ostream &O) {
617 // Does this asm operand have a single letter operand modifier?
618 if (ExtraCode && ExtraCode[0]) {
619 if (ExtraCode[1] != 0) return true; // Unknown modifier.
621 const MachineOperand &MO = MI->getOperand(OpNo);
623 switch (ExtraCode[0]) {
624 default:
625 // See if this is a generic print operand
626 return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O);
627 case 'a': // This is an address. Currently only 'i' and 'r' are expected.
628 switch (MO.getType()) {
629 default:
630 return true;
631 case MachineOperand::MO_Immediate:
632 O << MO.getImm();
633 return false;
634 case MachineOperand::MO_ConstantPoolIndex:
635 case MachineOperand::MO_JumpTableIndex:
636 case MachineOperand::MO_ExternalSymbol:
637 llvm_unreachable("unexpected operand type!");
638 case MachineOperand::MO_GlobalAddress:
639 PrintSymbolOperand(MO, O);
640 if (Subtarget->isPICStyleRIPRel())
641 O << "(%rip)";
642 return false;
643 case MachineOperand::MO_Register:
644 O << '(';
645 PrintOperand(MI, OpNo, O);
646 O << ')';
647 return false;
650 case 'c': // Don't print "$" before a global var name or constant.
651 switch (MO.getType()) {
652 default:
653 PrintOperand(MI, OpNo, O);
654 break;
655 case MachineOperand::MO_Immediate:
656 O << MO.getImm();
657 break;
658 case MachineOperand::MO_ConstantPoolIndex:
659 case MachineOperand::MO_JumpTableIndex:
660 case MachineOperand::MO_ExternalSymbol:
661 llvm_unreachable("unexpected operand type!");
662 case MachineOperand::MO_GlobalAddress:
663 PrintSymbolOperand(MO, O);
664 break;
666 return false;
668 case 'A': // Print '*' before a register (it must be a register)
669 if (MO.isReg()) {
670 O << '*';
671 PrintOperand(MI, OpNo, O);
672 return false;
674 return true;
676 case 'b': // Print QImode register
677 case 'h': // Print QImode high register
678 case 'w': // Print HImode register
679 case 'k': // Print SImode register
680 case 'q': // Print DImode register
681 case 'V': // Print native register without '%'
682 if (MO.isReg())
683 return printAsmMRegister(*this, MO, ExtraCode[0], O);
684 PrintOperand(MI, OpNo, O);
685 return false;
687 case 'x': // Print V4SFmode register
688 case 't': // Print V8SFmode register
689 case 'g': // Print V16SFmode register
690 if (MO.isReg())
691 return printAsmVRegister(MO, ExtraCode[0], O);
692 PrintOperand(MI, OpNo, O);
693 return false;
695 case 'P': // This is the operand of a call, treat specially.
696 PrintPCRelImm(MI, OpNo, O);
697 return false;
699 case 'n': // Negate the immediate or print a '-' before the operand.
700 // Note: this is a temporary solution. It should be handled target
701 // independently as part of the 'MC' work.
702 if (MO.isImm()) {
703 O << -MO.getImm();
704 return false;
706 O << '-';
710 PrintOperand(MI, OpNo, O);
711 return false;
714 bool X86AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
715 const char *ExtraCode,
716 raw_ostream &O) {
717 if (ExtraCode && ExtraCode[0]) {
718 if (ExtraCode[1] != 0) return true; // Unknown modifier.
720 switch (ExtraCode[0]) {
721 default: return true; // Unknown modifier.
722 case 'b': // Print QImode register
723 case 'h': // Print QImode high register
724 case 'w': // Print HImode register
725 case 'k': // Print SImode register
726 case 'q': // Print SImode register
727 // These only apply to registers, ignore on mem.
728 break;
729 case 'H':
730 if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) {
731 return true; // Unsupported modifier in Intel inline assembly.
732 } else {
733 PrintMemReference(MI, OpNo, O, "H");
735 return false;
736 // Print memory only with displacement. The Modifer 'P' is used in inline
737 // asm to present a call symbol or a global symbol which can not use base
738 // reg or index reg.
739 case 'P':
740 if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) {
741 PrintIntelMemReference(MI, OpNo, O, "disp-only");
742 } else {
743 PrintMemReference(MI, OpNo, O, "disp-only");
745 return false;
748 if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) {
749 PrintIntelMemReference(MI, OpNo, O, nullptr);
750 } else {
751 PrintMemReference(MI, OpNo, O, nullptr);
753 return false;
756 void X86AsmPrinter::emitStartOfAsmFile(Module &M) {
757 const Triple &TT = TM.getTargetTriple();
759 if (TT.isOSBinFormatELF()) {
760 // Assemble feature flags that may require creation of a note section.
761 unsigned FeatureFlagsAnd = 0;
762 if (M.getModuleFlag("cf-protection-branch"))
763 FeatureFlagsAnd |= ELF::GNU_PROPERTY_X86_FEATURE_1_IBT;
764 if (M.getModuleFlag("cf-protection-return"))
765 FeatureFlagsAnd |= ELF::GNU_PROPERTY_X86_FEATURE_1_SHSTK;
767 if (FeatureFlagsAnd) {
768 // Emit a .note.gnu.property section with the flags.
769 assert((TT.isArch32Bit() || TT.isArch64Bit()) &&
770 "CFProtection used on invalid architecture!");
771 MCSection *Cur = OutStreamer->getCurrentSectionOnly();
772 MCSection *Nt = MMI->getContext().getELFSection(
773 ".note.gnu.property", ELF::SHT_NOTE, ELF::SHF_ALLOC);
774 OutStreamer->switchSection(Nt);
776 // Emitting note header.
777 const int WordSize = TT.isArch64Bit() && !TT.isX32() ? 8 : 4;
778 emitAlignment(WordSize == 4 ? Align(4) : Align(8));
779 OutStreamer->emitIntValue(4, 4 /*size*/); // data size for "GNU\0"
780 OutStreamer->emitIntValue(8 + WordSize, 4 /*size*/); // Elf_Prop size
781 OutStreamer->emitIntValue(ELF::NT_GNU_PROPERTY_TYPE_0, 4 /*size*/);
782 OutStreamer->emitBytes(StringRef("GNU", 4)); // note name
784 // Emitting an Elf_Prop for the CET properties.
785 OutStreamer->emitInt32(ELF::GNU_PROPERTY_X86_FEATURE_1_AND);
786 OutStreamer->emitInt32(4); // data size
787 OutStreamer->emitInt32(FeatureFlagsAnd); // data
788 emitAlignment(WordSize == 4 ? Align(4) : Align(8)); // padding
790 OutStreamer->endSection(Nt);
791 OutStreamer->switchSection(Cur);
795 if (TT.isOSBinFormatMachO())
796 OutStreamer->switchSection(getObjFileLowering().getTextSection());
798 if (TT.isOSBinFormatCOFF()) {
799 // Emit an absolute @feat.00 symbol.
800 MCSymbol *S = MMI->getContext().getOrCreateSymbol(StringRef("@feat.00"));
801 OutStreamer->beginCOFFSymbolDef(S);
802 OutStreamer->emitCOFFSymbolStorageClass(COFF::IMAGE_SYM_CLASS_STATIC);
803 OutStreamer->emitCOFFSymbolType(COFF::IMAGE_SYM_DTYPE_NULL);
804 OutStreamer->endCOFFSymbolDef();
805 int64_t Feat00Value = 0;
807 if (TT.getArch() == Triple::x86) {
808 // According to the PE-COFF spec, the LSB of this value marks the object
809 // for "registered SEH". This means that all SEH handler entry points
810 // must be registered in .sxdata. Use of any unregistered handlers will
811 // cause the process to terminate immediately. LLVM does not know how to
812 // register any SEH handlers, so its object files should be safe.
813 Feat00Value |= COFF::Feat00Flags::SafeSEH;
816 if (M.getModuleFlag("cfguard")) {
817 // Object is CFG-aware.
818 Feat00Value |= COFF::Feat00Flags::GuardCF;
821 if (M.getModuleFlag("ehcontguard")) {
822 // Object also has EHCont.
823 Feat00Value |= COFF::Feat00Flags::GuardEHCont;
826 if (M.getModuleFlag("ms-kernel")) {
827 // Object is compiled with /kernel.
828 Feat00Value |= COFF::Feat00Flags::Kernel;
831 OutStreamer->emitSymbolAttribute(S, MCSA_Global);
832 OutStreamer->emitAssignment(
833 S, MCConstantExpr::create(Feat00Value, MMI->getContext()));
835 OutStreamer->emitSyntaxDirective();
837 // If this is not inline asm and we're in 16-bit
838 // mode prefix assembly with .code16.
839 bool is16 = TT.getEnvironment() == Triple::CODE16;
840 if (M.getModuleInlineAsm().empty() && is16)
841 OutStreamer->emitAssemblerFlag(MCAF_Code16);
844 static void
845 emitNonLazySymbolPointer(MCStreamer &OutStreamer, MCSymbol *StubLabel,
846 MachineModuleInfoImpl::StubValueTy &MCSym) {
847 // L_foo$stub:
848 OutStreamer.emitLabel(StubLabel);
849 // .indirect_symbol _foo
850 OutStreamer.emitSymbolAttribute(MCSym.getPointer(), MCSA_IndirectSymbol);
852 if (MCSym.getInt())
853 // External to current translation unit.
854 OutStreamer.emitIntValue(0, 4/*size*/);
855 else
856 // Internal to current translation unit.
858 // When we place the LSDA into the TEXT section, the type info
859 // pointers need to be indirect and pc-rel. We accomplish this by
860 // using NLPs; however, sometimes the types are local to the file.
861 // We need to fill in the value for the NLP in those cases.
862 OutStreamer.emitValue(
863 MCSymbolRefExpr::create(MCSym.getPointer(), OutStreamer.getContext()),
864 4 /*size*/);
867 static void emitNonLazyStubs(MachineModuleInfo *MMI, MCStreamer &OutStreamer) {
869 MachineModuleInfoMachO &MMIMacho =
870 MMI->getObjFileInfo<MachineModuleInfoMachO>();
872 // Output stubs for dynamically-linked functions.
873 MachineModuleInfoMachO::SymbolListTy Stubs;
875 // Output stubs for external and common global variables.
876 Stubs = MMIMacho.GetGVStubList();
877 if (!Stubs.empty()) {
878 OutStreamer.switchSection(MMI->getContext().getMachOSection(
879 "__IMPORT", "__pointers", MachO::S_NON_LAZY_SYMBOL_POINTERS,
880 SectionKind::getMetadata()));
882 for (auto &Stub : Stubs)
883 emitNonLazySymbolPointer(OutStreamer, Stub.first, Stub.second);
885 Stubs.clear();
886 OutStreamer.addBlankLine();
890 void X86AsmPrinter::emitEndOfAsmFile(Module &M) {
891 const Triple &TT = TM.getTargetTriple();
893 if (TT.isOSBinFormatMachO()) {
894 // Mach-O uses non-lazy symbol stubs to encode per-TU information into
895 // global table for symbol lookup.
896 emitNonLazyStubs(MMI, *OutStreamer);
898 // Emit fault map information.
899 FM.serializeToFaultMapSection();
901 // This flag tells the linker that no global symbols contain code that fall
902 // through to other global symbols (e.g. an implementation of multiple entry
903 // points). If this doesn't occur, the linker can safely perform dead code
904 // stripping. Since LLVM never generates code that does this, it is always
905 // safe to set.
906 OutStreamer->emitAssemblerFlag(MCAF_SubsectionsViaSymbols);
907 } else if (TT.isOSBinFormatCOFF()) {
908 if (MMI->usesMSVCFloatingPoint()) {
909 // In Windows' libcmt.lib, there is a file which is linked in only if the
910 // symbol _fltused is referenced. Linking this in causes some
911 // side-effects:
913 // 1. For x86-32, it will set the x87 rounding mode to 53-bit instead of
914 // 64-bit mantissas at program start.
916 // 2. It links in support routines for floating-point in scanf and printf.
918 // MSVC emits an undefined reference to _fltused when there are any
919 // floating point operations in the program (including calls). A program
920 // that only has: `scanf("%f", &global_float);` may fail to trigger this,
921 // but oh well...that's a documented issue.
922 StringRef SymbolName =
923 (TT.getArch() == Triple::x86) ? "__fltused" : "_fltused";
924 MCSymbol *S = MMI->getContext().getOrCreateSymbol(SymbolName);
925 OutStreamer->emitSymbolAttribute(S, MCSA_Global);
926 return;
928 } else if (TT.isOSBinFormatELF()) {
929 FM.serializeToFaultMapSection();
932 // Emit __morestack address if needed for indirect calls.
933 if (TT.getArch() == Triple::x86_64 && TM.getCodeModel() == CodeModel::Large) {
934 if (MCSymbol *AddrSymbol = OutContext.lookupSymbol("__morestack_addr")) {
935 Align Alignment(1);
936 MCSection *ReadOnlySection = getObjFileLowering().getSectionForConstant(
937 getDataLayout(), SectionKind::getReadOnly(),
938 /*C=*/nullptr, Alignment);
939 OutStreamer->switchSection(ReadOnlySection);
940 OutStreamer->emitLabel(AddrSymbol);
942 unsigned PtrSize = MAI->getCodePointerSize();
943 OutStreamer->emitSymbolValue(GetExternalSymbolSymbol("__morestack"),
944 PtrSize);
949 //===----------------------------------------------------------------------===//
950 // Target Registry Stuff
951 //===----------------------------------------------------------------------===//
953 // Force static initialization.
954 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeX86AsmPrinter() {
955 RegisterAsmPrinter<X86AsmPrinter> X(getTheX86_32Target());
956 RegisterAsmPrinter<X86AsmPrinter> Y(getTheX86_64Target());