Public Git Hosting - llvm-project.git/tree

drwxr-xr-x		..
drwxr-xr-x	-	AsmParser	tree \| history
-rw-r--r--	2766	CMakeLists.txt	blob \| blame \| history \| raw
drwxr-xr-x	-	Disassembler	tree \| history
drwxr-xr-x	-	GISel	tree \| history
drwxr-xr-x	-	MCA	tree \| history
drwxr-xr-x	-	MCTargetDesc	tree \| history
-rw-r--r--	3588	RISCV.h	blob \| blame \| history \| raw
-rw-r--r--	2951	RISCV.td	blob \| blame \| history \| raw
-rw-r--r--	39581	RISCVAsmPrinter.cpp	blob \| blame \| history \| raw
-rw-r--r--	2770	RISCVCallingConv.td	blob \| blame \| history \| raw
-rw-r--r--	5785	RISCVCodeGenPrepare.cpp	blob \| blame \| history \| raw
-rw-r--r--	940	RISCVCombine.td	blob \| blame \| history \| raw
-rw-r--r--	4095	RISCVDeadRegisterDefinitions.cpp	blob \| blame \| history \| raw
-rw-r--r--	26490	RISCVExpandAtomicPseudoInsts.cpp	blob \| blame \| history \| raw
-rw-r--r--	22901	RISCVExpandPseudoInsts.cpp	blob \| blame \| history \| raw
-rw-r--r--	60185	RISCVFeatures.td	blob \| blame \| history \| raw
-rw-r--r--	7458	RISCVFoldMasks.cpp	blob \| blame \| history \| raw
-rw-r--r--	67709	RISCVFrameLowering.cpp	blob \| blame \| history \| raw
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-rw-r--r--	7027	RISCVGISel.td	blob \| blame \| history \| raw
-rw-r--r--	19572	RISCVGatherScatterLowering.cpp	blob \| blame \| history \| raw
-rw-r--r--	144787	RISCVISelDAGToDAG.cpp	blob \| blame \| history \| raw
-rw-r--r--	8931	RISCVISelDAGToDAG.h	blob \| blame \| history \| raw
-rw-r--r--	861799	RISCVISelLowering.cpp	blob \| blame \| history \| raw
-rw-r--r--	45226	RISCVISelLowering.h	blob \| blame \| history \| raw
-rw-r--r--	6166	RISCVInsertReadWriteCSR.cpp	blob \| blame \| history \| raw
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-rw-r--r--	147473	RISCVInstrInfo.cpp	blob \| blame \| history \| raw
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-rw-r--r--	1626	RISCVMachineFunctionInfo.cpp	blob \| blame \| history \| raw
-rw-r--r--	6194	RISCVMachineFunctionInfo.h	blob \| blame \| history \| raw
-rw-r--r--	3314	RISCVMacroFusion.td	blob \| blame \| history \| raw
-rw-r--r--	15771	RISCVMakeCompressible.cpp	blob \| blame \| history \| raw
-rw-r--r--	19834	RISCVMergeBaseOffset.cpp	blob \| blame \| history \| raw
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-rw-r--r--	24843	RISCVOptWInstrs.cpp	blob \| blame \| history \| raw
-rw-r--r--	3641	RISCVPostRAExpandPseudoInsts.cpp	blob \| blame \| history \| raw
-rw-r--r--	19577	RISCVProcessors.td	blob \| blame \| history \| raw
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-rw-r--r--	5768	RISCVPushPopOptimizer.cpp	blob \| blame \| history \| raw
-rw-r--r--	5873	RISCVRedundantCopyElimination.cpp	blob \| blame \| history \| raw
-rw-r--r--	35344	RISCVRegisterInfo.cpp	blob \| blame \| history \| raw
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-rw-r--r--	24386	RISCVRegisterInfo.td	blob \| blame \| history \| raw
-rw-r--r--	9192	RISCVSchedRocket.td	blob \| blame \| history \| raw
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-rw-r--r--	7393	RISCVSchedSyntacoreSCR1.td	blob \| blame \| history \| raw
-rw-r--r--	9856	RISCVSchedXiangShanNanHu.td	blob \| blame \| history \| raw
-rw-r--r--	13338	RISCVSchedule.td	blob \| blame \| history \| raw
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-rw-r--r--	7807	RISCVSubtarget.cpp	blob \| blame \| history \| raw
-rw-r--r--	10826	RISCVSubtarget.h	blob \| blame \| history \| raw
-rw-r--r--	15260	RISCVSystemOperands.td	blob \| blame \| history \| raw
-rw-r--r--	21195	RISCVTargetMachine.cpp	blob \| blame \| history \| raw
-rw-r--r--	2607	RISCVTargetMachine.h	blob \| blame \| history \| raw
-rw-r--r--	6167	RISCVTargetObjectFile.cpp	blob \| blame \| history \| raw
-rw-r--r--	2277	RISCVTargetObjectFile.h	blob \| blame \| history \| raw
-rw-r--r--	72796	RISCVTargetTransformInfo.cpp	blob \| blame \| history \| raw
-rw-r--r--	16645	RISCVTargetTransformInfo.h	blob \| blame \| history \| raw
drwxr-xr-x	-	TargetInfo	tree \| history