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Changed define name from OR1200_MEM2REG_FAST to OR1200_IMPL_MEM2REG2
2002-03-28 lampretChanged define name from OR1200_MEM2REG_FAST to OR1200_IMPL_...
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2002-03-28 lampretUpdated defines.
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2002-03-28 lampretOptimized cache controller FSM.
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2002-03-28 lampretRemoved old files.
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2002-03-14 lampretAdded alternative for critical path in DU.
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2002-03-11 lampretChanged generation of SPR address. Now it is ORed from...
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2002-03-11 lampretFixed async loop. Changed multiplier type for ASIC.
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2002-02-12 lampretNo longer using async rst as sync reset for the counter.
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2002-02-11 lampretSpeed optimizations (removed duplicate _cyc_ and _stb_...
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2002-02-01 lampretFixed combinational loops.
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2002-01-28 lampretChanged 'void' nop-ops instead of insn[0] to use insn...
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2002-01-23 lampretChanged default reset values for SR and ESR to match...
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2002-01-19 lampretFixed OR1200_XILINX_RAM32X1D.
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2002-01-19 lampretSR[TEE] should be zero after reset.
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2002-01-18 lampretFixed 'the NPC single-step fix'.
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2002-01-18 lampretNo more low/high priority interrupts (PICPR removed...
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2002-01-15 lampretFixed module name when compiling with OR1200_XILINX_RAM32X1D
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2002-01-14 lampretChanged alignment exception EPCR. Not tested yet.
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2002-01-14 lampretFixed order of syscall and range exceptions.
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2002-01-14 lampretDefault ASIC configuration does not sample WB inputs.
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2002-01-14 lampretFixed mem2reg bug in FAST implementation. Updated debug...
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2002-01-08 lampretFixed typo. OR1200_REGISTERED_OUTPUTS was not defined...
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2002-01-03 lampretUncommented OR1200_REGISTERED_OUTPUTS for FPGA target.
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2002-01-03 lampretNew prefixes for RTL files, prefixed module names....
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2001-12-04 lampretAdded OR1200_GENERIC_MULTP2_32X32 and OR1200_ASIC_MULTP2_32X32
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2001-11-27 lampretFixed except_stop width and fixed EX PC for 1400444f...
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2001-11-27 lampretChanged instantiation name of VS RAMs.
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2001-11-27 lampretNow FPGA and ASIC target are separate.
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2001-11-27 lampretFixed VS RAM instantiation - again.
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2001-11-23 lampretChanged DSR/DRR behavior and exception detection.
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2001-11-22 lampretAdded wb_cyc_o assignment after it was removed by accident.
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2001-11-20 lampretAdded OR1200_REGISTERED_INPUTS.
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2001-11-20 lampretAdded optional sampling of inputs.
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2001-11-20 lampretFixed virtual silicon single-port rams instantiation.
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2001-11-20 lampretFixed dbg_is_o assignment width.
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2001-11-20 lampretFixed width of du_except.
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2001-11-18 lampretOR1200_REGISTERED_OUTPUTS can now be enabled.
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2001-11-18 lampretFixed some l.trap typos.
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2001-11-18 lampretFor GDB changed single stepping and disabled trap exception.
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2001-11-13 lampretAdded 'setpc'. Renamed some signals (except_flushpipe...
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2001-11-13 lampretFixed tick timer interrupt reporting by using TTCR...
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2001-11-12 lampretMoved flag bit into SR. Changed RF enable from constant...
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2001-11-10 lampretFixed exceptions.
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2001-11-05 lampretAdded missing endif
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2001-11-02 lampretModified virtual silicon instantiations.
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2001-10-22 lampretFixed parameters in generic sprams.
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2001-10-21 lampretFixed sensitivity list.
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2001-10-21 lampretRemoved params from generic_XX.v. Added translate_off...
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2001-10-19 lampretFixed some synthesis warnings. Configured with caches...
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2001-10-14 lampretNo longer needed.
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2001-10-14 lampretMP3 version.
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2001-10-01 lampretUpdated debug. More cleanup. Added MAC.
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2001-09-28 lampretUpdate debug.
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2001-09-23 lampretAdding debug capabilities. Half done.
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2001-09-18 lampretUpdated from xess branch.
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2001-09-06 lampretUpdated debug.
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2001-08-17 lampretSim run script
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2001-08-17 lampretSome test code
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2001-08-17 lampretImproved wb_sram model
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2001-08-17 lampretIC enable/disable.
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2001-08-13 lampretRemoving obsolete files.
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2001-08-13 lampretAdded monitor.v and timescale.v
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2001-08-13 lampretAdded cfg regs. Moved all defines into one defines...
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2001-08-13 lampretFixed memory cells. Moved monitor.h into monitor.v
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2001-08-09 lampretMajor clean-up.
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2001-07-22 lampretFixed RAM's oen bug. Cache bypass under development.
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2001-07-22 lampretAdded variable ack of WB transfers (see NODELAY_WBx).
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2001-07-20 lampret*** empty log message ***
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2001-07-20 lampretForgot files.f file.
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2001-07-20 lampretBenches (under development).
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2001-07-20 lampretDevelopment version of RTL. Libraries are missing.
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2001-07-20 lampretsimulation script
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2001-07-20 lampretsynthesis scripts
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2001-05-28 lampretchanged some SPR addresses, added load/store data debug...
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2001-05-24 lampretA lot of changes.
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2001-05-24 lampretToo many changes to count. See revision insde docs.
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2001-05-01 lampretFirst import.
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32-bit scalar RISC with Harvard microarchitecture, 5 stage integer pipeline, virtual memory support (MMU) and basic DSP capabilities