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2003-06-06	lampret	When OR1200_NO_IMMU and OR1200_NO_IC are not both defined...	commit \| commitdiff \| tree
2003-04-24	lampret	No functional changes. Added defines to disable implementati...	commit \| commitdiff \| tree
2003-04-20	lampret	No functional change. Only added customization for...	commit \| commitdiff \| tree
2003-04-07	lampret	Fixed OR1200_CLKDIV_x_SUPPORTED defines. Fixed order...	commit \| commitdiff \| tree
2003-04-07	lampret	Fixed OR1200_CLKDIV_x_SUPPORTED defines. Better description.	commit \| commitdiff \| tree
2003-04-07	lampret	RFRAM defines comments updated. Altera LPM option added.	commit \| commitdiff \| tree
2003-04-07	lampret	Added another pipe stage to match gmult. One day second...	commit \| commitdiff \| tree
2003-04-07	lampret	RFRAM type always need to be defined.	commit \| commitdiff \| tree
2003-04-07	lampret	Added Altera LPM RAMs. Changed generic RAM output when...	commit \| commitdiff \| tree
2003-01-22	lampret	Updated sensitivity list for trace buffer [only relevant...	commit \| commitdiff \| tree
2002-12-08	lampret	Added optional support for WB B3 specification (xwb_cti_o...	commit \| commitdiff \| tree
2002-10-17	lampret	Added BIST scan. Special VS RAMs need to be used to...	commit \| commitdiff \| tree
2002-09-16	lampret	Removed obsolete comment.	commit \| commitdiff \| tree
2002-09-16	lampret	Fixed a combinational loop.	commit \| commitdiff \| tree
2002-09-16	lampret	Disabled cache inhibit atttribute.	commit \| commitdiff \| tree
2002-09-08	lampret	Updated the script.	commit \| commitdiff \| tree
2002-09-08	lampret	Added linter directory.	commit \| commitdiff \| tree
2002-09-08	lampret	Fixed a typo, reported by Taylor Su.	commit \| commitdiff \| tree
2002-09-08	lampret	First import of the new synopsys DC scripts.	commit \| commitdiff \| tree
2002-09-08	lampret	Removed old synthesis scripts.	commit \| commitdiff \| tree
2002-09-08	lampret	Added optional l.div/l.divu insns. By default they...	commit \| commitdiff \| tree
2002-09-07	lampret	If SR[CY] implemented with OR1200_IMPL_ADDC enabled...	commit \| commitdiff \| tree
2002-09-07	lampret	Added optional SR[CY]. Added define to enable additional...	commit \| commitdiff \| tree
2002-09-04	lampret	Now most of the configuration registers are updatded...	commit \| commitdiff \| tree
2002-09-03	lampret	As per Taylor Su suggestion all case blocks are full...	commit \| commitdiff \| tree
2002-08-28	lampret	Removed some commented RTL. Fixed SR/ESR flag bug.	commit \| commitdiff \| tree
2002-08-22	lampret	Store buffer has been tested and it works. BY default...	commit \| commitdiff \| tree
2002-08-22	lampret	Fixed IMMU bug.	commit \| commitdiff \| tree
2002-08-18	lampret	Disable SB until it is tested	commit \| commitdiff \| tree
2002-08-18	lampret	Added store buffer.	commit \| commitdiff \| tree
2002-08-15	lampret	Fixed Xilinx trace buffer address. REported by Taylor Su.	commit \| commitdiff \| tree
2002-08-15	lampret	Directory cleanup.	commit \| commitdiff \| tree
2002-08-14	lampret	Disabled ITLB translation when 1) doing access to ITLB...	commit \| commitdiff \| tree
2002-08-12	lampret	Added OR1200_WB_RETRY. Moved WB registered outsputs...	commit \| commitdiff \| tree
2002-08-12	lampret	Added optional retry counter for wb_rty_i. Added graceful...	commit \| commitdiff \| tree
2002-08-12	lampret	Delayed external access at page crossing.	commit \| commitdiff \| tree
2002-07-31	lampret	MAC now follows software convention (signed multiply...	commit \| commitdiff \| tree
2002-07-14	lampret	Added simple trace buffer [only for Xilinx Virtex target...	commit \| commitdiff \| tree
2002-06-08	lampret	Generic flip-flop based memory macro for register file.	commit \| commitdiff \| tree
2002-06-08	lampret	Added defines for enabling generic FF based memory...	commit \| commitdiff \| tree
2002-06-08	lampret	Added generic flip-flop based memory macro instantiation.	commit \| commitdiff \| tree
2002-03-29	lampret	Added a directive to ignore signed division variables...	commit \| commitdiff \| tree
2002-03-29	lampret	Added again just recently removed full_case directive	commit \| commitdiff \| tree
2002-03-29	lampret	Fixed some ports in instnatiations that were removed...	commit \| commitdiff \| tree
2002-03-29	lampret	Changed comment about synopsys to _synopsys_ because...	commit \| commitdiff \| tree
2002-03-29	lampret	Some of the warnings fixed.	commit \| commitdiff \| tree
2002-03-28	lampret	Added second type of Virtual Silicon two-port SRAM...	commit \| commitdiff \| tree
2002-03-28	lampret	Changed define name from OR1200_MEM2REG_FAST to OR1200_IMPL_...	commit \| commitdiff \| tree
2002-03-28	lampret	Updated defines.	commit \| commitdiff \| tree
2002-03-28	lampret	Optimized cache controller FSM.	commit \| commitdiff \| tree
2002-03-28	lampret	Removed old files.	commit \| commitdiff \| tree
2002-03-14	lampret	Added alternative for critical path in DU.	commit \| commitdiff \| tree
2002-03-11	lampret	Changed generation of SPR address. Now it is ORed from...	commit \| commitdiff \| tree
2002-03-11	lampret	Fixed async loop. Changed multiplier type for ASIC.	commit \| commitdiff \| tree
2002-02-12	lampret	No longer using async rst as sync reset for the counter.	commit \| commitdiff \| tree
2002-02-11	lampret	Speed optimizations (removed duplicate _cyc_ and _stb_...	commit \| commitdiff \| tree
2002-02-01	lampret	Fixed combinational loops.	commit \| commitdiff \| tree
2002-01-28	lampret	Changed 'void' nop-ops instead of insn[0] to use insn...	commit \| commitdiff \| tree
2002-01-23	lampret	Changed default reset values for SR and ESR to match...	commit \| commitdiff \| tree
2002-01-19	lampret	Fixed OR1200_XILINX_RAM32X1D.	commit \| commitdiff \| tree
2002-01-19	lampret	SR[TEE] should be zero after reset.	commit \| commitdiff \| tree
2002-01-18	lampret	Fixed 'the NPC single-step fix'.	commit \| commitdiff \| tree
2002-01-18	lampret	No more low/high priority interrupts (PICPR removed...	commit \| commitdiff \| tree
2002-01-15	lampret	Fixed module name when compiling with OR1200_XILINX_RAM32X1D	commit \| commitdiff \| tree
2002-01-14	lampret	Changed alignment exception EPCR. Not tested yet.	commit \| commitdiff \| tree
2002-01-14	lampret	Fixed order of syscall and range exceptions.	commit \| commitdiff \| tree
2002-01-14	lampret	Default ASIC configuration does not sample WB inputs.	commit \| commitdiff \| tree
2002-01-14	lampret	Fixed mem2reg bug in FAST implementation. Updated debug...	commit \| commitdiff \| tree
2002-01-08	lampret	Fixed typo. OR1200_REGISTERED_OUTPUTS was not defined...	commit \| commitdiff \| tree
2002-01-03	lampret	Uncommented OR1200_REGISTERED_OUTPUTS for FPGA target.	commit \| commitdiff \| tree
2002-01-03	lampret	New prefixes for RTL files, prefixed module names....	commit \| commitdiff \| tree
2001-12-04	lampret	Added OR1200_GENERIC_MULTP2_32X32 and OR1200_ASIC_MULTP2_32X32	commit \| commitdiff \| tree
2001-11-27	lampret	Fixed except_stop width and fixed EX PC for 1400444f...	commit \| commitdiff \| tree
2001-11-27	lampret	Changed instantiation name of VS RAMs.	commit \| commitdiff \| tree
2001-11-27	lampret	Now FPGA and ASIC target are separate.	commit \| commitdiff \| tree
2001-11-27	lampret	Fixed VS RAM instantiation - again.	commit \| commitdiff \| tree
2001-11-23	lampret	Changed DSR/DRR behavior and exception detection.	commit \| commitdiff \| tree
2001-11-22	lampret	Added wb_cyc_o assignment after it was removed by accident.	commit \| commitdiff \| tree
2001-11-20	lampret	Added OR1200_REGISTERED_INPUTS.	commit \| commitdiff \| tree
2001-11-20	lampret	Added optional sampling of inputs.	commit \| commitdiff \| tree
2001-11-20	lampret	Fixed virtual silicon single-port rams instantiation.	commit \| commitdiff \| tree
2001-11-20	lampret	Fixed dbg_is_o assignment width.	commit \| commitdiff \| tree
2001-11-20	lampret	Fixed width of du_except.	commit \| commitdiff \| tree
2001-11-18	lampret	OR1200_REGISTERED_OUTPUTS can now be enabled.	commit \| commitdiff \| tree
2001-11-18	lampret	Fixed some l.trap typos.	commit \| commitdiff \| tree
2001-11-18	lampret	For GDB changed single stepping and disabled trap exception.	commit \| commitdiff \| tree
2001-11-13	lampret	Added 'setpc'. Renamed some signals (except_flushpipe...	commit \| commitdiff \| tree
2001-11-13	lampret	Fixed tick timer interrupt reporting by using TTCR...	commit \| commitdiff \| tree
2001-11-12	lampret	Moved flag bit into SR. Changed RF enable from constant...	commit \| commitdiff \| tree
2001-11-10	lampret	Fixed exceptions.	commit \| commitdiff \| tree
2001-11-05	lampret	Added missing endif	commit \| commitdiff \| tree
2001-11-02	lampret	Modified virtual silicon instantiations.	commit \| commitdiff \| tree
2001-10-22	lampret	Fixed parameters in generic sprams.	commit \| commitdiff \| tree
2001-10-21	lampret	Fixed sensitivity list.	commit \| commitdiff \| tree
2001-10-21	lampret	Removed params from generic_XX.v. Added translate_off...	commit \| commitdiff \| tree
2001-10-19	lampret	Fixed some synthesis warnings. Configured with caches...	commit \| commitdiff \| tree
2001-10-14	lampret	No longer needed.	commit \| commitdiff \| tree
2001-10-14	lampret	MP3 version.	commit \| commitdiff \| tree
2001-10-01	lampret	Updated debug. More cleanup. Added MAC.	commit \| commitdiff \| tree
2001-09-28	lampret	Update debug.	commit \| commitdiff \| tree
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32-bit scalar RISC with Harvard microarchitecture, 5 stage integer pipeline, virtual memory support (MMU) and basic DSP capabilities

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